Abstract: A pattern formation method includes: forming a photoresist layer of a positive type on a substrate; exposing to light and developing the photoresist layer using an inversion mask having an opening at a site where a pattern is desired to be formed finally, thereby forming an opening portion in the photoresist layer to expose the substrate; applying a non-photosensitive organic film on an entire surface of the resulting substrate, so that the non-photosensitive organic film is embedded in the opening portion; etching back an entire surface of the non-photosensitive organic film on the photoresist layer until the photoresist layer is exposed; and exposing to light and developing an entire surface of the photoresist layer to remove the photoresist layer, thereby obtaining the non-photosensitive organic film having the desired pattern.

Abstract: Disclosed are methods of manufacturing electronic devices, particularly integrated circuits. Such methods include the use of low dielectric constant material prepared by using a removable porogen material.

Abstract: A pattern-forming method which comprises the following steps: (1) laminating an actinic ray-curable coating film layer onto the surface of an insulating film-forming resin layer. (2) irradiating directly or through a photomask an actinic ray or host wave thereonto so as to obtain a predetermined pattern. (3) subjecting the actinic ray-curable coating film layer to a developing treatment to form a resist pattern coating film consisting of the actinic ray-curable coating film layer, (4) and subjecting the insulating film-forming resin layer to a developing treatment, followed by removing.

Abstract: The present invention provides a method of forming a conductive pattern, comprising the steps of: (1) depositing a conductive coating-forming resin layer and an energy beam-sensitive coating layer on a substrate in this order; (2) irradiating a surface of the energy beam-sensitive coating layer with an active energy beam or heat rays directly or through a mask, so as to obtain a desired pattern; (3) developing the energy beam-sensitive coating layer to form a resist pattern coating from the energy beam-sensitive coating layer; and (4) removing revealed portions of the conductive coating-forming resin layer by development. The present invention also provides a method of forming a conductive pattern, comprising the step (1), the step (2), and the step of: (3′) developing the energy beam-sensitive coating layer and the conductive coating-forming resin layer simultaneously.

Abstract: A process method of using excimer laser for forming micro spherical and non-spherical polymeric structure array includes a photomask which has a selected curved pattern formed thereon. The curved pattern has non-constant widths along a straight line direction. An excimer laser beam source is deployed to project through the photomask on a substrate coated with a polymeric material while the substrate is moving in a direction normal to the straight line direction for the polymeric material to receive laser beam projection with different time period. The polymeric material thus may be etched to different depth to form a three dimensional pattern desired. By projecting and etching the polymeric material two times at different directions or through different photomask patterns, a sphere like or non-sphere like surface of micro array structure may be obtained.

Abstract: A pattern accuracy of a semiconductor integrated circuit device is to be improved. When an ordinary photomask is to be replaced with a resist mask, in setting a planar size of a shielding pattern formed by resist film, a correction quantity L is subtracted from a planar size of a corresponding shielding pattern formed of metal. Conversely, when the resist mask is to be replaced with the ordinary mask, in setting a planar size of the shielding pattern formed of metal, the correction quantity L is added to the planar size of the corresponding shielding pattern formed by resist film.

Abstract: In order to shorten the time required to change or correct a mask pattern over a mask, light-shielding patterns formed of a resist film for integrated circuit pattern transfer are partly provided over a mask substrate constituting a photomask in addition to light-shielding patterns formed of a metal for the integrated circuit pattern transfer.

Abstract: A multiple resist layer photolithographic process. A substrate having an insulation layer and a first photoresist layer sequentially stacked thereon is provided. A first light-exposure is conducted to transfer a pattern on a photomask to the first photoresist layer, thereby forming a first exposure pattern. A post-exposure baking is carried out and then the first photoresist layer is developed. A second photoresist layer is formed over the patterned first photoresist layer. A second photo-exposure is conducted to transfer the pattern on the same photomask to the second photoresist layer, thereby forming a second exposure pattern. The second exposure pattern and the first exposure pattern are aligned. Finally, the second photoresist layer is developed.

Abstract: A method of manufacturing an electron device provided with minute structure such as a semiconductor integrated circuit using projection exposure technique and phase shift mask technique, maintaining a high yield is disclosed. In an electron device manufacturing method according to the invention, a desired electron device is manufactured by printing a light shielding film pattern on a photosensitive film provided on the surface of a workpiece by a projection tool using a mask where a phase shifter having predetermined thickness is partially formed on the flat surface of a transparent plate and a light shielding film having a predetermined pattern and made of non-metal is partially provided with the film covering the end of the shifter and developing the photosensitive film.

Abstract: The present invention discloses a photo mask employing in a TFT-LCD fabrication using 4-mask process. The disclosed photo mask comprises a transparent substrate and a shielding pattern formed thereon, wherein the shielding pattern includes a pair of first shielding patterns each having the rectangular shape disposed with separation to cover source and drain formation regions, a pair of second shielding patterns of a bar type disposed between the first shielding patterns and third shielding patterns of a bar type disposed on lower and upper portions of the first and the second shielding patterns to make a clear division between a light transmittance region and a light shielding region on the edge of a channel region.

Abstract: A method of manufacturing a photomask includes determining an average value of dimensions of a pattern in a photomask. determining an in-plane uniformity of the dimensions, determining an exposure latitude on the basis of the average value and the in-plane uniformity. The exposure latitude depends on dimensional accuracy of the pattern.

Abstract: Prior to an exposure process in which a pattern formed on a mask is transferred by exposure onto photo-sensitized substrates, the temperature of the mask and/or the temperature of the photosensitized substrate is/are adjusted to an equilibrium temperatures which would be established during an exposure process, so that any inconvenience may be avoided, which may otherwise arise due to temperature changes with time in the environment of the exposure apparatus. Further, in a waiting interval during which no control sequence for exposure of a substrate is performed, a substrate stage for carrying a substrate is caused to wait at a position in the exposure apparatus at which stability against heat is obtained, so that any adverse effects may be minimized, which could occur due to changes in the temperature gradients prevailing in the exposure apparatus.

Abstract: The invention relates to a method for producing sequentially built-up printed circuit boards having a disparate number of conduction planes on both sides of the laminate core, which method comprises the following method steps: (A) coating both sides of a printed circuit board having conductor structures on only one side with a dielectric comprising a photopolymer or a thermally curable polymer; (B) structuring the plating holes (vias) on the side having the conductor structures by exposing the dielectric comprising a photopolymer to light and then developing with a solvent or by laser-drilling the plating holes (vias) into the dielectric comprising a thermally cured polymer; (C) depositing a copper layer on both sides of the board so obtained; (D) forming conductor structures on the front and completely etching away on the rear, if further asymmetric build-up is to be carried out, or on both sides of the printed circuit board if there is to be no further build-up or if further build-up is to be carried ou

Abstract: A new method is provided for the creation of densely patterned interconnect lines. As a first step of the invention, the mask layout is modified such that the ratio of line width (L) to line spacing (S) is sharply decreased. The line pattern that is created using this mask reflects the same sharp reduction in the ratio L/S. The width of the thus created lines is, as a second step of the invention, increased by the process of thermal flow while the spacing between the lines is concurrently decreased by the same amount.

Abstract: A resist pattern forming method of forming a pattern on a resist film formed on a wafer by using a projection exposure apparatus generates a resized pattern of an active area and its inverted pattern, then generates a logical product pattern of a gate pattern to be exposed and the resized pattern, generates a first mask having a logical sum pattern of the inverted pattern and the logical product pattern as a light shielding film, generates a second mask having a logical sum pattern of the resized pattern and the gate pattern as a light shielding film, exposes the resist film on the wafer using the first mask under a condition that an numerical aperture of the projection exposure apparatus is small, and then exposes the resist film on the wafer using the second mask under a condition that the numerical aperture of the projection exposure apparatus is large.

Abstract: A process for forming sub-lithographic features in an integrated circuit is disclosed herein. The process includes modifying a photoresist layer after patterning and development but before it is utilized to pattern the underlying layers. The modified photoresist layer has different etch rates in the vertical and horizontal directions. The modified photoresist layer is trimmed with a plasma etch. A feature included in the trimmed photoresist layer has a sub-lithographic lateral dimension.

Abstract: A system of etching using quantum entangled particles to get shorter interference fringes. An interferometer is used to obtain an interference fringe. N entangled photons are input to the interferometer. This reduces the distance between interference fringes by n, where again n is the number of entangled photons.

Abstract: An assist feature is formed on a lithographic reticle or mask using a hybrid resist and an exposure dose such that only an annular area is effectively exposed having a width that is potentially less than the minimum feature size that can be resolved by the mask exposure tool to simultaneously or sequentially form both a feature of interest and an assist feature for enhancing imaging of the feature of interest when the feature is printed to a wafer. Since the assist feature can be imaged simultaneously with the feature of interest or multiple assist features imaged concurrently, possibly between closely spaced features, data volume and mask writing time are greatly reduced. The invention is particularly applicable to the scaling of contact holes for connections to active devices in extremely high density integrated circuits.

Abstract: The present invention discloses a microelectromechanical system mask with an array of reflectors, each reflector having two mirrors separated from each other by an adjustable gap.

Abstract: One aspect of the present invention relates to a method for reducing resist residue defects on a wafer structure. The method involves providing a semiconductor structure having a photoresist, the photoresist comprising open areas and circuit areas thereon; irradiating the open areas and circuit areas through a first photomask with a first energy dose to effect an image-wise pattern in the photoresist; irradiating the open areas of the photoresist through a second photomask with a second energy dose; and developing the photoresist.