Abstract: An incremental analog-to-digital converter including a first-stage non-delay memorization element and other elements is disclosed. An ending time point of a second reset signal received by the first-stage non-delay memorization element is later than an ending time point of a first reset signal received by the other elements by at least one clock cycle, a reset duration of the first-stage non-delay memorization element is longer than a reset duration of the other element, so that the first-stage non-delay memorization element can be prevented from occurring overshoot or spike on an output thereof, and the incremental analog-to-digital converter can maintain a good signal-to-noise and distortion ratio under the condition that the internal elements has low swing limits.
Abstract: A system and method for highly efficient encoding of data that includes extended functionality for asymmetric encoding/decoding and network policy enforcement. In the case of asymmetric encoding/decoding the original data is encoded by an encoder according to a codebook and sent to a decoder, but the output of the decoder depends on data manipulation rules applied at the decoding stage to transform the decoded data into a different data set from the original data. In the case of network policy enforcement, a behavior appendix into the codebook, such that the encoder and/or decoder at each node of the network comply with network behavioral rules, limits, and policies during encoding and decoding.
Type:
Grant
Filed:
July 27, 2022
Date of Patent:
July 11, 2023
Assignee:
ATOMBEAM TECHNOLOGIES INC
Inventors:
Joshua Cooper, Aliasghar Riahi, Mojgan Haddad, Ryan Kourosh Riahi, Razmin Riahi, Charles Yeomans
Abstract: A method to automatically optimize waveform captures from an electrical system includes capturing at least one energy-related waveform using at least one Intelligent Electronic Device (IED) in the electrical system. The at least one captured energy-related waveform is analyzed to determine if the at least one captured energy-related waveform is capable of being compressed, while maintaining relevant attributes for characterization, analysis and/or other use. In response to determining the at least one captured energy-related waveform is capable of being compressed, while maintaining relevant attributes for characterization, analysis, and/or use, the at least one captured energy-related waveform may be compressed using at least one compression technique to generate at least one compressed energy-related waveform. One or more actions may be taken based on or using the at least one compressed energy-related waveform.
Abstract: An analog-to-digital converter, ADC, circuitry, comprises: an integrator connected to a capacitor, the integrator being configured to switch between integrating an analog input signal for ramping an integrator output and integrating a reference input signal for returning integrator output towards a threshold; a comparator for comparing integrator output to the threshold; and a timer for determining a time duration during which the reference input signal is integrated, the time duration providing a digital representation of an analog input signal value; the ADC circuitry further comprising a feedforward noise shaping loop configured to store a quantization error signal based on digitizing a first sample, the comparator being configured to receive a feedforward noise shaping signal for changing the threshold for digitizing a later sample of the analog input signal following the first sample.
Type:
Grant
Filed:
February 1, 2022
Date of Patent:
June 27, 2023
Assignees:
KATHOLIEKE UNIVERSITEIT LEUVEN, IMEC VZW, STICHTING IMEC NEDERLAND
Inventors:
Qiuyang Lin, Nick Van Helleputte, Roland Van Wegberg, Shuang Song
Abstract: The disclosed technology provides systems and methods of communication between implanted medical devices, e.g., implanted pulse generators, and handheld consumer devices, e.g., smartphones, via standard wireless communication protocols, e.g., Bluetooth or Bluetooth Low Energy (BLE) operating in the unlicensed 2.4 GHz frequency band.
Abstract: A wideband phased array antenna is provided. The wideband phased array antenna includes a plurality of antenna cells. Each of the antenna cells is configured to communicate over a frequency band ranging from 24 GHz to 52 GHz. Furthermore, one or more of the antenna cells includes a driven element and a parasitic element. The driven element is disposed on a first substrate that includes a first dielectric material. The parasitic element is disposed on a second substrate positioned relative to the first substrate such that a gap is defined between the first substrate and the second substrate. The second substrate includes a second dielectric material that is different than the first dielectric material.
Type:
Grant
Filed:
October 21, 2021
Date of Patent:
June 27, 2023
Assignee:
KYOCERA AVX COMPONENTS (SAN DIEGO), INC.
Inventors:
Abhishek Singh, Mehak Garg, Jeffrey L. Hilbert
Abstract: A hardware implementable lossless data compression decompression algorithm is disclosed, where the input data string is described in term of consecutive groups of alternating same type bits, where one of these groups of same type bits is defined as a preferred group with the other groups having either lower or higher number of same type bits, where the data string is partitioned into variable length processing strings where the variable length is determined by the occurrence of the preferred group or of a determined number of bits consisting of groups of lower number of same type bits, where these variable length processing strings are processed function of the configuration and content of each processing string only, where consecutive processing strings are additionally processed based on their content only, where processing is performed in a loop until a certain target performance is achieved, where processing is done without any data analysis, and where no negative compression gain is achieved for any cont
Abstract: Techniques for interpolating two voltages without loading them and without requiring significant power or additional area are described. The techniques include specific topologies for the buffering amplifiers that offer accuracy by cancelling systematic error sources without relying on high gain, thus simplifying the frequency compensation, and reducing power consumption. This can be achieved by biasing the amplifiers from the load current by an innovative feedback structure, which can remove the need for high impedance nodes inside the amplifiers.
Type:
Grant
Filed:
August 30, 2021
Date of Patent:
May 30, 2023
Assignee:
Analog Devices International Unlimited Company
Inventors:
Gerard Mora Puchalt, Italo Carlos Medina Sánchez Castro, Jesús Bonache Martinez
Abstract: The present invention concerns a vehicle antenna glazing antenna element. According to the present invention, the antenna element is placed on an outwardly oriented face of the glazing and the antenna is working at a frequency comprised between 750 MHZ and 28 GHZ. The antenna 5 element is connected to a co-axial cable.
Abstract: An antenna unit for glass according to the present invention is installed on the indoor side of a glass sheet, and transmits and receives electromagnetic waves at the indoor side through the glass sheet.
Abstract: Systems and methods for improving noise efficiency in a Delta Sigma modulator. A bypass scheme for a noise splitter is disclosed that reduces toggling activity for small signals. In particular, a sample-by-sample bypass noise splitter is disclosed that includes a noise splitting module and a bypass line. The bypass line bypasses the noise splitting module when signals are below a selected threshold, increasing efficiency of the system.
Type:
Grant
Filed:
August 6, 2021
Date of Patent:
May 23, 2023
Assignee:
Analog Devices, Inc.
Inventors:
Abhishek Bandyopadhyay, Preston S. Birdsong, Adam R. Spirer
Abstract: A digital predistortion system and method for pre-distorting an input to a non-linear system. The digital predistortion system includes a digital predistortion circuit and a memory. The digital predistortion circuit is configured to receive input data and modify the input data using at least one look-up table. The at least one look-up table is addressed by a signed real value of the input data. The memory is configured to store the at least one look-up table. The at least one look-up table is implemented based on a generalized memory polynomial model.
Abstract: The disclosure describes an implementation of a combinational thermometric-R2R that includes a thermometric DAC circuit to output the coarse output steps, an R2R circuit to control the fine output steps, and a resistor in series with the thermometric and R2R circuits. The techniques of this disclosure implement a fine resolution DAC, on the order of two nanoamps per bit, that operates at low current, yet maintains monotonicity throughout the DAC output range.
Type:
Grant
Filed:
October 9, 2020
Date of Patent:
May 16, 2023
Assignee:
MEDTRONIC, INC.
Inventors:
Krishna Pramod Madabhushi, Robert W. Hocken, Jr.
Abstract: A cover for at least one antenna emitting and/or sensing electromagnetic radiation in at least one first frequency band includes at least one first surface facing the antenna and at least one second surface averted to the antenna, and at least one first carrier layer into which hat least one heating element is embedded, the heating element being connected to a terminal at least partly extending from the first surface and/or being at least partly located on the first surface.
Type:
Grant
Filed:
January 16, 2020
Date of Patent:
May 16, 2023
Assignee:
Motherson Innovations Company Limited
Inventors:
Garry Gordon Leslie Fimeri, Dean Caruso
Abstract: Methods and devices for digitizing an analog repetitive signal using waveform averaging are described. An example method includes generating a discrete set of analog dither offset voltages, wherein at least two of the discrete set of analog dither offset voltages are different from each other, receiving the analog repetitive signal comprising multiple instances of a waveform, wherein the waveform has a waveform duration, generate a timing alignment to align each waveform of the analog repetitive signal and the corresponding analog dither offset voltage over the waveform duration, combining, based on the timing alignment, each waveform and the corresponding analog dither offset voltage over the waveform duration to produce an analog output signal, converting the analog output signal to a digital output signal, and producing, based on the timing alignment, a digital averaged signal based on averaging the multiple instances of the waveform in the analog output signal.
Type:
Grant
Filed:
December 17, 2021
Date of Patent:
May 16, 2023
Assignees:
LAWRENCE LIVERMORE NATIONAL SECURITY, LLC, TEKTRONIX, INC.
Inventors:
Brandon Walter Buckley, Ryan Douglas Muir, Daniel G. Knierim
Abstract: [Problems to be Solved] To provide a flight vehicle and a communication system which can relay communications between transmission and reception antennae that are located farther from each other by using antennae capable of receiving information transmitted from a transmission antenna located in a wider range than a range of a linear directed antenna can receive. [Solution] A flight vehicle 1 according to the present invention comprises one or more linear array antennae (antennae 4); and a controller 2 configured to be capable to execute: a process of receiving information by one or more of the antennae 4, a process of outwardly transmitting said information by one or more of the antennae 4. In the communication system C of the present invention, which includes said flight vehicle 1, the transmission antenna T1 and the reception antenna R1 differ from each other.
Abstract: A method of operating an analog-to-digital converter includes in a first conversion period, a comparator generating a first comparison result, a first selection circuit switching a voltage output to a first capacitor of a set of larger capacitor of a first capacitor array, and a second selection circuit switching a voltage output to a second capacitor of a set of larger capacitor of a second capacitor array, and in a second conversion period after the first conversion period, the comparator generating a second comparison result different from the first comparison result, the first selection circuit switching back the voltage output to a first capacitor portion of the first capacitor of the set of larger capacitor of the first capacitor array, and the second selection circuit switching back the voltage output to a first capacitor portion of the second capacitor of the set of larger capacitor of the second capacitor array.
Type:
Grant
Filed:
November 3, 2021
Date of Patent:
April 25, 2023
Assignee:
Realtek Semiconductor Corp.
Inventors:
Kai-Yue Lin, Wei-Jyun Wang, Shih-Hsiung Huang, Kai-Yin Liu
Abstract: A decoding circuit and a chip are disclosed. The decoding circuit includes, connected in a sequence, a charge/discharge unit, a capacitor and a conversion unit. The charge/discharge unit is able to charge and discharge the capacitor, and a ratio of a total time required to transfer any amount of charge into the capacitor to a total time required to transfer the same amount of charge from the capacitor is a predetermined value. The conversion unit is configured to output a third level when a voltage on the capacitor exceeds a predetermined voltage and to otherwise output a fourth level.
Abstract: The energy consumed by data transfer in a computing device may be reduced by transferring data that has been encoded in a manner that reduces the number of one “1” data values, the number of signal level transitions, or both. A data destination component of the computing device may receive data encoded in such a manner from a data source component of the computing device over a data communication interconnect, such as an off-chip interconnect. The data may be encoded using minimum Hamming weight encoding, which reduces the number of one “1” data values. The received data may be decoded using minimum Hamming weight decoding. For other computing devices, the data may be encoded using maximum Hamming weight encoding, which increases the number of one “1” data values while reducing the number of zero “0” values, if reducing the number of zero values reduces energy consumption.
Type:
Grant
Filed:
July 30, 2021
Date of Patent:
April 25, 2023
Assignee:
QUALCOMM Incorporated
Inventors:
Engin Ipek, Bohuslav Rychlik, George Patsilaras, Prajakt Kulkarni, Can Hankendi, Fahad Ali, Jeffrey Gemar, Matthew Severson
Abstract: One example method includes file specific compression selection. Compression metrics are generated for a chunk of a file using a reference compressor. Compression metrics for other compressors are determined from the metrics of the reference compressor. A compressor is then selected to compress the file.
Type:
Grant
Filed:
June 30, 2021
Date of Patent:
April 25, 2023
Assignee:
EMC IP HOLDING COMPANY LLC
Inventors:
Rômulo Teixeira De Abreu Pinho, Vinicius Michel Gottin, Joel Christner