Abstract: A display panel is disclosed. The disclosed display panel includes a thin film transistor substrate, a plurality of micro LEDs arranged on one surface of the thin film transistor substrate, a plurality of first connection pads disposed on the one surface of the thin film transistor substrate, a plurality of second connection pads disposed on the other surface of the thin film transistor substrate that faces the one surface, and a plurality of connection wirings disposed on a side surface of the thin film transistor substrate for electrically connecting each of the plurality of first connection pads and the plurality of second connection pads, wherein at least one of an edge region on the one surface and an edge region on the other surface of the thin film transistor substrate includes a cutting area which is cut in an inward direction of the thin film transistor substrate.

Abstract: A light-emitting diode (LED) device includes a first epitaxial layered structure having an upper surface having different first and second regions, a second epitaxial layered structure spaced-apart disposed on the first epitaxial layered structure, a light conversion layer formed on the first region, a bonding unit disposed on the light conversion layer, the bonding unit and the light conversion layer interconnecting the first and second epitaxial layered structures, and an electrically conductive structure formed on the second region and electrically connects the first and second epitaxial layered structures. A method for manufacturing the LED device is also disclosed.

Abstract: A display panel and a display device. The display panel includes a display panel main body and a cover plate; the display panel main body has a light emitting surface, and the cover plate covers the light emitting surface of the display panel main body; the light emitting surface includes a flat light emitting region and a curved light emitting region, the cover plate includes a curved portion covering the curved light emitting region; in a direction from the flat light emitting region to the curved light emitting region, thicknesses of positions of the curved portion gradually decrease.

Abstract: Various embodiments of the present application are directed towards an integrated circuit comprising a resistive random-access memory (RRAM) cell with recessed bottom electrode sidewalls to mitigate the effect of sidewall plasma damage. In some embodiments, the RRAM cell includes a lower electrode, a data storage element, and an upper electrode. The lower electrode includes a pair of recessed bottom electrode sidewalls respectively on opposite sides of the lower electrode. The data storage element overlies the lower electrode and includes a pair of storage sidewalls. The storage sidewalls are respectively on the opposite sides of the lower electrode, and the recessed bottom electrode sidewalls are laterally spaced from and laterally between the storage sidewalls. The upper electrode overlies the data storage element.

Abstract: A sensor device comprising: a lead frame; a first/second semiconductor die having a first/second sensor structure at a first/second sensor location, and a plurality of first/second bond pads electrically connected to the lead frame; the semiconductor dies having a square or rectangular shape with a geometric center; the sensor locations are offset from the geometrical centers; the second die is stacked on top of the first die, and is rotated by a non-zero angle and optionally also offset or shifted with respect to the first die, such that a perpendicular projection of the first and second sensor location coincide.

Abstract: An in-plane magnetized spin-orbit magnetic device is provided. The in-plane magnetized spin-orbit magnetic device includes a heavy metal layer, an upper electrode and a magnetic tunnel junction. The magnetic tunnel junction is disposed between the heavy metal layer and the upper electrode. The magnetic tunnel junction includes a free layer and a pinned layer. The free layer is disposed on the heavy metal layer, and the free layer has a first film plane area. The pinned layer is disposed on the free layer, and the pinned layer has a second film plane area. There is a preset angle between a long axis direction of a film plane shape of the free layer and a long axis direction of a film plane shape of the pinned layer, and the first film plane area is larger than the second film plane area.

Abstract: A transistor package comprising: a substrate; a first transistor in thermal contact with the substrate, wherein the transistor comprises a gate; the substrate sintered to a heat sink through a sintered layer; an encapsulant that at least partially encapsulates the first transistor; and a Kelvin connection to the transistor gate.

Abstract: A spin-orbit torque magnetization rotational element includes: a first insulating layer with first and second openings; a first conductive portion formed inside the first opening; a second conductive portion formed inside the second opening; a spin-orbit torque wiring located in a first direction and extends in a second direction over the first and second conductive portions; and a first ferromagnetic layer located on the side opposite to the first insulating layer in the spin-orbit torque wiring, wherein the first conductive portion includes a first surface facing the spin-orbit torque wiring, a second surface facing the first surface and is located at a position farther from the spin-orbit torque wiring than the first surface, and a side surface connecting the first surface and the second surface, and the side surface includes a continuous major surface and a third surface inclined or curved and is discontinuous with respect to the major surface.

Abstract: A light-emitting device, includes a substrate, including an upper surface; a first light emitting unit and a second light emitting unit, formed on the upper surface, wherein each of the first light emitting unit and the second light emitting unit includes a lower semiconductor portion and an upper semiconductor portion; and a conductive structure electrically connecting the first light emitting unit and the second light emitting unit; wherein the lower semiconductor portion of the first light emitting unit includes a first sidewall and a first upper surface; and wherein the first side wall includes a first sub-side wall and a second sub-side wall, an obtuse angle is formed between the first sub-side wall and the first upper surface and another obtuse angle is formed between the second sub-side wall and the upper surface.

Abstract: A semiconductor device includes a first level having a plurality of transistor devices, and a first wiring level positioned over the first level. The first wiring level includes a plurality of conductive lines extending parallel to the first level, a plurality of conductive vertical interconnects extending perpendicular to the first level, and one or more programmable vertical interconnects that extend perpendicular to the first level and include a programmable material having a modifiable resistivity in that the one or more programmable vertical interconnects change between being conductive and being non-conductive according to a current pattern.

Abstract: A magnetoresistance effect element includes: a laminate body including a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer located between the first ferromagnetic layer and the second ferromagnetic layer; and a spin-orbit torque wiring connected to the laminate body. A second surface opposite to a first surface of the spin-orbit torque wiring in contact with the laminate body is curved in a first direction orthogonal to a direction in which the laminate body is laminated.

Abstract: A solid-state light-emitting device includes: a substrate; an epitaxial layer structure on the substrate and including a first-type area and a second-type area; a first current blocking layer disposed on the epitaxial layer structure and located in the first-type area; a current spreading layer covering the first current blocking layer so that the first current blocking layer is located between the current spreading layer and the epitaxial layer structure; a first adhesive reinforcing layer disposed on a side of the current spreading layer away from the first current blocking layer and including a plurality of first through holes; a first electrode disposed on a side of the first adhesion reinforcing layer away from the current spreading layer and filled into the plurality of first through holes to electrically contact with the current spreading layer. Therefore, the light-emitting efficiency of the solid-state light-emitting device is improved.

Abstract: A light emitting device including a substrate, a first pad, a second pad, a light emitting diode, a first connection structure, a second connection structure, and a patterned adhesive layer and a method for manufacturing the same are provided. The first pad and the second pad are located on the substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, a first electrode and a second electrode. The first electrode and the second electrode are respectively connected to the first semiconductor layer and the second semiconductor layer. The first connection structure electrically connects the first electrode to the first pad. The second connection structure electrically connects the second electrode to the second pad. The patterned adhesive layer is located between the substrate and the light emitting diode and does not contact the first connection structure and the second connection structure.

Abstract: A magnetic memory device includes a spin-orbit torque (SOT) induction structure which may be strained and seedless and formed with a perpendicular magnetic anisotropy. A magnetic tunnel junction (MTJ) stack is disposed over the SOT induction structure. A spacer layer may decouple layers between the SOT induction structure and the MTJ stack or decouple layers within the MTJ stack. One end of the SOT induction structure may be coupled to a first transistor and another end of the SOT induction structure coupled to a second transistor.

Abstract: A display apparatus having an opening ratio that provides a high resolution and improved luminous quality and including: a substrate; a first driving thin-film transistor (TFT) and a first storage capacitor, the first storage capacitor for emitting light of a first color and on the substrate; a data wiring unit including a first data line, a second data line, and a third data line, at a first side of the first storage capacitor, extending along a first direction and spaced apart from one another along a second direction, intersecting the first direction, by a predetermined distance; a driving voltage line at a second side of the first storage capacitor and extending along the first direction; and a first pixel electrode electrically connected to the first driving TFT.

Abstract: The present application discloses a method for fabricating semiconductor device with a stress relief structure. The method includes providing a substrate, forming an intrinsically conductive pad above the substrate, and forming a stress relief structure above the substrate and distant from the intrinsically conductive pad.

Abstract: A magnetic device includes a stacked body including a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer sandwiched between the first ferromagnetic layer and the second ferromagnetic layer; a first insulating layer which covers side surfaces of the stacked body; and a radiator located outside the first insulating layer with respect to the stacked body, in which a distance between the stacked body and the radiator differs depending on a position of the stacked body in a stacking direction.

Abstract: A memory device is provided. The memory device includes a substrate, a spin-orbit torque layer and a magnetic tunneling junction (MTJ). The MTJ stacks with the spin-orbit torque layer over the substrate and includes a synthetic free layer, a barrier layer and a reference layer. The synthetic free layer includes a synthetic antiferromagnetic structure, a first spacer layer and a free layer, wherein the synthetic antiferromagnetic structure is disposed between the spin-orbit torque layer and the free layer. The barrier layer is disposed beside the synthetic free layer. The reference layer is disposed beside the barrier layer.

Abstract: An apparatus comprising an insulated gate bipolar transistor and a super junction metal-oxide semiconductor field effect transistor wherein the insulated gate bipolar transistor and the super-junction metal-oxide semiconductor field effect transistor are electrically and optionally structurally coupled.

Abstract: A light emitting device includes first and second electrodes disposed on a substrate and spaced apart from each other; at least one light emitting diode disposed between the first and second electrodes; an insulating pattern overlapping an upper portion of the at least one light emitting diode and exposing first and second ends of the at least one light emitting diode; a first contact electrode electrically connecting the first end of the at least one light emitting diode to the first electrode; and a second contact electrode electrically connecting the second end of the at least one light emitting diode to the second electrode. The insulating pattern may completely overlap the first and second ends of the at least one light emitting diode in a plan view, and have a width reducing toward a lower portion of the insulating pattern.