Patents Examined by Laura M Dykes
  • Patent number: 11984538
    Abstract: A thin-film white LED chip includes a transparent substrate, a first transparent electrode, an emissive structure, a second transparent electrode, and a first phosphorescent/fluorescent layer respectively arranged in sequence. The emissive structure includes an emissive layer, an electron injection layer and a hole injection layer respectively formed at both sides of the emissive layer, and a total thickness of the electron injection layer and the second transparent electrode (in an inverted structure) or a total thickness of the hole injection layer and the second transparent electrode (in a conventional structure) is smaller than a length of one emission wavelength of the emissive layer. The evanescent wave generated by total internal reflection can penetrate into and be absorbed by the first phosphorescent/fluorescent layer to further emit light, thereby the overall external quantum efficiency of the LED chip is improved.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: May 14, 2024
    Assignee: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Ziming Chen, Xuanli Ye, Zhenchao Li, Yong Cao
  • Patent number: 11978708
    Abstract: Device of the chip or electronic system-in-package type, comprising at least one element for protecting at least part of at least one face of the device, said protective element comprising at least: an attack detection element of the device comprising at least one GMI-effect electrically conductive material, and a magnetic field emitter to which said GMI-effect electrically conductive material is to be subjected, and wherein the GMI effect is to be achieved in said GMI-effect electrically conductive material when an exciting alternating electric current flows therethrough and when subjected to the magnetic field of the magnetic field emitter.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: May 7, 2024
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Thibaut Sohier, Stephan Borel, Jean-Philippe Michel, Gilles Simon
  • Patent number: 11960180
    Abstract: A display panel, a display apparatus, and a manufacturing method are disclosed. The display panel includes a base substrate having a first through hole; a conductive structure located on the base substrate and at least partially covering the first through hole; and a display structure including a first display structure, a control line, and a second display structure that are arranged in layers on a side of the base substrate where the conductive structure is located, wherein the first display structure has a second through hole, and the control line is electrically connected to the conductive structure by passing through the second through hole.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: April 16, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunyang Wang, Hongwei Tian, Dong Li, Liangjian Li
  • Patent number: 11949053
    Abstract: A light emitting diode (LED) device comprises: an interposer comprising: an interposer body, a plurality of pillars on a first surface of the interposer body, and two or more local fiducials on the first surface of the interposer body; an LED die comprising a die body and a first die surface comprising a plurality of light emitting diodes (LEDs), the LED die being mounted on the plurality of pillars; and a flux material located between each of the pillars and a second die surface of the die body, the second die surface of the die body being opposite the first die surface, there being no flux material on a fiducial surface of each of the local fiducials. Methods of manufacturing a light emitting diode (LED) devices comprise: printing a flux material onto the pillars of the interposer, attaching an LED die to the pillars, and washing away excess flux material.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: April 2, 2024
    Assignee: Lumileds LLC
    Inventors: Chee-Jong Loh, Khar Kheng Tok, Chew-Hong Lee
  • Patent number: 11942450
    Abstract: A cell of fluidic assembly of microchips on a substrate, including: a base having its upper surface intended to receive the substrate; a body laterally delimiting a fluidic chamber above the substrate; and a cover closing the fluidic chamber from its upper surface, wherein the body comprises first and second nozzles respectively emerging onto opposite first and second lateral edges of the fluidic chamber, each of the first and second nozzles being adapted to injecting and/or sucking in a liquid suspension of microchips into and/or from the fluidic chamber, in a direction parallel to the mean plane of the substrate.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: March 26, 2024
    Assignees: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Centre National de la Recherche Scientifique
    Inventor: Melina Haupt
  • Patent number: 11935867
    Abstract: A semiconductor package comprising a package substrate that extends in a first direction and a second direction perpendicular to the first direction, a plurality of logic dies and a memory stack structure on the package substrate, and an interposer substrate mounted in the package substrate. The memory stack structure vertically overlaps the interposer substrate. Each of the logic dies includes a first part that is horizontally offset from the interposer substrate and a second part that vertically overlaps the interposer substrate. The interposer substrate includes an interlayer dielectric layer and a plurality of wiring lines in the interlayer dielectric layer. The memory stack structure is electrically connected to at least one of the logic dies through the wiring lines of the interposer substrate.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: March 19, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yanggyoo Jung, Sungeun Kim, Sangmin Yong, Hae-Jung Yu
  • Patent number: 11935823
    Abstract: A display device includes a metal layer, a boots layer, a passivation layer, and a conductive layer. The boots layer is located below the metal layer. The boots layer is partially overlapped with the metal layer. The passivation layer covers the metal layer and the boots layer. The conductive layer covers the passivation layer and the metal layer. The conductive layer is overlapped with the boots layer along a direction of the orthogonal projection.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: March 19, 2024
    Assignee: E Ink Holdings Inc.
    Inventors: Yi-Jiun Wu, Wei-Shih Ni
  • Patent number: 11916130
    Abstract: A lateral bipolar junction transistor including an emitter region, base region and collector region laterally orientated over a type IV semiconductor substrate, each of the emitter region, the base region and the collector region being composed of a type III-V semiconductor material. A buried oxide layer is present between the type IV semiconductor substrate and the emitter region, the base region and the collector region. The buried oxide layer having a pedestal aligned with the base region.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 27, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kuen-Ting Shiu, Tak H. Ning, Jeng-Bang Yau, Cheng-Wei Cheng, Ko-Tao Lee
  • Patent number: 11903119
    Abstract: A flexible circuit board for a chip on film according to an embodiment includes: a substrate including a first surface and a second surface opposite to the first surface and including a chip mounting region; a circuit pattern layer disposed on the first surface; and a heat dissipation part disposed in the chip mounting region, wherein the substrate is formed with at least two or more holes that are formed in a region overlapping the heat dissipation part, and the heat dissipation part includes: a heat dissipation pattern layer disposed on the first surface; a connection layer disposed inside the hole; and a heat dissipation layer disposed on the second surface.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: February 13, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Chae Won Kang, Jun Young Lim
  • Patent number: 11889724
    Abstract: A display device includes: an array substrate including a pixel array disposed on a display area, a first transfer wiring disposed on a peripheral area adjacent to the display area and electrically connected to the pixel array, a second transfer wiring disposed on the peripheral area adjacent to the display area and electrically connected to the pixel array, and a barrier member disposed between the first transfer wiring and the second transfer wiring, the barrier member including an inorganic insulation material; and a sealing member disposed between the array substrate and an encapsulation substrate to combine the array substrate with the encapsulation substrate, the sealing member contacting at least a portion of the first transfer wiring and the second transfer wiring.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: January 30, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hwiseong Kim, Donghoo Kim, Hoisoo Kwon, Hee-Won Yoon, Soojeong Choi, Gwangjoon Hong
  • Patent number: 11877486
    Abstract: A display device includes a scan line extending in a first direction. A plurality of data lines cross the scan line. A driving voltage line crosses the scan line. An active pattern includes a plurality of channel regions and a plurality of conductive regions. A control line is connected to the plurality of data lines and the driving voltage line. The active pattern includes a shielding part overlapping at least one data line of the plurality of data lines. The control line includes a plurality of main line parts each extending in the first direction, and a detour part connecting two adjacent main line parts of the plurality of main line parts to each other. The detour part extends along a periphery of the active pattern and crosses the at least one data line of the plurality of data lines.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: January 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jun Won Choi, Chae Han Hyun
  • Patent number: 11875988
    Abstract: An electronic component includes a device die and a substrate. The device die includes conductive contacts with conductive pillars conductively affixed to conductive contact. The conductive pillars include a cavity formed in an end of the conductive pillar opposite the conductive contact. The substrate includes of conductive pads that are each associated with one of the conductive contacts. The conductive pads include a conductive pad conductively affixed to the substrate, and a conductive ring situated within a cavity in the end conductive rings have a capillary formed along an axis of the conductive ring. A solder material fills the capillary of each of the conductive rings and the cavity formed in the end of the associated conductive pillars to form a conductive joint between the pillars and the conductive pads.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: January 16, 2024
    Assignee: NXP USA, INC.
    Inventor: Kabir Mirpuri
  • Patent number: 11864403
    Abstract: Provided is a light-emitting element which includes a first electrode, a second electrode over the first electrode, and first and second light-emitting layers therebetween. The first light-emitting layer contains a first host material and a first light-emitting material, and the second light-emitting layer contains a second host material and a second light-emitting material. The first light-emitting material is a fluorescent material, and the second light-emitting material is a phosphorescent material. The level of the lowest triplet excited state (T1 level) of the first light-emitting material is higher than the T1 level of the first host material. A light-emitting device, an electronic device, and a lighting device including the light-emitting element are further provided.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: January 2, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Ishisone, Satoshi Seo, Yusuke Nonaka, Nobuharu Ohsawa
  • Patent number: 11848286
    Abstract: A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: December 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventor: Yi-Feng Chang
  • Patent number: 11839120
    Abstract: An electronic device including a pixel array structure, a redistribution structure, and a plurality of conductive via structures is provided. The pixel array structure includes a plurality of signal lines. The redistribution structure overlaps the pixel array structure and includes a plurality of conductive lines. The conductive via structures electrically connect the signal lines of the pixel array structure and the conductive lines of the redistribution structure. At least one of the conductive via structures shares at least one conductive layer with the pixel array structure.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: December 5, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Chung Chen, Wen-Yu Kuo, Chieh-Wei Feng, Tai-Jui Wang
  • Patent number: 11837571
    Abstract: A semiconductor module includes a substrate, a semiconductor chip arranged on the substrate, and a first connecting element for electrically connecting the semiconductor chip to a conductor track and/or to a further component of the semiconductor module. At least part of the first connecting element lies in surface contact with the semiconductor chip and the substrate and also the conductor track and/or the further component. The semiconductor module includes a second connecting element for electrically connecting the semiconductor chip to the conductor track and/or to the further component. The second connecting element is configured in the form of a wire or a strip.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: December 5, 2023
    Assignee: Siemens Aktiengesellschaft
    Inventor: Georg Zaiser
  • Patent number: 11824034
    Abstract: A display device includes a display panel including a first signal pad and a second signal pad, a circuit board overlapped with the first and second signal pads, and an adhesive film overlapped with the first and second signal pads and disposed between the circuit board and the display panel. The adhesive film includes a base resin and a plurality of conductive balls dispersed in the base resin. The circuit board includes a first driving pad and a second driving pad. The first and second driving pads protrude toward the adhesive film and are arranged in a first direction. The first and second driving pads overlap with the first and second signal pads, respectively. The display device may be configured to satisfy the inequality: T ? G + B × S W + S .
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Joo-Nyung Jang
  • Patent number: 11825708
    Abstract: A display panel includes a substrate including a component area, a display area at least partially surrounding the component area, and a first non-display area at least partially surrounding the display area. A first wiring is in the display area and extends in a first direction to face the component area. A second wiring is in the display area and extends in the first direction to face the component area. The second wiring is spaced apart from the first wiring with the component area therebetween. A pixel circuit is connected to one of the first and second wirings and includes at least one thin-film transistor. A display element is connected to the pixel circuit. A cross-sectional area of the first wiring crossing in a second direction that is perpendicular to the first direction is different from a cross-sectional area of the second wiring crossing in the second direction.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dokeun Song, Hyunah Sung, Sukyoung Yang, Dongmin Lee, Hyuneok Shin
  • Patent number: 11817054
    Abstract: A pixel structure includes an original light emitting diode die and a repairing light emitting diode die emitting light of a same color, and an extending conductor. The original light emitting diode die includes a first epitaxial layer, and a first electrode and a second electrode disposed at opposite sides of the first epitaxial layer. The repairing light emitting diode die includes a second epitaxial layer, and a third electrode and a fourth electrode disposed at a same side of the second epitaxial layer. The extending conductor includes a first portion, a second portion and a cut-off region. The first portion is electrically connected to the second electrode of the original light emitting diode die. The second portion is electrically connected to the third electrode of the repairing light emitting diode die. The cut-off region is located in the first portion or between the first portion and the second portion.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: November 14, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Yao-Jun Tsai
  • Patent number: 11805685
    Abstract: The present application relates to an electronic device. The electronic device includes a first electronic component and a second electronic component. The first electronic component includes a first pad area including first pads and second pads spaced apart from the first pads. A number of the first pads is greater than a number of the second pads. The second electronic component includes first bumps electrically connected to the first pads, and second bumps electrically connected to the second pads. Each of the second bumps has a bonding area greater than a bonding area of each of the first bumps. A conductive adhesive layer is disposed between the first electronic component and the second electronic component to electrically connect the first pads to the first bumps.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: October 31, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Youngmin Cho, Hongam Kim