Patents Examined by Laura M Dykes
  • Patent number: 11825708
    Abstract: A display panel includes a substrate including a component area, a display area at least partially surrounding the component area, and a first non-display area at least partially surrounding the display area. A first wiring is in the display area and extends in a first direction to face the component area. A second wiring is in the display area and extends in the first direction to face the component area. The second wiring is spaced apart from the first wiring with the component area therebetween. A pixel circuit is connected to one of the first and second wirings and includes at least one thin-film transistor. A display element is connected to the pixel circuit. A cross-sectional area of the first wiring crossing in a second direction that is perpendicular to the first direction is different from a cross-sectional area of the second wiring crossing in the second direction.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dokeun Song, Hyunah Sung, Sukyoung Yang, Dongmin Lee, Hyuneok Shin
  • Patent number: 11817054
    Abstract: A pixel structure includes an original light emitting diode die and a repairing light emitting diode die emitting light of a same color, and an extending conductor. The original light emitting diode die includes a first epitaxial layer, and a first electrode and a second electrode disposed at opposite sides of the first epitaxial layer. The repairing light emitting diode die includes a second epitaxial layer, and a third electrode and a fourth electrode disposed at a same side of the second epitaxial layer. The extending conductor includes a first portion, a second portion and a cut-off region. The first portion is electrically connected to the second electrode of the original light emitting diode die. The second portion is electrically connected to the third electrode of the repairing light emitting diode die. The cut-off region is located in the first portion or between the first portion and the second portion.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: November 14, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Yao-Jun Tsai
  • Patent number: 11805685
    Abstract: The present application relates to an electronic device. The electronic device includes a first electronic component and a second electronic component. The first electronic component includes a first pad area including first pads and second pads spaced apart from the first pads. A number of the first pads is greater than a number of the second pads. The second electronic component includes first bumps electrically connected to the first pads, and second bumps electrically connected to the second pads. Each of the second bumps has a bonding area greater than a bonding area of each of the first bumps. A conductive adhesive layer is disposed between the first electronic component and the second electronic component to electrically connect the first pads to the first bumps.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: October 31, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Youngmin Cho, Hongam Kim
  • Patent number: 11804460
    Abstract: Structures, methods and devices are disclosed, related to improved stack structures in electronic devices. In some embodiments, a stack structure includes a pad implemented on a substrate, the pad including a polymer layer having a side that forms an interface with another layer of the pad, the pad further including an upper metal layer over the interface, the upper metal layer having an upper surface. In some embodiments, the stack structure also includes a passivation layer implemented over the upper metal layer, the passivation layer including a pattern configured to provide a compressive force on the upper metal layer to thereby reduce the likelihood of delamination at the interface, the pattern defining a plurality of openings to expose the upper surface of the upper metal layer.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: October 31, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Jiro Yota, Dogan Gunes
  • Patent number: 11793060
    Abstract: An OLED display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to transfer a scan signal, a data line and a driving voltage line crossing the scan line and respectively configured to transfer a data voltage and a driving voltage, and a switching transistor electrically connected to the scan line and the data line and including a switching drain electrode configured to output the data voltage. The display also includes a driving transistor including a driving gate electrode, a driving drain electrode, and a driving source electrode electrically connected to the switching drain electrode. The display further includes a storage capacitor including a first storage electrode electrically connected to the driving gate electrode and a second storage electrode formed on the same layer as the driving voltage line.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: October 17, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myoung Geun Cha, Jin Goo Jung, Yoon Ho Khang, Se Mi Kim
  • Patent number: 11784096
    Abstract: A method for fabricating a semiconductor device including vertical transport fin field-effect transistors (VTFETs) is provided. The method includes forming a bottom spacer on a first device region associated with a first VTFET and a second device region associated with a second VTFET, forming a liner on the bottom spacer, on a first fin structure including silicon germanium (SiGe) formed in the first device region and on a second fin structure including SiGe formed in the second device region, and forming crystalline Ge having a hexagonal structure from the SiGe by employing a Ge condensation process to orient a (111) direction of the crystalline Ge in a direction of charge flow for a VTFET.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: October 10, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Choonghyun Lee, Pouya Hashemi, Takashi Ando
  • Patent number: 11774402
    Abstract: According to various embodiments, there is provided a sensor device that includes: a substrate and two semiconductor structures. Each semiconductor structure includes a source region and a drain region at least partially disposed within the substrate, a channel region between the source region and the drain region, and a gate region. A first semiconductor structure of the two semiconductor structures further includes a sensing element electrically connected to the first gate structure. The sensing element is configured to receive a solution. The drain regions of the two semiconductor structures are electrically coupled. The source regions of the two semiconductor structures are also electrically coupled. A mobility of charge carriers of the channel region of a second semiconductor structure of the two semiconductor structures is lower than a mobility of charge carriers of the channel region of the first semiconductor structure.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: October 3, 2023
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Lanxiang Wang, Bin Liu, Eng Huat Toh, Shyue Seng Tan, Kiok Boone Elgin Quek
  • Patent number: 11769717
    Abstract: There is provided a semiconductor device that includes a wiring layer, a plurality of bonding layers arranged on the wiring layer and having conductivity, and a semiconductor element having a rear surface facing the wiring layer and a plurality of pads provided on the rear surface, and bonded to the wiring layer via the plurality of bonding layers, wherein the plurality of bonding layers are arranged in a grid shape when viewed along a thickness direction, wherein each of the plurality of pads is electrically connected to a circuit formed inside the semiconductor element and any of the plurality of bonding layers, and wherein at least one of the plurality of pads is located to be spaced apart from the plurality of bonding layers when viewed along the thickness direction.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: September 26, 2023
    Assignee: ROHM CO., LTD.
    Inventor: Hiroyuki Shinkai
  • Patent number: 11765938
    Abstract: An organic light emitting diode display device includes: a substrate; a scan line configured to transfer a scan signal; a data line and a driving voltage line configured to transfer a data voltage and a driving voltage, respectively; a switching transistor including a switching drain electrode configured to output the data voltage; a driving transistor including a driving gate electrode connected with the switching drain electrode; a storage capacitor including a first storage electrode connected with the driving gate electrode and a second storage electrode connected with the driving voltage line; and an organic light emitting diode connected with a driving drain electrode of the driving transistor. The storage capacitor includes: a connector in which an edge of the second storage electrode is offset from an edge of the first storage electrode in a direction toward the center of the second storage electrode, and a storage compensator facing the connector.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: September 19, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventor: Chang Soo Pyon
  • Patent number: 11756967
    Abstract: A display device includes a first substrate having a display area and a non-display area adjacent to the display area, the first substrate including a substrate through-hole penetrating the first substrate in a thickness direction, an etching stopper disposed on a first surface of the first substrate, the etching stopper including a stopper through-hole that overlaps the substrate through-hole and penetrates the etching stopper in the thickness direction, a data line disposed on the etching stopper, a substrate connection electrode that fills the substrate through-hole and the stopper through-hole, the substrate connection electrode being disposed in the display area and electrically connected to the data line, and a first pad disposed on a second surface of the first substrate opposite to the first surface and overlapping the substrate connection electrode. The first pad is electrically connected to the substrate connection electrode.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Eun Kyung Yeon, Jung Hun Noh, Yi Joon Ahn, Jae Been Lee
  • Patent number: 11751463
    Abstract: An organic light emitting display apparatus and an electronic device including the same are provided. The organic light emitting display apparatus comprises an organic light emitting display panel including a display area and a non-display area, the display area including a transparent area, a buffer area provided outside the transparent area, and an opaque area provided outside the buffer area, a camera provided in the transparent area in a rear surface of the organic light emitting display panel to photograph a region in a forward direction with respect to the organic light emitting display panel, and a transparent area pixel driving circuit provided in the buffer area to drive a transparent area organic light emitting diode provided in the transparent area. The transparent area organic light emitting diode is connected to the transparent area pixel driving circuit through a transparent area electrode line.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: September 5, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Jeonghyeon Choi, Sul Lee, Eunil Cho
  • Patent number: 11744119
    Abstract: A display device includes a pixel circuit, a first line disposed on the pixel circuit and a second line disposed on a same layer as the first line. A light emitting element is disposed on the first line and the second line. A connection pattern is disposed on a same layer as the first line and the second line and is disposed between the first line and the second line. The connection pattern connects the pixel circuit and the light emitting element. The connection pattern has a polygonal shape including at least six sides. A first vertex of the connection pattern is positioned at a shortest distance from the first line to the connection pattern and portions of the connection pattern between the first vertex and adjacent vertices are positioned farther from the first line than the first vertex.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: August 29, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Keon Woo Kim, Deok-Young Choi
  • Patent number: 11742216
    Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: August 29, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
  • Patent number: 11742316
    Abstract: This application relates to semiconductor manufacturing, and more particularly to an interconnect structure for semiconductors with an ultra-fine pitch and a forming method thereof. The forming method includes: preparing copper nanoparticles using a vapor deposition device, where coupling parameters of the vapor deposition device are adjusted to control an initial particle size of the copper nanoparticles; depositing the copper nanoparticles on a substrate; invertedly placing a chip with copper pillars as I/O ports on the substrate; and subjecting the chip and the substrate to hot-pressing sintering to enable the bonding.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: August 29, 2023
    Assignee: GUANGDONG UNIVERSITY OF TECHNOLOGY
    Inventors: Yu Zhang, Chengqiang Cui, Peilin Liang, Jin Tong, Guannan Yang
  • Patent number: 11721619
    Abstract: A flexible circuit film includes the following elements: a base film; a first power input terminal, a second power input terminal, a first power output terminal, and a second power output terminal each disposed on the base film; an integrated circuit chip disposed between the first power input terminal and the first power output terminal and overlapping the base film; first power wiring disposed on the base film, connecting the first power input terminal to the first power output terminal, and including a first connection part; and second power wiring disposed on the base film, connecting the second power input terminal to the second power output terminal, and including a second connection part. The first connection part and the second connection part are disposed between the base film and the integrated circuit chip, overlap the integrated circuit chip, and are spaced from each other.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: August 8, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: BoYeon Kim, Whee-Won Lee, Myeong Su Kim, Sang Hyun Lee
  • Patent number: 11716882
    Abstract: A transparent display panel and a transparent display device including the same are disclosed. The transparent display panel includes a display region and a non-display region. The display region includes a plurality of light-emitting regions, a plurality of transmissive regions, a plurality of line regions spaced from each other and arranged in one direction, and a plurality of pixel circuit regions electrically connected to the light-emitting regions respectively to drive the light-emitting regions. Alternately-arranged adjacent line regions include alternately-arranged adjacent VSS voltage connection line and VDD voltage connection line, respectively. Thus, a new pixel arrangement structure that may increase or maximize a transparent area of a bezel and reduce or minimize a haze value without reducing transmittance of the display region may be realized.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: August 1, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Euitae Kim, Kiseob Shin, Soyi Lee
  • Patent number: 11706956
    Abstract: A display device with a reduced area of dead spaces and a low defect occurrence rate includes a substrate including a display area and a peripheral area; and a first insulating layer disposed over the peripheral area and including a first side surface portion, a second side surface portion, and at least one recess portion. The first side surface portion includes a side surface aligned with a side surface of the substrate, and the second side surface portion includes a side surface aligned with the side surface of the substrate and is spaced apart from the first side surface portion. A first pad is disposed on the first insulating layer, extends to an edge of the substrate, fills the at least one recess portion, and includes a front end surface aligned with the side surface of the substrate.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: July 18, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jinseon Kwak, Gyungsoon Park, Heejean Park
  • Patent number: 11699664
    Abstract: According to the various aspects, the present device includes a printed circuit board having a top surface and a bottom surface, with a plurality of semiconductor devices coupled to the top surface and a flexible electromagnetic shield wrap conformally positioned over and between the plurality of semiconductor devices and the top surface of the printed circuit board. The flexible electromagnetic shield wrap is conformally positioned by applying a vacuum and is removable after the vacuum seal is broken.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: July 11, 2023
    Assignee: Intel Corporation
    Inventors: Eng Huat Goh, Tin Poay Chuah, Yew San Lim, Min Suet Lim
  • Patent number: 11694893
    Abstract: The present invention relates to semiconductor manufacturing parts used in a dry etching process. Semiconductor manufacturing parts comprising a SiC deposition layer, of the present invention, comprises: a base material; and a SiC deposition layer formed on the surface of the base material, wherein the thickness ratio of the base material and the SiC deposition layer is 2:1 to 100:1.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: July 4, 2023
    Assignee: TOKAI CARBON KOREA CO., LTD.
    Inventors: Joung Il Kim, Ki Won Kim, Jong Hyun Kim
  • Patent number: 11688691
    Abstract: The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to forming via rail and deep via structures to reduce parasitic capacitances in standard cell structures. Via rail structures are formed in a level different from the conductive lines. The via rail structure can reduce the number of conductive lines and provide larger separations between conductive lines that are on the same interconnect level and thus reduce parasitic capacitance between conductive lines.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: June 27, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Cheng Lin, Cheng-Chi Chuang, Chih-Liang Chen, Charles Chew-Yuen Young, Hui-Ting Yang, Wayne Lai