Abstract: A micro light-emitting device includes a micro light-emitting diode and a light-emitting structure. The micro light-emitting diode includes a semiconductor light-emitting unit that emits an excitation light having a first wavelength. The light-emitting structure is disposed on the micro light-emitting diode, and is configured to be excited by the excitation light to emit an excited light having a second wavelength. The light-emitting structure is a multiple quantum well structure. A display including the micro light-emitting device is also disclosed.

Abstract: A microelectronics package, comprising a substrate comprising a first bondpad and a second bondpad over a dielectric. An inductor comprising at least one wire extends over the dielectric. The at least one wire has a first end coupled to the first bondpad and a second end coupled to the second bondpad, and an inductor core layer over the dielectric. The inductor core layer comprises a magnetic material. At least a portion of the inductor extends within the inductor core layer.

Abstract: A package substrate may include a build-up layer. The build-up layer may include a dielectric material and one or more microspheres. The one or more microspheres may include a magnetic core that includes a first material that is a first oxidation-resistant material. Further, the one or more microspheres may include a shell to encapsulate the core, and the shell may include a second material that is a second oxidation-resistant material. The package substrate may further include a metal layer coupled with the build-up layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a first dielectric layer over the substrate. The semiconductor device structure also includes a first conductive feature and a second conductive feature surrounded by the first dielectric layer and a second dielectric layer over the first dielectric layer. The semiconductor device structure further includes a resistive element having a first portion over the second dielectric layer and a second portion penetrating through the second dielectric layer to be electrically connected to the first conductive feature. In addition, the semiconductor device structure includes a conductive via penetrating through the second dielectric layer to be electrically connected to the second conductive feature. The second portion of the resistive element is wider than the conductive via.

Abstract: A planarization method including the following steps is provided. A substrate is provided. The substrate includes a first region and a second region. A material layer is formed on the substrate. The top surface of the material layer in the first region is lower than the top surface of the material layer in the second region. A patterned photoresist layer is formed on the material layer in the first region. A first etching process is performed on the patterned photoresist layer, so that the top surface of the patterned photoresist layer and the top surface of the material layer in the second region have substantially the same height. A second etching process is performed on the patterned photoresist layer and the material layer. In the second etching process, the etching rate of the patterned photoresist layer is substantially the same as the etching rate of the material layer.

Abstract: An integrated circuit product includes a first layer of insulating material including a first insulating material. The first layer of insulating material is positioned above a device layer of a semiconductor substrate. The first layer of insulating material has a lowermost surface positioned above an uppermost surface of a gate of a transistor in a device layer of a semiconductor substrate. The device layer includes transistors. A metallization blocking structure is positioned in an opening in the first layer of insulating material. The metallization blocking structure has a lowermost surface above the uppermost surface of the gate and includes a second insulating material that is different from the first insulating material. The metallization blocking structure includes a second insulating material that is different from the first insulating material. A metallization trench is defined in the first layer of insulating material on opposite sides of the metallization blocking structure.

Abstract: Disclosed herein are IC structures, packages, and devices that include III-N transistors integrated on the same support structure as non-III-N transistors (e.g., Si-based transistors), using semiconductor layer transfer. In one aspect, a non-III-N transistor may be integrated with an III-N transistor by, first, depositing a semiconductor material layer, a portion of which will later serve as a channel material of the non-III-N transistor, on a support structure different from that on which the III-N semiconductor material for the III-N transistor is provided, and then performing layer transfer of said semiconductor material layer to the support structure with the III-N material, e.g., by oxide-to-oxide bonding, advantageously enabling implementation of both types of transistors on a single support structure.

Abstract: A light emitting device includes a backplane, an array of light emitting diodes attached to a frontside of the backplane, a positive tone, imageable dielectric material layer, such as a positive photoresist layer, located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, such that sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile, and at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes.

Abstract: A heterostructure with reduced optical losses is disclosed. The heterostructure includes a set of n-type layers; an active region that generates radiation at a peak emitted wavelength; and a set of p-type layers located adjacent to the active region. A reflective structure can be located adjacent to the set of p-type layers. A thickness of the set of p-type layers can be configured to promote constructive interference of the reflected radiation with radiation emitted by the active region in a direction toward the set of n-type layers.

Abstract: A method for manufacturing a light-emitting device, includes: forming a semiconductor stack on a substrate, wherein the semiconductor stack includes a first semiconductor layer, a second semiconductor layer and an active region formed therebetween; removing portions of the semiconductor stack to form a plurality of mesas and exposing a part of the first semiconductor layer, wherein the part of the first semiconductor layer includes a first portion and a second portion; forming a plurality of trenches by removing the first portion of the part of the first semiconductor to exposing a top surface of the substrate and a side wall of the first semiconductor, wherein the plurality of trenches defining a plurality of light-emitting units in the semiconductor stack; wherein in a top view, the plurality of trenches includes a first trench extending along a first direction and a second trench extending along a second direction not parallel with the first trench; and wherein the second trench includes an end; forming co

Abstract: A micro-light emitting diode includes a mesa structure that includes a first set of one or more semiconductor layers, an active layer configured to emit light, a second set of one or more semiconductor layers on the active layer, and a dielectric layer in sidewall regions of the mesa structure. A center region of the second set of one or more semiconductor layers is thicker than a sidewall region of the second set of one or more semiconductor layers, such that a distance from a surface of the sidewall region of the second set of one or more semiconductor layers to the active layer is less than a distance from a surface of the center region of the second set of one or more semiconductor layers to the active layer, thereby forming a surface potential-induced lateral potential barrier at a sidewall region of the active layer.

Abstract: According to one embodiment, a display device includes first semiconductor layers crossing a first scanning line in a non-display area, the first semiconductor layers being a in number, second semiconductor layers crossing a second scanning line in the non-display area, the second semiconductor layers being b in number, and an insulating film disposed between the first and second semiconductor layers and the first and second scanning lines, wherein a and b are integers greater than or equal to 2, and a is different from b, and the first and second semiconductor layers are both entirely covered with the insulating film.

Abstract: A light-emitting diode structure, a fabrication method therefor, and a display panel. The light-emitting diode structure includes: a base substrate; and a first electrode layer, a light-emitting layer and a second electrode layer that are successively stacked on the base substrate, wherein the second electrode layer includes a first coarse surface that is located at a side far from the base substrate.

Abstract: A micro light-emitting diode display panel including first and second substrates, micro light-emitting diodes, a wavelength conversion layer, a light-shielding pattern layer, a light filter layer, and an air gap is provided. The micro light-emitting diodes are disposed on the first substrate and respectively located in a plurality of sub-pixel areas. The micro light-emitting diodes are adapted to emit a light beam. The wavelength conversion layer is overlapped with at least a portion of the micro light-emitting diodes. The light beam is used to excite the wavelength conversion layer to emit a converted light beam. The light filter layer is disposed between the wavelength conversion layer and the second substrate and overlapped with the micro light-emitting diodes. The air gap is disposed between any two adjacent ones of any one of the micro light-emitting diodes, the second substrate, the wavelength conversion layer, and the light filter layer.

Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.

Abstract: A light emitting diode includes an n-type structure, a p-type structure, and an active-region sandwiched between the n-type structure and the p-type structure; a p-contact layer formed on the p-type structure; and a p-ohmic contact of a thickness in the range of 0.2-100 nm formed on the p-contact layer, wherein the p-ohmic contact comprises one or more layer of metal oxide.

Abstract: A process comprising the following steps of: a) providing a device comprising: a GaN/InGaN structure comprising an electrically conductive doped GaN layer locally covered with InGaN mesas comprising a doped InGaN layer and an undoped or weakly doped InGaN layer, an electrically insulating layer covering the electrically conductive doped GaN layer between the mesas, b) connecting the electrically conductive doped GaN layer and a counter-electrode (500) to a voltage or current generator, c) dipping the device and the counter-electrode into an electrolyte solution, d) applying a voltage or current between the electrically conductive doped GaN layer and the second electrode to porosify the doped InGaN layer, e) forming an InGaN layer by epitaxy on the InGaN mesas, whereby a relaxed epitaxially grown InGaN layer is obtained.

Abstract: A display device and a manufacturing method thereof are disclosed. The display device may include a pixel circuit layer including a plurality of transistors, a first partition wall and a second partition wall on the pixel circuit layer, and each protruding in a thickness direction, a first electrode and a second electrode formed on the same layer, and on the first partition wall and the second partition wall, respectively; a light emitting element between the first electrode and the second electrode; and a first organic pattern directly on the light emitting element.

Abstract: Embodiments of a silicon heat-dissipation package for compact electronic devices are described. In one aspect, a device includes first and second silicon cover plates. The first silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The second silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The first primary side of the second silicon cover plate includes an indentation configured to accommodate an electronic device therein. The first primary side of the second silicon cover plate is configured to mate with the second primary side of the first silicon cover plate when the first silicon cover plate and the second silicon cover plate are joined together with the electronic device sandwiched therebetween.

Abstract: A projector color wheel, including: a substrate; a first film for changing a wavelength of light, provided on the substrate, including a first material including a plurality of first quantum dots of a first quantum dot type, the plurality of first quantum dots being configured to emit light according to a first emission profile with at least a first emission peak at a first emission wavelength when light of a predetermined wavelength incidents; a second film for changing a wavelength of light, provided on the substrate, including a second material, the second material being configured to emit light according to a second emission profile with at least a second emission peak at a second emission wavelength when light of the predetermined wavelength incidents; wherein each of the first film and the second film includes a binding material; and wherein the first emission wavelength is larger than the second emission wavelength.