Patents Examined by Matthew Song
  • Patent number: 8641822
    Abstract: An improvement to a method and an apparatus for growing a monocrystalline silicon ingot from silicon melt according to the CZ process. The improvement performs defining an error between a target taper of a meniscus and a measured taper, and translating the taper error into a feedback adjustment to a pull-speed of the silicon ingot. The conventional control model for controlling the CZ process relies on linear control (PID) controlling a non-linear system of quadratic relationship defined in the time domain between the diameter and the pull-speed. The present invention transforms the quadratic relationship in the time domain between the diameter and the pull-speed into a simile, linear relationship in the length domain between a meniscus taper of the ingot and the pull-speed.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: February 4, 2014
    Assignee: Sumco Phoenix Corporation
    Inventors: Benno Orschel, Joel Kearns, Keiichi Takanashi, Volker Todt
  • Patent number: 8636843
    Abstract: Heterogeneous nanowires having a core-shell structure consisting of single-crystal apatite as the core and graphitic layers as the shell and a synthesis method thereof are provided. More specifically, provided is a method capable of producing large amounts of heterogeneous nanowires, composed of graphitic shells and apatite cores, in a reproducible manner, by preparing a substrate including an element corresponding to X of X6(YO4)3Z which is a chemical formula for apatite, adding to the substrate a gaseous source containing an element corresponding to Y of the chemical formula, adding thereto a gaseous carbon source, and allowing these reactants to react under optimized synthesis conditions using chemical vapor deposition (CVD), and to a method capable of freely controlling the structure and size of the heterogeneous nanowires and also to heterogeneous nanowires synthesized thereby.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: January 28, 2014
    Assignee: Korea Institute of Energy Research
    Inventors: Nam Jo Jeong, Jung Hoon Lee
  • Patent number: 8636844
    Abstract: A method of forming a template on a silicon substrate includes epitaxially growing a template of single crystal ternary rare earth oxide on a silicon substrate and epitaxially growing a single crystal semiconductor active layer on the template. The active layer has either a cubic or a hexagonal crystal structure. During the epitaxial growth of the template, a partial pressure of oxygen is selected and a ratio of metals included in the ternary rare earth oxide is selected to match crystal spacing and structure of the template at a lower interface to the substrate and to match crystal spacing and structure of the template at an upper interface to crystal spacing and structure of the semiconductor active layer. A high oxygen partial pressure during growth of the template produces a stabilized cubic crystal structure and a low oxygen partial pressure produces a predominant peak with a hexagonal crystal structure.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: January 28, 2014
    Assignee: Translucent, Inc.
    Inventors: Rytis Dargis, Andrew Clark, Michael Lebby
  • Patent number: 8623139
    Abstract: An apparatus for producing polycrystalline silicon which heats a silicon seed rod in a reactor to which a raw material gas is supplied, and deposits polycrystalline silicon on the surface of the silicon seed rod, includes an electrode extending in a vertical direction to hold the silicon seed rod, an electrode holder having a cooling flow passage circulating a cooling medium formed therein, and inserted into a through-hole formed in a bottom plate of the reactor to hold the electrode, and an annular insulating material arranged between an inner peripheral surface of the through-hole and an outer peripheral surface of the electrode holder to electrically insulate the bottom plate and the electrode holder from each other.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: January 7, 2014
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshihide Endoh, Masayuki Tebakari, Toshiyuki Ishii, Masaaki Sakaguchi
  • Patent number: 8617313
    Abstract: A system for preparing a semiconductor film, the system including: a laser source; optics to form a line beam, a stage to support a sample capable of translation; memory for storing a set of instructions, the instructions including irradiating a first region of the film with a first laser pulse to form a first molten zone, said first molten zone having a maximum width (Wmax) and a minimum width (Wmin), wherein the first molten zone crystallizes to form laterally grown crystals; laterally moving the film in the direction of lateral growth a distance greater than about one-half Wmax and less than Wmin; and irradiating a second region of the film with a second laser pulse to form a second molten zone, wherein the second molten zone crystallizes to form laterally grown crystals that are elongations of the crystals in the first region, wherein laser optics provide Wmax less than 2×Wmin.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: December 31, 2013
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: James S. Im, Paul C. Van Der Wilt
  • Patent number: 8586488
    Abstract: A computer program product and system for configuring J electromagnetic radiation sources (J?2) to simultaneously irradiate a substrate. Each source has a different function of wavelength and angular distribution of emitted radiation. The substrate includes a base layer and I stacks (I?2) thereon. Pj denotes a same source-specific normally incident energy flux on each stack from source j. For simultaneous exposure of the I stacks to radiation from the J sources, Pj is computed such that an error E being a function of |W1?S1|, |W2?S2|, |WI?SI| is about minimized with respect to Pj (j=1, . . . , J). Wi and Si respectively denote an actual and target energy flux transmitted into the substrate via stack i (i=1, . . . , I). The stacks are exposed to the radiation from the sources characterized by the computed Pj (j=1, . . . , J).
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: November 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Brent Alan Anderson, Edward Joseph Nowak
  • Patent number: 8580035
    Abstract: Reducing the microvoid (MV) density in AlN ameliorates numerous problems related to cracking during crystal growth, etch pit generation during the polishing, reduction of the optical transparency in an AlN wafer, and, possibly, growth pit formation during epitaxial growth of AlN and/or AlGaN. This facilitates practical crystal production strategies and the formation of large, bulk AlN crystals with low defect densities—e.g., a dislocation density below 104 cm?2 and an inclusion density below 104 cm?3 and/or a MV density below 104 cm?3.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: November 12, 2013
    Assignee: Crystal IS, Inc.
    Inventors: Robert Bondokov, Kenneth E. Morgan, Glen A. Slack, Leo J. Schowalter
  • Patent number: 8568530
    Abstract: Precursors suitable for chemical vapor deposition, especially ALD, of hafnium oxide or zirconium oxide, have the general formula: (R1Cp)2MR2 wherein Cp represents a cyclopentadienyl ligand, R1 is H or a substituting alkyl group, alkoxy group or amido group of the Cp ligand, R2 is an alkyl group, an alkoxy group or an amido group and M is hafnium or zirconium.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: October 29, 2013
    Assignee: Sigma-Aldrich Co. LLC
    Inventors: Peter Nicholas Heys, Paul Williams, Fuquan Song
  • Patent number: 8555674
    Abstract: A quartz glass crucible for silicon single crystal pulling operation that by a simple arrangement, attains prevention of any collapse onto the inside at a superior edge of straight trunk part; and a process for manufacturing the same. The quartz glass crucible for silicon single crystal pulling operation having a straight trunk part and a bottom part, is characterized in that at least the straight trunk part is provided with a gradient of fictive temperature so that the fictive temperature on the outermost side thereof is 25° C. or more lower than the fictive temperature on the innermost side thereof.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: October 15, 2013
    Assignees: Heraeus Quarzglas GmbH & Co. KG, Shin-Etsu Quartz Products Co., Ltd.
    Inventor: Yasuo Ohama
  • Patent number: 8545621
    Abstract: Using a helium cryostat, the temperature for a substrate wafer(s) is reduced to 2.2 Kelvin over a period of twenty-four hours. Next, a soak segment will hold the temperature of the substrate wafer at 2.2 Kelvins for a period of ninety-six hours. At these low temperatures, alloys such as GaAs, InP, and GaP will form dipole molecular moments, which will re-align along lines of internal magnetic force as molecular bonds condense. Next the substrate wafer's temperature is ramped up to room temperature over a period of twenty-four hours. Next, the temperature of the substrate wafer is ramped up to assure that the temperature gradients made to occur within the wafer are kept low. Typically, a temper ramp up temperature will range between 300° F. to 1100° F. and depends upon the single crystal material used to construct the substrate wafer. Next, the substrate wafer undergoes a temper hold segment, which assures that the entire substrate wafer has had the benefit of the tempering temperature.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: October 1, 2013
    Assignee: OPC Laser Systems LLC
    Inventor: Joseph Reid Henrichs
  • Patent number: 8529696
    Abstract: A method for producing hexagonal boron nitride single crystals including mixing boron nitride crystals with a solvent thereby obtaining a mixture, heating and melting the mixture under high-temperature and high-pressure thereby obtaining a melted mixture, and recrystallizing the melted mixture thereby producing hexagonal boron nitride single crystals, wherein the solvent is boronitride of alkaline earth metal, or boronitride of alkali metal and the boronitride of alkaline earth metal.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: September 10, 2013
    Assignee: National Institute for Materials Science
    Inventors: Kenji Watanabe, Takashi Taniguchi, Satoshi Koizumi, Hisao Kanda, Masayuki Katagiri, Takatoshi Yamada, Nesladek Milos
  • Patent number: 8529698
    Abstract: Methods, devices, and compositions of matter related to high efficiency InGaN-based photovoltaic devices. The disclosed synthesis of semiconductor heterostructures may be exploited to produce higher efficiency, longer lasting, photovoltaic cells.
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: September 10, 2013
    Assignee: Arizona Board Of Regents For And On Behalf Of Arizona State University
    Inventors: Fernando A. Ponce, Rafael Garcia
  • Patent number: 8529697
    Abstract: A process for growing a crystal of a nitride semiconductor in which after the step of mounting a substrate (12) in a reaction tube (11), the step of feeding a first material gas containing a Group 3 element onto the substrate in the reaction tube and the step of feeding a second material gas containing elemental nitrogen onto the substrate in the reaction tube are carried out alternately to deposit a nitride semiconductor crystal directly on the substrate. The number of moles of the elemental nitrogen contained in the second material gas has a ratio of 200 or more to the number of moles of the Group 3 element in the first material gas.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: September 10, 2013
    Assignees: Honda Motor Co., Ltd.
    Inventors: Hideki Hashimoto, Akihiko Horiuchi, Hideo Kawanishi
  • Patent number: 8506705
    Abstract: A nitride single crystal is produced on a seed crystal substrate 5 in a melt containing a flux and a raw material of the single crystal in a growing vessel 1. The melt 2 in the growing vessel 1 has temperature gradient in a horizontal direction. In growing a nitride single crystal by flux method, adhesion of inferior crystals onto the single crystal is prevented and the film thickness of the single crystal is made constant.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: August 13, 2013
    Assignee: NGK Insulators, Ltd.
    Inventors: Mikiya Ichimura, Katsuhiro Imai, Makoto Iwai, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura, Yasuo Kitaoka
  • Patent number: 8491719
    Abstract: The present invention provides a high resistivity, high quality, large size SiC single crystal, SiC single crystal wafer, and method of production of the same, that is, a silicon carbide single crystal containing uncompensated impurities in an atomic number density of 1×1015/cm3 or more and containing vanadium in an amount less than said uncompensated impurity concentration, silicon carbide single crystal wafer obtained by processing and polishing the silicon carbide single crystal and having an electrical resistivity at room temperature of 5×103 ?cm or more, and a method of production of a silicon carbide single crystal.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: July 23, 2013
    Assignee: Nippon Steel & Sumitomo Metal Corporation
    Inventors: Masashi Nakabayashi, Tatsuo Fujimoto, Mitsuru Sawamura, Noboru Ohtani
  • Patent number: 8491718
    Abstract: A method is disclosed for making semiconductor films from a eutectic alloy comprising a metal and a semiconductor. Through heterogeneous nucleation said film is deposited at a deposition temperature on relatively inexpensive buffered substrates, such as glass. Specifically said film is vapor deposited at a fixed temperature in said deposition temperature where said deposition temperature is above a eutectic temperature of said eutectic alloy and below a temperature at which the substrate softens. Such films could have widespread application in photovoltaic and display technologies.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: July 23, 2013
    Inventors: Karin Chaudhari, Ashok Chaudhari, Pia Chaudhari
  • Patent number: 8475593
    Abstract: In a crystal preparing device, a crucible holds a mixed molten metal containing alkali metal and group III metal. A container has a container space contacting the mixed molten metal and holds a molten alkali metal between the container space and an outside of the container, the molten alkali metal contacting the container space. A gas supply device supplies nitrogen gas to the container space. A heating device heats the crucible to a crystal growth temperature. The crystal preparing device is provided so that a vapor pressure of the alkali metal which evaporates from the molten alkali metal is substantially equal to a vapor pressure of the alkali metal which evaporates from the mixed molten metal.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: July 2, 2013
    Assignee: Ricoh Company, Ltd.
    Inventors: Hirokazu Iwata, Seiji Sarayama, Akihiro Fuse
  • Patent number: 8454747
    Abstract: A method for producing a single-crystal thin film includes, for example, applying a chemical solution containing raw materials for a single-crystal thin film composed of (BaxSryCaz)TiO3 (wherein x+y+z=1.0) by spin coating on a thin film composed of BaZrO3 formed on a MgO(100) surface of a MgO(100) substrate and subjecting the applied chemical solution to heat treatment at a temperature at which orientation occurs, thereby epitaxially growing a single-crystal thin film composed of (BaxSryCaz)TiO3.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: June 4, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tadasu Hosokura
  • Patent number: 8449679
    Abstract: A temperature-controlled hot edge ring assembly adapted to surround a semiconductor substrate supported in a plasma reaction chamber is provided. A substrate support with an annular support surface surrounds a substrate support surface. A radio-frequency (RF) coupling ring overlies the annular support surface. A lower gasket is between the annular support surface and the RF coupling ring. The lower gasket is thermally and electrically conductive. A hot edge ring overlies the RF coupling ring. The substrate support is adapted to support a substrate such that an outer edge of the substrate overhangs the hot edge ring. An upper thermally conductive medium is between the hot edge ring and the RF coupling ring. The hot edge ring, RF coupling ring and annular support surface can be mechanically clamped. A heating element can be embedded in the RF coupling ring.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: May 28, 2013
    Assignee: Lam Research Corporation
    Inventor: Rajinder Dhindsa
  • Patent number: 8435346
    Abstract: A phase modulation element according to the present invention has a first area having a first phase value based on a phase modulation unit having a predetermined size and a second area having a second phase value based on the phase modulation unit having the predetermined size, and each phase distribution is defined by a change in area shares of the first area and the second area depending on each position.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: May 7, 2013
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Masakiyo Matsumura, Yukio Taniguchi