Patents Examined by Michelle T Bechtold
  • Patent number: 11468145
    Abstract: Some embodiments provide a neural network inference circuit (NNIC) for executing a NN that includes multiple computation nodes at multiple layers. Each of a set of the computation nodes includes a dot product of input values and weight values. The NNIC includes a set of dot product cores, each of which includes (i) partial dot product computation circuits to compute dot products between input values and weight values and (ii) memories to store the sets of weight values and sets of input values for a layer of the neural network. The input values for a particular layer are arranged in a plurality of two-dimensional grids. A particular core stores all of the input values of a subset of the two-dimensional grids. Input values having a same set of coordinates in each respective grid of the subset of the two-dimensional grids are stored sequentially within the memories of the particular core.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: October 11, 2022
    Assignee: PERCEIVE CORPORATION
    Inventors: Kenneth Duong, Jung Ko, Steven L. Teig
  • Patent number: 11467804
    Abstract: A computer-implemented method for programming an integrated circuit includes receiving a program design and determining one or more addition operations based on the program design. The method also includes performing geometric synthesis based on the one or more addition operations by determining a plurality of bits associated with the one or more addition operations and defining a plurality of counters that includes the plurality of bits. Furthermore, the method includes generating instructions configured to cause circuitry configured to perform the one or more addition operations to be implemented on the integrated circuit based on the plurality of counters. The circuitry includes first adder circuitry configured to add a portion of the plurality of bits and produce a carry-out value. The circuitry also includes second adder circuitry configured to determine a sum of a second portion of the plurality of bits and the carry-out value.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: October 11, 2022
    Assignee: Intel Corporation
    Inventors: Sergey Vladimirovich Gribok, Gregg William Baeckler, Martin Langhammer
  • Patent number: 11449309
    Abstract: A hardware module comprising circuitry configured to: store a sequence of n bits in a register of the hardware module; generate a signed integer comprising a magnitude component and a sign bit by: if the most significant bit of the sequence of n bits is equal to one: set each of the n?1 of the most significant bits of the magnitude component to be equal to the corresponding bit of the n?1 least significant bits of the sequence of n bits; and set the sign bit to be zero; if the most significant bit of the sequence of n bits is equal to zero: set each of the n?1 of the most significant bits of the magnitude component to be equal to the inverse of the corresponding bit of the n?1 least significant bits of the sequence of n bits; and set the sign bit to be one.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: September 20, 2022
    Assignee: GRAPHCORE LIMITED
    Inventors: Stephen Felix, Mrudula Gore
  • Patent number: 11442643
    Abstract: A system and method for processing unstructured source data is described. Input data having a range of V is loaded from off-chip storage to on-chip storage. The input data is partitioned into P temporary parent partitions via the on-chip storage, where a particular one of the P temporary parent partitions has a range of V/P. The P temporary parent partitions are stored from the on-chip storage to the off-chip storage. The P temporary parent partitions are partitioned for generating P temporary child partitions until the target number of T partitions is generated, where data from of the P temporary parent partitions is source data for recursively loading, partitioning, and storing the source data. An application is configured to access partitioned data from the T partitions for generating an output. The accesses of the partitioned data are sequential read accesses of the off-chip storage.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: September 13, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Oluwole Jaiyeoba, Nima Elyasi, Changho Choi
  • Patent number: 11422740
    Abstract: A RAID storage-device-assisted data update system includes a RAID storage controller coupled to first RAID storage devices each including respective first RAID storage subsystems. Each first RAID storage devices receives a command from the RAID storage controller that identifies a second RAID buffer subsystem as a target memory location and, in response, retrieves respective first RAID storage device data from its respective first RAID storage subsystem and performs DMA operations to provide that first RAID storage device data on the second RAID buffer subsystem. A second RAID storage device that includes the second RAID buffer subsystem and a second RAID storage subsystem receives a command from the RAID storage controller and, in response, performs an XOR operation using the first RAID storage device data in the second RAID buffer subsystem to produce update data that it stores in its second RAID storage subsystem.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: August 23, 2022
    Assignee: Dell Products L.P.
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Patent number: 11416148
    Abstract: A system and a method are disclosed that provides atomicity for large data writes to persistent memory of an object storage system. A segment of persistent memory is allocated to an application. The persistent memory includes non-volatile memory that is accessible in a random access, byte-addressable manner. The segment of persistent memory is associated with first and second bits of a bitmap. The first bit is set indicating that the segment of persistent memory has been allocated. Data is received from the application for storage in the segment of persistent memory, and the second bit is set indicating that data in the segment of persistent memory has been finalized and is ready for storage in a storage medium that is different from persistent memory. The atomicity of the data in persistent memory may be determined based on the first bit and the second bit being set.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: August 16, 2022
    Inventors: Angel Benedicto Aviles, Jr., Vinod Kumar Daga, Vamsikrishna Sadhu, Tejas Hunsur Krishna
  • Patent number: 11409467
    Abstract: According to one embodiment, a memory system determines, for each of groups corresponding to streams, whether or not a length of write data associated with a set of write commands belonging to a same group reaches a minimum write size of a nonvolatile memory. When a length of write data associated with a set of write commands belonging to a first group corresponding to a first stream reaches the minimum write size, the memory system transfers the write data associated with the set of write commands belonging to the first group from a write buffer in a memory of the host to a first buffer in the memory system, and writes the write data transferred to the first buffer to a first write destination block corresponding to the first stream.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: August 9, 2022
    Assignee: Kioxia Corporation
    Inventor: Shinichi Kanno
  • Patent number: 11403182
    Abstract: A method for managing data includes obtaining, by a first storage controller, a write request associated with an object from a host, applying an erasure coding procedure to data associated with the write request to obtain a plurality of data chunks and at least one parity chunk, wherein object comprises the data, deduplicating the plurality of data chunks to obtain a plurality of deduplicated data chunks, generating storage metadata associated with the plurality of data chunks and the at least one parity chunk, generating an object entry associated with the plurality of data chunks, storing, across a first plurality of persistent storage devices, the plurality of deduplicated data chunks and the at least one parity chunk, and storing, via a continuous data protection interceptor executing on the first storage controller, in at least one of a second plurality of persistent storage devices the object entry.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: August 2, 2022
    Assignee: DELL PRODUCTS L.P.
    Inventors: Dharmesh M. Patel, Rizwan Ali, Ravikanth Chaganti
  • Patent number: 11400655
    Abstract: According to examples, an apparatus may include a fabricating system, a processor, and on memory on which are stored machine readable instructions. The instructions, when executed by the processor, may cause the processor to control the fabricating system to spread a first layer of build material as part of an object fabrication process, the build material comprising particles or a paste. The instructions may also cause the processor to control the fabricating system to selectively solidify a first area of the layer to a higher degree of solidification than a predefined second area encompassed by the first area, in which the predefined second area has a lower fracture toughness than the first area to propagate a crack in the object more readily than the first area.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: August 2, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wei Huang, Gary J. Dispoto
  • Patent number: 11403233
    Abstract: An aspect of determining per volume exclusive capacity in a deduplication system includes setting a percentage of a population of pages for selection. For each of the pages, an aspect includes selecting a page in the population, providing a data segment facilitating multiple references of the segment by at least one storage entity, maintaining counts corresponding with each segment in the page, and determining exclusive ownership of the page based on the counts and a key value of one of a plurality of storage entities.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: August 2, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Uri Shabi, Ronen Gazit
  • Patent number: 11385612
    Abstract: Systems and methods for setting up and operating a motor control system are provided. Such systems and methods can include a parent device that includes a digital library of control commands and a child device. A child device can transmit a unique identification code to the parent device and the parent device can identify, from the digital library, a group of control commands specific to the child device using the unique identification code, generate an address for the child device, and transmit a copy of the address to the child device for storage thereon. The parent device can transmit a control signal that includes the address and one of the control commands from the first group to the child device and, responsive thereto, the child device can perform an action when the address matches the copy of the address stored on the child device.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: July 12, 2022
    Assignee: METROPOLITAN INDUSTRIES, INC.
    Inventor: James Andrew Nimmer
  • Patent number: 11383451
    Abstract: A method of 3D printing an object includes receiving design information corresponding to an object for which a printed object is to be generated by a 3D printing operation according to a first set of print instructions, generating a plurality of measurement locations, printing successive layers which form the object, measuring the object at the measurement locations to form measurement data, comparing the measurement data with expected measurements of the measurement locations based on the design information, and generating, based on the comparing, deviation information. The measurement locations represent locations of the object to be measured by a measurement device. The deviation information represents deviations between the printed object following completion of the printing, and the object represented by the design information.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: July 12, 2022
    Assignee: Markforged, Inc.
    Inventors: Bruce David Jones, Corey Hazeltine Walsh, Yongquan Lu, Maggie Su
  • Patent number: 11385822
    Abstract: Techniques for processing data involve: receiving a request for moving data from a first slice group in a first logical unit to a second logical unit; determining, based on the request, a second slice group from the second logical unit, the size of the second slice group being larger than or equal to the size of the first slice group; and moving data in the first slice group into the second slice group. Such techniques enable moving data into slices in a specified address range in a specified logical unit, moving data into appropriate slices in a target logical unit when data cannot be moved to slices in a specific address range because an address range is not specified or a specified address range is unavailable can be achieved, and moving disk extents (DEs) by a Redundant Array of Multi-Core Disks (MCR) and redistributing IOs between disk extents.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: July 12, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Rongrong Shang, Haiying Tang, Xiaobo Zhang, Shuai Ni, Changrui Shao
  • Patent number: 11372583
    Abstract: To appropriately access data managed before a supply of power is stopped. A storage device that receives an I/O request from a host computer and performs an I/O processing in response to the I/O request includes a CPU, a nonvolatile medium, and a memory having access performance higher than that of the nonvolatile medium. The CPU stores control information about a control for performing the I/O processing in the memory and the nonvolatile medium. The control information stored in the nonvolatile medium includes address conversion information for converting a physical address of a drive in which target data of the I/O request is stored and a logical address that indicates a logical area of data stored in the physical address.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: June 28, 2022
    Assignee: HITACHI, LTD.
    Inventors: Sachie Tajima, Shintaro Ito
  • Patent number: 11366443
    Abstract: Fail operational that can guarantee stability of control while suppressing cost increase is difficult. A control controller according to the present invention stores information necessary for recovery in a normal travel mode in time series in a backup, and thus control software can be recovered from the backup in real time if a failure occurs in the system.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: June 21, 2022
    Assignee: HITACHI, LTD.
    Inventors: Tasuku Ishigooka, Yuki Horita
  • Patent number: 11354244
    Abstract: Memory modules and associated devices and methods are provided using a memory copy function between a cache memory and a main memory that may be implemented in hardware. Address translation may additionally be provided.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: June 7, 2022
    Assignee: Intel Germany GmbH & Co. KG
    Inventors: Ritesh Banerjee, Jiaxiang Shi, Ingo Volkening
  • Patent number: 11340807
    Abstract: The disclosure herein describes mounting a shared data store, remote from a client cluster, as a remote data store on the client cluster. An abstraction interface of the remote data store on the client cluster is configured to receive data operations that are in a local data store-based format. A control path interface is established between the server cluster and the client cluster, and network location data associated with the shared data store is received by the client cluster via the established control path interface. Based on the network location data, a data path interface is established between the client cluster and the shared data store of the server cluster, whereby data operations directed to the abstraction interface of the remote data store on the client cluster are routed to the shared data store of the server cluster via the established data path interface.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: May 24, 2022
    Assignee: VMware, Inc.
    Inventors: Peng Dai, Mansi Shah
  • Patent number: 11341043
    Abstract: A storage device includes a non-volatile memory including a plurality of memory blocks. The storage device performs an alignment operation in response to receipt of an align command. The alignment operation converts a received logical address of a logical segment into a physical address and allocates the physical address to a physical block address corresponding to a free block. The storage device is further configured to performs a garbage collection in units of the physical block address that indicates one memory block.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: May 24, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoung-Geun Kim, In-Hwan Doh, Joo-Young Hwang, Seung-Uk Shin, Min-Seok Ko, Jae-Yoon Choi
  • Patent number: 11327688
    Abstract: Systems, methods, and computer-readable media for managing a placement of data items on a distributed storage system. In some examples, a method can include determining a location of a master copy of a data item on a distributed storage system, the location including a data store on the distributed storage system; determining an access pattern associated with the master copy of the data item, the access pattern including originating locations of access requests received by the distributed storage system for the master copy of the data item and a respective number of access requests received from each of the originating locations; determining, based on the access pattern, a different location on the distributed storage system for storing the master copy of the data item, the different location including a different data store on the distributed storage system; and placing the master copy of the data item at the different location.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: May 10, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Dominik Rene Tornow, Urmil Vijay Dave
  • Patent number: 11327897
    Abstract: The present technology relates to an electronic device. A memory controller instructs to perform a dummy read operation on a shared block after an operation is performed on a target block. The memory controller that controls a memory device including a plurality of memory blocks may include a flash translation layer that translates a logical block address received from a host into a physical block address and generates translation information on the translated physical block address and a dummy read controller configured to output, to the memory device, a dummy read command to perform a dummy read operation on a sharing block selected together with a target block after an operation corresponding to a request received from the host is performed on the target block among the plurality of memory blocks, based on the received request and the translation information.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: May 10, 2022
    Assignee: SK hynix Inc.
    Inventors: Kyung Sub Park, Chi Wook An