Abstract: A manufacturing method for an LED includes providing a substrate having a buffer layer and a first N-type epitaxial layer, forming a blocking layer on the first N-type epitaxial layer, and etching the blocking layer to form patterned grooves penetrating the blocking layer to the first N-type epitaxial layer. A second N-type epitaxial layer is then formed on the blocking layer to contact the first N-type epitaxial layer; a light emitting layer, a P-type epitaxial layer and a conductive layer are thereafter disposed on the second N-type epitaxial layer; an N-type electrode is formed to electrically connect with the first N-type epitaxial layer, and a P-type electrode is formed on the conductive layer. The N-type electrode is disposed on the blocking layer and separated from the second N-type epitaxial layer and has a portion extending into the patterned grooves to contact the first N-type epitaxial layer.

Abstract: A semiconductor device, includes: a semiconductor substrate; a first conductivity type well and a second conductivity type well; a first active area; a second active area; a first well contact layer; a plurality of first source/drain layers; a first gate insulating film; a first gate electrode; a second well contact layer; a plurality of second source/drain layers; a second gate insulating film; and a second gate electrode. The first well contact layer is formed in the first active area at one end part in the one direction. The one end parts in each of the first active areas and in each of the second active areas are mutually on the same side.

Abstract: An electrical device includes a current transport layer formed using a layer of a topological material selected from the group of a topological insulator, a quantum anomalous hall (QAH) insulator, a topological insulator variant, and a topological magnetic insulator. In one embodiment, the current transport layer forms a conductive wire on an integrated circuit where the conductive wire includes two spatially separated edge channels, each edge channel carrying charge carriers propagating in one direction only. In other embodiments, an optical device includes an optical layer formed using a layer of the topological material. The optical layer can be a light absorbing layer, a light emitting layer, a light transport layer, or a light modulation layer.

Abstract: The present invention concerns a method for forming a Semiconductor-On-Insulator structure that includes a semiconductor layer of III/V material by growing a relaxed germanium layer on a donor substrate; growing at least one layer of III/V material on the layer of germanium; forming a cleaving plane in the relaxed germanium layer; transferring a cleaved part of the donor substrate to a support substrate, with the cleaved part being a part of the donor substrate cleaved at the cleaving plane that includes the at least one layer of III/V material. The present invention also concerns a germanium on III/V-On-Insulator structure, an N Field-Effect Transistor (NFET), a method for manufacturing an NFET, a P Field-Effect Transistor (PFET), and a method for manufacturing a PFET.

Abstract: A circuit substrate includes a substrate, a first lead line, a second lead line, an insulating layer and a pad. The substrate has a pad region, a first non-pad region and a second non-pad region. The first lead line extends from the first non-pad region to the pad region. The second lead line extends from the second non-pad region to the pad region. The insulating layer is interposed between the first and second lead lines. The pads are on the pad region of the substrate and one of the pads is electrically connected to the first and second lead lines. A display panel including the circuit substrate is also provided.

Abstract: A magnetic element is disclosed wherein first and second interfaces of a free layer with a Hk enhancing layer and tunnel barrier, respectively, produce enhanced surface perpendicular anisotropy to lower switching current or increase thermal stability in a magnetic tunnel junction (MTJ). In a MTJ with a bottom spin valve configuration where the Hk enhancing layer is an oxide, the capping layer contacting the Hk enhancing layer is selected to have a free energy of oxide formation substantially greater than that of the oxide. The free layer may be a single layer or composite comprised of an Fe rich alloy such as Co20Fe60B20. With a thin free layer, the interfacial perpendicular anisotropy may dominate the shape anisotropy to generate a magnetization perpendicular to the planes of the layers. The magnetic element may be part of a spintronic device or serve as a propagation medium in a domain wall motion device.

Abstract: A light emitting diode package includes a first lead frame comprising a first hole cup, a second lead frame comprising a second hole cup and disposed to face the first lead frame with a gap disposed between the first lead frame and the second lead frame, a first light emitting diode chip disposed on the first hole cup, and a second light emitting diode chip disposed on the second hole cup, the first lead frame comprising a first enlarged region formed between the gap and the first hole cup, and the second lead frame comprising a second enlarged region formed between the gap and the second hole cup.

Abstract: Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a semiconductive layer disposed over a substrate. A trench is disposed in the semiconductive layer, the trench with a first sidewall and an opposite second sidewall. A first insulating material layer is disposed over an upper portion of the first sidewall, and a conductive material disposed within the trench. An air gap is disposed between the conductive material and the semiconductive layer.

Abstract: A structure of a light-emitting device includes the following components: a substrate; an epitaxial structure on the substrate, the epitaxial structure including at least a first conductivity type semiconductor layer, a light-emitting active layer, and a second conductivity type semiconductor layer; a first electrode on the first conductivity type semiconductor layer; a transparent conductive layer between the first electrode and the first conductivity type semiconductor layer; and a three-dimensional distributed Bragg reflector (DBR) layer between the transparent conductive layer and the first conductivity type semiconductor layer.

Abstract: An improved light emitting heterostructure and/or device is provided, which includes a contact layer having a contact shape comprising one of: a clover shape with at least a third order axis of symmetry or an H-shape. The use of these shapes can provide one or more improved operating characteristics for the light emitting devices. The contact shapes can be used, for example, with contact layers on nitride-based devices that emit light having a wavelength in at least one of: the blue spectrum or the deep ultraviolet (UV) spectrum.

Abstract: According to one embodiment, in a dielectric isolation substrate, an insulating film having a first thickness is provided on a semiconductor substrate. A semiconductor layer of a first conductivity type having a second thickness is provided on the insulating film. An impurity diffusion layer of a second conductivity type is provided partially in a lower portion of the semiconductor layer and is in contact with the insulating film.

Abstract: According to one embodiment, a semiconductor light emitting device having a base, a mounting material and a chip of a semiconductor light emitting element is provided. The mounting material is provided on the base. The chip of the semiconductor light emitting element is fixed onto the base via the mounting material. The chip of the semiconductor light emitting element is provided with a sapphire substrate, an active region, a light shielding portion and anode and cathode electrodes for supplying an electric power to the active region. The active region is provided on the sapphire substrate and has a light emitting layer for emitting light by supplying electric power. The light shielding portion is formed on the sapphire substrate on the side of the mounting material. The light shielding portion prevents the mounting material from being irradiated with the light produced in the light emitting layer.

Abstract: A semiconductor device includes: a substrate having a base and an array of semiconductor pillars extending from the base, the substrate being formed with a plurality of trenches, each of which extends into the base and has two opposing trench side walls; a first insulative liner layer formed on each of the trench side walls of each of the trenches and divided into upper and lower segments by a gap that leaves a bit-forming surface of each of the trench side walls uncovered by the first insulative liner layer; and a plurality of buried bit lines, each of which extends into the base from the bit-forming surface of a respective one of the trench side walls of each of the trenches.

Abstract: There are disclosed herein various implementations of semiconductor structures including III-Nitride interlayer modules. One exemplary implementation comprises a substrate and a first transition body over the substrate. The first transition body has a first lattice parameter at a first surface and a second lattice parameter at a second surface opposite the first surface. The exemplary implementation further comprises a second transition body, such as a transition module, having a smaller lattice parameter at a lower surface overlying the second surface of the first transition body and a larger lattice parameter at an upper surface of the second transition body, as well as a III-Nitride semiconductor layer over the second transition body. The second transition body may consist of two or more transition modules, and each transition module may include two or more interlayers. The first and second transition bodies reduce strain for the semiconductor structure.

Abstract: The present disclosure discloses a method of manufacturing a light-emitting device comprising the steps of providing a light-emitting wafer having a semiconductor stacked structure and an alignment mark, sensing the alignment mark, and separating the light-emitting wafer into a plurality of light-emitting diodes and removing the alignment mark accordingly.

Abstract: According to one embodiment, a semiconductor device includes a first layer of n-type including a nitride semiconductor, a second layer of p-type including a nitride semiconductor, a light emitting unit, and a first stacked body. The light emitting unit is provided between the first and second layers. The first stacked body is provided between the first layer and the light emitting unit. The first stacked body includes a plurality of third layers including AlGaInN, and a plurality of fourth layers alternately stacked with the third layers and including GaInN. The first stacked body has a first surface facing the light emitting unit. The first stacked body has a depression provided in the first surface. A part of the light emitting unit is embedded in a part of the depression. A part of the second layer is disposed on the part of the light emitting unit.

Abstract: A nonvolatile memory device includes a substrate having active regions that are defined by an isolation layer and that have first sidewalls extending upward from the isolation layer, floating gates adjoining the first sidewalls of the active regions with a tunnel dielectric layer interposed between the active regions and the floating gates and extending upward from the substrate, an intergate dielectric layer disposed over the floating gates, and control gates disposed over the intergate dielectric layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The device also includes a first electrode layer having electrical continuity with the first semiconductor layer and a second electrode layer provided on the second semiconductor layer, the second electrode layer including a metal portion having a thickness not less than 10 nanometers and not more than 100 nanometers along a direction from the first semiconductor layer to the second semiconductor layer.

Abstract: A semiconductor device that includes one semiconductor device formed in one semiconductor material and a second semiconductor device formed in another semiconductor material on a common substrate, and a method of fabricating the semiconductor device.

Abstract: A semiconductor light emitting device having a light emitting structure including at least one first conductive GaN based semiconductor layer, an active layer above the at least one first conductive GaN based semiconductor layer, and at least one second conductive GaN based semiconductor layer above the active layer, a plurality of patterns disposed from the at least one second conductive GaN based semiconductor layer through a portion of the at least one first conductive GaN based semiconductor layer, and an insulating member on the plurality of patterns. The plurality of patterns include a lower part contacting with the light emitting structure and a upper part contacting with the light emitting structure. A first base angle of the lower part is different from the second base angle of the upper part.