Abstract: A method for manufacturing a thin film transistor substrate includes a step of forming a gate electrode (11a) and a first interconnect on a substrate (10), a step of forming a gate insulating film (12a) having a contact hole at a position overlapping the first interconnect, a step of forming a source electrode (13a) and a drain electrode (13b) overlapping the gate electrode (11a) and separated apart from each other, and a second interconnect connected via the contact hole to the first interconnect, a step of successively forming an oxide semiconductor film (14) and a second insulating film (15), and thereafter, patterning the second insulating film (15) to form an interlayer insulating film (15a), and a step of reducing the resistance of the oxide semiconductor film (14) exposed through the interlayer insulating film (15a) to form a pixel electrode (14b).

Abstract: A method for forming a thin film photovoltaic device. The method includes providing a transparent substrate comprising a surface region, forming a first electrode layer overlying the surface region, forming a copper layer overlying the first electrode layer and forming an indium layer overlying the copper layer to form a multi-layered structure. The multi-layered structure is subjected to a thermal treatment process in an environment containing a sulfur bearing species to forming a copper indium disulfide material. The copper indium disulfide material comprising a copper-to-indium atomic ratio ranging from about 1.2:1 to about 2:1 and a thickness of substantially copper sulfide material having a copper sulfide surface region. The thickness of the copper sulfide material is selectively removed to expose a surface region having a copper poor surface comprising a copper to indium atomic ratio of less than about 0.95:1.

Abstract: In a first aspect, a method of forming a metal-insulator-metal (“MIM”) stack is provided, the method including: (1) forming a dielectric material having an opening and a first conductive carbon layer within the opening; (2) forming a spacer in the opening; (3) forming a carbon-based switching material on a sidewall of the spacer; and (4) forming a second conductive carbon layer above the carbon-based switching material. A ratio of a cross sectional area of the opening in the dielectric material to a cross sectional area of the carbon-based switching material on the sidewall of the spacer is at least 5. Numerous other aspects are provided.

Abstract: The construction of this invention includes an active matrix substrate, an amorphous selenium layer, a high resistance layer, a gold electrode layer, an insulating layer and an auxiliary plate laminated in this order. In one aspect of the present invention, the insulating layer has an inorganic anion exchanger added thereto in order to provide a radiation detector which prevents void formation and pinhole formation in the amorphous semiconductor layer and carrier selective high resistance film, without accumulating electric charges on the auxiliary plate. The inorganic anion exchanger adsorbs chloride ions in the insulating layer, thereby preventing destruction of X-ray detector due to the chloride ions drawn to the gold electrode layer.

Abstract: According to one embodiment, an organic EL device includes an insulating substrate, first and second interlayer insulators, pixel electrodes, an organic layer, and a counter electrode. The first interlayer insulator is positioned above the insulating substrate. The second interlayer insulator is positioned on the first interlayer insulator and provided with slits. The pixel electrodes are arranged on the second interlayer insulator. Two or more of the pixels are adjacent to each other with one of regions corresponding to the slits interposed therebetween. The organic layer is positioned on the pixel electrodes and includes an emitting layer. The counter electrode is positioned above the organic layer.

Abstract: A semiconductor device includes: a semiconductor element (1) having an internal circuit (17); and electrode pads (22, 22, . . . ) provided for the semiconductor element (1). The electrode pads (22, 22, . . . ) are electrically connected to the internal circuit (17) via control portions (31) for controlling electrical connection between the electrode pads (22, 22, . . . ) and the internal circuit (17).

Abstract: This bispectral detector comprises a plurality of unitary elements for detecting a first and a second electromagnetic radiation range, consisting of a stack of upper and lower semiconductor layers of a first conductivity type which are separated by an intermediate layer that forms a potential barrier between the upper and lower layers; and for each unitary detection element, two upper and lower semiconductor zones of a second conductivity type opposite to the first conductivity type, are arranged respectively so that they are in contact with the upper faces of the upper and lower layers so as to form PN junctions, the semiconductor zone being positioned, at least partially, in the bottom of an opening that passes through the upper and intermediate layers. The upper face of at least one of the upper and lower layers is entirely covered in a semiconductor layer of the second conductivity type.

Abstract: A method for forming a thin film photovoltaic device. The method includes providing a transparent substrate comprising a surface region and forming a first electrode layer overlying the surface region. The method forms a bulk copper indium disulfide material from a multi-layered structure comprising a copper species, an indium species, and a sulfur species overlying the first electrode layer. The bulk copper indium disulfide material comprises one or more portions of a copper poor copper indium disulfide material, a copper poor surface regions, and one or more portions of a sulfur deficient copper indium disulfide material characterized by at least a CuInS2-x species, where 0<x<2. The copper poor surface and one or more portions of the copper poor copper indium disulfide material are subjected to a sodium species derived from a sodium sulfide material to convert the copper poor surface from an n-type characteristic to a p-type characteristic.

Abstract: With a general wafer level package process, in order to prevent corrosion of an aluminum type pad electrode in a scribe region in a plating process, the pad electrode is covered with a pad protective resin film at the same layer as an organic type protective film in a product region. However, this makes it impossible to perform the probe test on the pad electrode in the scribe region after rewiring formation. The present invention provides a method for manufacturing a semiconductor integrated circuit device of a wafer level package system. The organic type protective films in the chip regions and the scribe region are mutually combined to form an integral film pattern. In a pelletization step, the surface layer portion including the organic type protective film at the central part of the scribe region is first removed by laser grooving, to form a large-width groove. Then, a dicing processing of the central part in this groove results in separation into the chip regions.

Abstract: A circuit structure includes a substrate and a film over the substrate and including a plurality of portions allocated as a plurality of rows. Each of the plurality of rows of the plurality of portions includes a plurality of convex portions and a plurality of concave portions. In each of the plurality of rows, the plurality of convex portions and the plurality of concave portions are allocated in an alternating pattern.

Abstract: A nitride semiconductor light emitting device is provided. The nitride semiconductor light emitting device includes a first nitride layer comprising at least N-type nitride layer. An insulating member is formed on the first nitride layer having a predetermined pattern. An active layer is formed in both sides of the insulating member on the first nitride layer to emit light. A second nitride layer is formed in both sides of the insulating member on the active layer and the second nitride layer comprises at least a P-type nitride layer.

Abstract: A method for fabricating a semiconductor device includes forming a plurality of gate structures on a semiconductor substrate. The plurality of gate structures are arranged in a plurality of lines, wherein an end-to-end spacing between the lines is smaller than a line-to-line spacing between the lines. The method further includes forming an etch stop layer over the gate structures, forming an interlayer dielectric over the gate structures, and forming a dielectric film over the gate structures before the interlayer dielectric is formed. The dielectric film merges in end-to-end gaps formed in the end-to-end spacing between the gate structures.

Abstract: A method for forming a thin film photovoltaic device. The method includes providing a transparent substrate comprising a surface region. A first electrode layer is formed overlying the surface region. A copper layer is formed overlying the first electrode layer and an indium layer is formed overlying the copper layer to form a multi-layered structure. The method subjects at least the multi-layered structure to a thermal treatment process in an environment containing a sulfur bearing species to form a copper indium disulfide material. The copper indium disulfide material comprising a copper-to-indium atomic ratio ranging from about 1.2:1 to about 2:1 and a thickness of substantially copper sulfide material. The thickness of the copper sulfide material is removed to expose a surface region having a copper poor surface comprising a copper to indium atomic ratio of less than about 0.95:1.

Abstract: A method for forming device features with reduced line end shortening (LES) includes trimming the device feature to achieve the desired sub-ground rule critical dimension during the etch to form the device feature.

Abstract: Epitaxial deposition of silicon germanium in a semiconductor device is achieved without using masks. Nucleation delays induced by interactions with dopants present before deposition of the silicon germanium are used to determine a period over which an exposed substrate surface may be subjected to epitaxial deposition to form a layer of SiGe on desired parts with substantially no deposition on other parts. Dopant concentration may be changed to achieve desired thicknesses within preferred deposition times. Resulting deposited SiGe is substantially devoid of growth edge effects.

Abstract: A semiconductor device includes a substrate, an element formed on the substrate, a nitride film formed on the substrate, a anti-peel film formed on the nitride film, and a molded resin covering the anti-peel film and the element. The anti-peel film has residual compressive stress.

Abstract: An MTJ in an MRAM array or TMR read head is disclosed in which a low magnetization capping layer is a composite having a NiFeHf inner layer formed on a NiFe or CoFeB/NiFe free layer, a Ta middle layer, and a Ru outer layer on the Ta layer. For example, a low magnetization NiFeHf layer is achieved by co-sputtering NiFe and Hf targets with a forward power of 400 W and 200 W, respectively. A higher Hf content increases the oxygen gettering power of the NiFeHf layer and the thickness is modified to change dR/R, RA, and magnetostriction values. A so-called dead layer between the free layer and capping layer is restored by incorporating a NiFeHf layer on the free layer to improve lattice matching. The Fe content in the NiFe target used to make the NiFeHf layer is preferably the same as in the NiFe free layer.

Abstract: Epitaxial deposition of silicon germanium in a semiconductor device is achieved without using masks. Nucleation delays induced by interactions with dopants present before deposition of the silicon germanium are used to determine a period over which an exposed substrate surface may be subjected to epitaxial deposition to form a layer of SiGe on desired parts with substantially no deposition on other parts. Dopant concentration may be changed to achieve desired thicknesses within preferred deposition times. Resulting deposited SiGe is substantially devoid of growth edge effects.

Abstract: A first and second gate electrodes are formed on a first and second active regions, respectively. The first and second gate electrodes have a first and second metal-containing conductive films, respectively. The first and second metal-containing conductive films are formed on the isolation region for segmenting the first and second active regions to be spaced apart from each other. A third metal-containing conductive film, which is a part of each of the first and second gate electrodes, is continuously formed from a top of the first metal-containing conductive film through a top of the isolation region to a top of the second metal-containing conductive film. The third metal-containing conductive film is in contact with the first and second metal-containing conductive films.

Abstract: A semiconductor light emitting device having a semiconductor stacking structure bonded onto the support member and having excellent characteristics is provided by a preferable electrode structure. The semiconductor light emitting device comprising; a semiconductor stacking structure having a first semiconductor layer and a second semiconductor layer of conductivity types different from each other, a first electrode connected to the first semiconductor layer, and a second electrode connected to the second semiconductor layer, wherein one principal surface of the first electrode has a portion that makes contact with the first semiconductor layer so as to establish electrical continuity and an external connection section.