Abstract: A quantum computing system, method and computer readable storage medium involve tuning a whispering-gallery mode optical resonator to support a resonance frequency associated with a transition frequency of an atom. Operation of a laser is controlled to cause the atom to be trapped adjacent the optical resonator and within the evanescent field portion. Based on an atom presence signal from an optical atom presence detector, an indication is provided that the atom is trapped adjacent the optical resonator. A frequency of a cooling laser is controlled to cool the atom, and the optical resonator is configured to define a closed loop-like mode including an evanescent field portion. The trapping laser is configured to cause the atom to be trapped adjacent the whispering-gallery mode resonator, and the cooling laser is configured to manipulate a state of the atom to thereby cool the atom.

Abstract: A quantum computing system comprises a plurality of photonic cavities, a plurality of coupling locations for quantum emitter positioning, a photon generator configured to supply photons to the plurality of photonic cavities, and a plurality of photon output channels downstream of the plurality of cavities to output a graph state. Each coupling location is associated with a differing one of the plurality of photonic cavities. Quantum emitters associated with each coupling location are configured to mediate interactions between consecutive incoming photonic qubits to generate the graph state, and the photonic cavities are configured to couple photonic qubits to the quantum emitters.

Abstract: A charging inlet assembly includes a housing extending between a front and a rear. The housing has a DC section including DC terminal channels that are configured to receive DC terminals. The housing has an AC section including an AC module chamber. The DC section is configured for mating with a DC charging connector at the front. The AC section is configured for mating with an AC charging connector at the front. The charging inlet assembly includes an AC charging module removably received in the AC module chamber. The AC charging module includes an AC insert extending between an insert front and an insert rear. The AC insert includes AC terminal channels between the insert front and the insert rear. The AC charging module include AC terminals received in the AC terminal channels. The AC terminals are terminated to ends of AC cables extending from the insert rear. The AC terminals and the AC cables are removable from the housing with the AC insert.

Abstract: Generating photonic graph states includes positioning a plurality of quantum emitters at a plurality of coupling sites associated with a plurality of cavities and initializing a state of a quantum emitter qubit associated with each of the plurality of quantum emitters. Photonic qubits are transmitted toward the plurality of the quantum emitters a first instance transmission for generating an entangling gate between the photonic qubits and the quantum emitter qubit in order to entangle the quantum emitter qubit and the photonic qubits. Following the first instance transmission, photonic qubits are transmitted toward the plurality of quantum emitters in a one second instance transmission for generating a SWAP gate between the photonic qubits and the quantum emitter qubits to map the quantum emitter qubits to photonic qubits.

Abstract: A novel semiconductor device or a semiconductor device capable of preventing overcharging is provided. A power receiving portion has a function of generating a signal for canceling a wireless signal transmitted from a power feeding portion when the charging is completed. Specifically, when the remaining battery capacity of the power receiving portion is one hundred percent or higher than or equal to a predetermined reference value, the power receiving portion has a function of generating an electromagnetic wave for canceling an electromagnetic wave transmitted from the power feeding portion. Thus, a magnetic field for canceling a magnetic field formed of the electromagnetic wave transmitted from the power feeding portion is formed, so that overcurrent in the power receiving portion can be prevented.

Abstract: A bed has a mattress. A first wireless charging array is positioned on a top side of the mattress nearer a head of the mattress. A pillow is configured to be positioned atop the first wireless charging array. The pillow includes a second wireless charging array located on an underside of a pillow. The second wireless charging array is configured to receive energy from the first wireless charging array. A companion device is configured to use the energy. An energy storage device is within the pillow. The energy storage device is configured to store charge received by the first wireless charging array. The energy storage device is configured to supply power to the companion device.

Abstract: This application discloses a protection circuit associated with a battery management system (BMS). The protection circuit includes a first protection module and a freewheeling module. The first protection module is connected in parallel to a first switch module of the BMS, and the freewheeling module is connected in parallel to a load module of the BMS. The first protection module switches to a charging state when the first switch module is turned off to stabilize a voltage between a first terminal of the first switch module and a second terminal of the first switch module. The freewheeling module is turned on when the first switch module is turned off to stabilize a voltage between the first switch module and the second switch module. The protection circuit mitigates risks of breakdown of the first switch module, and prevents a parasitic inductance from limiting a switching frequency of the first switch module.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for optimizing integrated circuit architectures or compiler designs using an optimization engine. The optimization engine includes an auto-encoder and one or more regressors. Once trained, the optimization engine can encode initial, discrete input values of a set of input characteristics into a continuous domain and use continuous optimization techniques to identify final input values of the set of input characteristics that optimize one or more output characteristics.

Abstract: Embodiments relate to a system comprising: a first module. The first module comprises a power receiving module configured to receive an input power from an energy source. The system further comprises a second module. The second module comprises a power conversion module configured to convert the input power to an output power. The system further comprises a third module. The third module comprises a control module for configuring the first module or the second module to perform a charging operation or a discharging operation. The first module, the second module and the third module are functionally integrated in the system to perform multiple modes of the charging operation or the discharging operation. The third module controls an impedance of the input power and the output power in the second module.

Abstract: A riding-type mower includes a power supply device and the power supply device includes a plurality of battery packs and a power management module. The plurality of battery packs are detachably mounted to the riding-type mower and further configured to supply electric energy to a hand-held electric power tool. The plurality of battery packs each are provide with at least one battery cell group, and each battery cell group includes a plurality of battery cells electrically connected to each other. The power management module is configured to determine whether the plurality of battery packs satisfy a discharge condition and control a battery pack satisfying the discharge condition to discharge when the battery pack satisfies the discharge condition.

Abstract: In some examples, apparatus comprises a multiplexer (MUX) adapted to be coupled to a set of battery cells and configured to provide a voltage of a different battery cell in the set of battery cells based on a MUX control signal. Apparatus comprises a comparator coupled to the MUX and configured to compare a MUX output signal to a threshold voltage to provide a comparator output signal. Apparatus comprises a digital control circuit configured to provide the MUX control signal to the MUX, to store the comparator output signal, and to use a logic AND gate to provide an AND gate output signal based on the stored comparator output signal.

Abstract: A docking station for charging an autonomous floor cleaner includes a transmitter that can transmit a signal for detection by the robot. The docking station can include an opaque shroud for the transmitter and/or spring-loaded charging contacts. The autonomous floor cleaner can comprise a passive receiver that detects signals emitted from the docking station and a time-of-flight sensor for position/proximity sensing. The robot can selectively turn off the time-of-flight sensor when docking with or avoiding the docking station. Methods for docking, re-docking, low power charging, docking station avoidance, obstacle response during docking, and close-proximity docking are disclosed.

Abstract: A charging method includes: charging a battery according to a second current value after charging the battery according to a first current value in each of N charging cycles, the second current value being less than the first current value, and N being a positive integer; and charging the battery according to a target cutoff voltage value in the case where a target voltage value is greater than or equal to the target cutoff voltage value at the end of the N charging cycle. The target voltage value is a charging voltage value corresponding to the first current value, and the target cutoff voltage value is a first cutoff voltage value, or the target voltage value is a charging voltage value corresponding to the second current value, the target cutoff voltage value is a second cutoff voltage value.

Abstract: A charging circuit and an electronic device are provided. The charging circuit includes a transmitting circuit. The transmitting circuit is configured to wirelessly transmit electric energy to a receiving circuit, receive a feedback signal of the receiving circuit, and wirelessly transmit a control signal to the receiving circuit.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying security vulnerabilities introduced by transformations to a hardware design. One of the methods includes obtaining a security model for an initial electronic hardware design and a modified electronic hardware design. An analysis process is performed on the initial representation and on the modified representation of the electronic hardware design according to the security model. If the modified electronic hardware design introduced a security vulnerability relative to the initial electronic hardware design, information representing the introduced security vulnerability is provided.

Abstract: Systems and methods are disclosed that map quantum circuits to physical qubits of a quantum computer. Techniques are disclosed to generate a graph that characterizes the physical qubits of the quantum computer and to compute the resource requirements of each circuit of the quantum circuits. For each circuit, the graph is searched for a subgraph that matches the resource requirements of the circuit, based on a density matrix. Physical qubits, defined by the matching subgraph, are then allocated to the logical qubits of the circuit.

Abstract: A specification for a modular circuit design includes a mapping from global clock domains to global voltage domains. A processor assigns, to a first instance of a clocked primitive component, a global voltage domain based on which global clock domain clocks the first instance, automatically adds, to the modular circuit design, first power supply rails to power the first instance, and connects the first power supply rails from the first instance to a first power supply for a first global voltage domain. The processor assigns, to a second instance of the clocked primitive component, a second global voltage domain based on which global clock domain clocks the second instance, automatically adds second power supply rails to power the second instance, and connects the second power supply rails to a second power supply for a second global voltage domain. The processor may perform further processing on the updated modular circuit design.

Abstract: A quantum computer system packs quantum circuits into quantum memory so the circuits can be run concurrently. A quantum-circuit packer includes a resource mapper and a packing evaluator. The resource mapper characterizes the task of identifying candidate packings of pending quantum circuits as an integer linear problem (ILP), for which solutions are known. The packing evaluator applies an optimization criterion to select an optimum packing from the candidate packings. The optimum packing is run; the results are assigned to respective circuits that make up the packing.

Abstract: In the context of gate-model quantum computing, atoms (or polyatomic molecules) are excited to respective Rydberg states to foster intra-gate interactions. Rydberg states with relatively high principal quantum numbers are used for relatively distant intra-gate interactions and require relatively great inter-gate separations to avoid error-inducing inter-gate interactions. Rydberg states with relatively low principal quantum numbers can be used for intra-gate interactions over relatively short intra-gate distances and require relatively small inter-gate separations to avoid error-inducing inter-gate interactions. The relatively small inter-gate separations provide opportunities for parallel gate executions, which, in turn, can provide for faster execution of the quantum circuit constituted by the gates.

Abstract: Implementations disclosed herein may include receiving from a user a selection of at least one die, a package type, and at least one test condition; generating, using a processor, a product die configuration and a product package configuration using a predictive modeling module and the at least one die and the package type; generating a graphic design system file; generating a package bonding diagram; generating a product spice model of the discrete device product using a technology computer aided design module; generating, using a processor, one or more datasheet characteristics of the discrete device product with the product SPICE model; generating a product datasheet for the discrete device product using the graphic design system file; and using a second interface generated by a computing device to provide access to the graphic design system file, the package bonding diagram, the product datasheet, and the product SPICE model.