Abstract: A quantum computer system packs quantum circuits into quantum memory so the circuits can be run concurrently. A quantum-circuit packer includes a resource mapper and a packing evaluator. The resource mapper characterizes the task of identifying candidate packings of pending quantum circuits as an integer linear problem (ILP), for which solutions are known. The packing evaluator applies an optimization criterion to select an optimum packing from the candidate packings. The optimum packing is run; the results are assigned to respective circuits that make up the packing.

Abstract: In the context of gate-model quantum computing, atoms (or polyatomic molecules) are excited to respective Rydberg states to foster intra-gate interactions. Rydberg states with relatively high principal quantum numbers are used for relatively distant intra-gate interactions and require relatively great inter-gate separations to avoid error-inducing inter-gate interactions. Rydberg states with relatively low principal quantum numbers can be used for intra-gate interactions over relatively short intra-gate distances and require relatively small inter-gate separations to avoid error-inducing inter-gate interactions. The relatively small inter-gate separations provide opportunities for parallel gate executions, which, in turn, can provide for faster execution of the quantum circuit constituted by the gates.

Abstract: Implementations disclosed herein may include receiving from a user a selection of at least one die, a package type, and at least one test condition; generating, using a processor, a product die configuration and a product package configuration using a predictive modeling module and the at least one die and the package type; generating a graphic design system file; generating a package bonding diagram; generating a product spice model of the discrete device product using a technology computer aided design module; generating, using a processor, one or more datasheet characteristics of the discrete device product with the product SPICE model; generating a product datasheet for the discrete device product using the graphic design system file; and using a second interface generated by a computing device to provide access to the graphic design system file, the package bonding diagram, the product datasheet, and the product SPICE model.

Abstract: An IGBT physical model parameter extraction method includes obtaining an initial value and a transformation range of an IGBT physical model parameter; and correcting a model parameter by means of a correspondence between IGBT dynamic and static features and the IGBT physical model parameter and in combination with an experiment measurement result of the IGBT physical model parameter.

Abstract: Metrology target design methods and verification targets are provided. Methods comprise using OCD data related to designed metrology target(s) as an estimation of a discrepancy between a target model and a corresponding actual target on a wafer, and adjusting a metrology target design model to compensate for the estimated discrepancy. The dedicated verification targets may comprise overlay target features and be size optimized to be measureable by an OCD sensor, to enable compensation for inaccuracies resulting from production process variation. Methods also comprise modifications to workflows between manufacturers and metrology vendors which provide enable higher fidelity metrology target design models and ultimately higher accuracy of metrology measurements.

Abstract: A wireless charging device is disclosed, which includes: a charging pad and a first controller. The charging pad includes a plurality of charging units, the plurality of charging units include a first charging unit and a second charging unit. When a first electromagnetic coupling strength between the first charging unit and the to-be-charged device is greater than or equal to a first threshold, the first controller is configured to control the first charging unit to separately charge the to-be-charged device. When both the second electromagnetic coupling strength between the second charging unit and the to-be-charged device and the first electromagnetic coupling strength are less than a first threshold, and are greater than or equal to a second threshold, the first controller is configured to control the first charging unit and the second charging unit to jointly charge the target to-be-charged device.

Abstract: A vehicle includes: a battery pack including a secondary battery, a battery sensor that detects a state of the secondary battery, and a first control device; a second control device provided separately from the battery pack; and a converter. The first control device is configured to use a detection value of the battery sensor to obtain a current upper limit value indicating an upper limit value of an input current of the secondary battery. The second control device is configured to use a power upper limit value indicating an upper limit value of an input power of the secondary battery to control the input power of the secondary battery. The converter is configured to perform a conversion of the current upper limit value into the power upper limit value.

Abstract: A method of determining a characteristic of one or more processes for manufacturing features on a substrate, the method including: obtaining image data of a plurality of features on a least part of at least one region on a substrate; using the image data to obtain measured data of one or more dimensions of each of at least some of the plurality of features; determining a statistical parameter that is dependent on the variation of the measured data of one or more dimensions of each of at least some of the plurality of features; determining a probability of defective manufacture of features in dependence on a determined number of defective features in the image data; and determining the characteristic of the one or more processes to have the probability of defective manufacture of features and the statistical parameter.

Abstract: A connector unit for a plug-in electrical vehicle includes a first set of terminals for connection with a high-voltage energy storage, a second set of terminals for connection with an electrical propulsion motor, a connector interface having electrical connectors and being configured for temporarily receiving a corresponding connector interface of a charging connector during charging of the high-voltage energy storage of the plug-in electrical vehicle, and a permanent or temporary electrical connection between the first set of terminals and the second set of terminals.

Abstract: A system for modeling a semiconductor fabrication process includes at least one first processor and at least one second processor. The at least one first processor is configured to provide at least one machine learning (ML) model, which is trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample. The physical pattern sample is formed from the design pattern sample by using the semiconductor fabrication process. The at least one second processor is configured to provide an input image representing a shape of a design pattern and/or a physical pattern to the at least one first processor and to generate output data defining the physical pattern and/or the design pattern based on an output image received from the at least one first processor.

Abstract: Systems and techniques that facilitate backend quantum runtimes are provided. In various embodiments, a system can comprise a backend receiver component that can access a computer program provided by a client device, wherein the computer program is configured to indicate a quantum computation. In various aspects, the system can further comprise a backend runtime manager component that can host the computer program by instantiating a backend classical computing resource. In various instances, the backend classical computing resource can orchestrate both classical execution of the computer program and quantum execution of the quantum computation indicated by the computer program.

Abstract: A diffraction pattern guided source mask optimization (SMO) method that includes determining a source variable region from a diffraction pattern. The source variable region corresponds to one or more areas of a diffraction pattern in a pupil for which one or more pupil variables are to be adjusted. The source variable region in the diffraction pattern includes a plurality of pixels in an image of a selected region of interest in the diffraction pattern. Determining the source variable region can include binarization of the plurality of pixels in the image such that individual pixels are either included in the source variable region or excluded from the source variable region. The method can include adjusting the one or more pupil variables for the one or more areas of the pupil that correspond to the source variable region; and rendering a final pupil based on the adjusted one or more pupil variables.

Abstract: A quantum computing system includes a first silicon nitride resonator couplable to a first alkali atom, a second silicon resonator couplable to a second alkali atom, and a plurality of lasers for trapping, cooling, and manipulating the first alkali atom and the second alkali atom. Detectors detect a presence of the trapped first alkali atom and the trapped second alkali atom, and a processor is configured to receive at least one input signal from at least one of the detectors, the input signal indicating a presence of the trapped first alkali atom and the trapped second alkali atom, and, based on the received input, control at least some of the plurality of lasers to manipulate at least one of the trapped first alkali atom and the trapped second alkali atom to thereby generate photonic qubits using the trapped first alkali atom or generate entanglement between photonic qubits transmitted to the trapped second alkali atom.

Abstract: A method of identifying cell-internal defects: obtaining a circuit design of an integrated circuit, the circuit design including netlists of one or more cells coupled to one another; identifying the netlist corresponding to one of the one or more cells; injecting a defect to one of a plurality of circuit elements and one or more interconnects of the cell; retrieving a first current waveform at a location of the cell where the defect is injected by applying excitations to inputs of the cell; retrieving, without the defect injected, a second current waveform at the location of the cell by applying the same excitations to the inputs of the cell; and selectively annotating, based on the first current waveform and the second current waveform, an input/output table of the cell with the defect.

Abstract: A neuromorphic analog signal processor includes a flexible circuit corresponding to an analog neural network. The flexible circuit includes operational amplifiers, each operational amplifier corresponding to an analog neuron. The flexible circuit also includes photoresistors or photodiodes interconnecting the operational amplifiers, and illumination sources. Each illumination source transmits light to a corresponding photoresistor or photodiode, thereby changing the resistance as a function of brightness of applied light. The flexible circuit also includes control circuits, each control circuit configured to apply a pulse-width modulation corresponding to a weight value, thereby causing pulsed signals at the illumination sources. The flexible circuit also includes a memory circuit coupled to the circuits.

Abstract: A method for source mask optimization with a lithographic projection apparatus. The method includes determining a multi-variable source mask optimization function using a plurality of tunable design variables for an illumination system of the lithographic projection apparatus, a projection optics of the lithographic projection apparatus to image a mask design layout onto a substrate, and the mask design layout. The multi-variable source mask optimization function may account for imaging variation across different positions in an exposure slit corresponding to different stripes of the mask design layout exposed by a same slit position of the exposure apparatus. The method includes iteratively adjusting the plurality of tunable design variables in the multi-variable source mask optimization function until a termination condition is satisfied.

Abstract: A computer-implemented method characterizes and controls performance of a set of device nodes in a distributed heterogeneous computing and control system. The device nodes are in physically distinct locations, in communication with one another over a network. One or more of the device nodes require different application programming code due to differences in hardware configuration or software configuration. The method includes configuring, by a design computer, for introduction into each distinct one of the device nodes, a corresponding communication facility and a corresponding dashboard instance. After introduction of the communication facility and dashboard instance into each device node, the design computer includes a communication facility in communication with the corresponding communication facility of each device node.

Abstract: Methods and systems are provided for designing an optimized stack up of layers of a PCB (Printed Circuit Board). A set of constraints is determined for the PCB stack up, where the constraints limit a total number of layers, a number of signal layers, and a thickness of the PCB stack up. Each of the constraints on the PCB stack up is encoded as an equality or an inequality. The set of equalities and inequalities is solved using integer programming techniques to identify an optimal solution to the set of constraints on the PCB stack up, where the optimal solution specifies an arrangement of signaling layers for the PCB. An estimate is generated for impedances and losses for the optimal PCB stack up. The constraints on a PCB stack up are modified when the estimated impedances and losses for the optimal PCB stack up are above a target threshold.

Abstract: A charging pad for charging one or more receiver devices is disclosed. The charging pad includes a power drive unit configured to generate a first AC voltage signal having a first frequency and a second AC voltage signal having a second frequency. Further, the charging pad includes a transmitting unit including a single power exchange coil coupled to the power drive unit, wherein the single power exchange coil includes a first coil segment configured to transmit the first AC voltage signal having the first frequency when the first AC voltage signal is received from the power drive unit. Also, the single power exchange coil includes a second coil segment configured to transmit the second AC voltage signal having the second frequency when the second AC voltage signal is received from the power drive unit.

Abstract: A specification for a semi-conductor chip is received. The specification specifies a set of photomasks associated with a metal layer of the semi-conductor chip. Multiple portions of an area of the metal layer are identified. A respective image is generated for each portion of the area based on the photomasks. A respective drawn density of metal wires for each portion of the area is calculated. A trained machine learning model is invoked to predict a respective silicon density of metal wires for each respective portion of the area based on an image and a drawn density for the respective portion of the area. A silicon density for the area of the metal layer is calculated based on a combination of predicted silicon densities for the multiple portions of the area. The combination is based on an average value of the predicted silicon densities for the multiple portions of the area.