Abstract: Envelope tracking systems for power amplifiers are provided herein. In certain embodiments, an envelope tracker supplies power to a power amplifier that amplifies an RF signal. The envelope tracker includes a multi-level switching circuit that generates an output current based on an envelope signal indicating an envelope of the RF signal. The envelope tracker further includes a combiner that combines a DC voltage with the output current of the multi-level switching circuit to generate a power amplifier supply voltage for the power amplifier. Accordingly, the output current of the multi-level switching circuit and a DC voltage are combined to generate the power amplifier supply voltage. Implementing the envelope tracking system in this manner can provide enhanced efficiency and/or higher bandwidth relative to an envelope tracking system in which a multi-level switching circuit directly outputs a power amplifier supply voltage.

Abstract: According to one aspect, embodiments of the invention provide an amplifier system comprising a first phase shifter configured to generate, based on an input signal, a first signal and a second signal, the second signal being out of phase with the first signal, a first amplifier configured to apply a first gain to the first signal to produce a gain adjusted first signal, a second amplifier configured to apply a second gain to the second signal to produce a gain adjusted second signal, a second phase shifter configured to combine the gain adjusted first and second signals to produce an output signal, and a controller configured to identify a high voltage swing across the first amplifier and, in response to identifying the high voltage swing, adjust the first gain to reduce output power of the first amplifier and adjust the second gain to increase output power of the second amplifier.

Abstract: A digital power amplifier comprising at least two individually activatable amplifiers connected to an output network comprising a first hybrid coupler. An output of a first amplifier is connected to a first input of the first hybrid coupler and an output of a second amplifier is connected to a second input of the first hybrid coupler such that activating an amplifier of the at least two amplifiers causes the amplifier to load modulate another activated amplifier of at least two amplifiers.

Abstract: An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal.

Abstract: An apparatus and method for using the known phenomena of quantum gate tunneling in semiconductor transistors to define the DC state of a charge-coupled amplifier is described. A first stage in which the tunneling current is bipolar (by pairing PMOS and NMOS transistors) in combination with a second stage with a controlled common mode voltage that can be used to control the first stage tunneling current, and thus the common mode voltage at the input. This can be done without the use of additional elements that may degrade performance or power consumption, since the input devices both process the input signal and maintain the DC operating point of the circuit. The approach may be advantageously used not only in charge-coupled amplifiers as described herein, but also in other capacitively coupled circuits such as charge balancing analog to digital converters (ADCs) and digital to analog converters (DACs).

Abstract: In one example, a circuit includes a first node to receive an analog signal that is an amplitude modulated radio-frequency signal for a digital signal. An output node is configured to provide an output signal indicative of rising and falling edges of an envelope of the analog signal. The rising and falling edges are indicative of rising and falling edges of the digital signal. A first current path is disposed between a power supply node and the first node. The first current path includes a first transistor coupled between the first node and a first bias source. The first bias source is coupled between the first transistor and the power supply node. The output node is coupled to a first intermediate node in the first current path between the transistor and the first bias source. A control terminal of the first transistor is coupled to the output node via a feedback network.

Abstract: A power splitter for use in an amplifier (e.g., a Doherty amplifier) includes an input terminal, and first and second output terminals. The input terminal is configured to receive an input RF signal, the first output terminal is configured to produce a first RF output signal, and the second output terminal is configured to produce a second RF output signal. The power splitter also includes a first capacitance electrically coupled between the input terminal and the first output terminal, a second capacitance electrically coupled between the input terminal and the second output terminal, a first inductance electrically coupled between the input terminal and a ground reference node, a second inductance electrically coupled between the first output terminal and the ground reference node, a third inductance electrically coupled between the second output terminal and the ground reference node, and a resistance electrically coupled between the first and second output terminals.

Abstract: Differential amplifier circuitry including: first and second main transistors of a given conductivity type; and first and second auxiliary transistors of an opposite conductivity type, where the first and second main transistors are connected along first and second main current paths passing between first and second main voltage reference nodes and first and second output nodes, respectively, with their source terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by component input signals of a differential input signal; and the first and second auxiliary transistors are connected along first and second auxiliary current paths passing between first and second auxiliary voltage reference nodes and the first and second output nodes, respectively, with their drain terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by the component input signals of the differential input signal.

Abstract: A communication circuit, including a first supply modulator configured to provide a first supply voltage; a first power amplifier configured to generate a first output signal by amplifying a first input signal corresponding to a first operation frequency band; a second power amplifier configured to generate a second output signal by amplifying a second input signal corresponding to a second operation frequency band; and a switching circuit configured to selectively provide the first supply voltage from the first supply modulator to the second power amplifier based on a first switching signal according to an operation mode.

Abstract: A first embodiment is directed to a circuit including a positive biasing circuit with a drive PMOS for biasing in subthreshold, a negative biasing circuit with a drive NMOS for biasing in subthreshold, and an amplification circuit coupled to the biasing circuits. The amplification circuit includes a first stage with a first boosting stage, a second stage with a second boosting stage, and a resistive element coupled between the first and second stages. A second embodiment is directed to a folded cascode operational amplifier wherein a value of the resistive element is selected to place at least one of a drive MOS in subthreshold. A third embodiment is directed to an integrated circuit with a resistive area neighboring a first boosting area and a second boosting area, the resistive area including a resistive element directly connected to a drive PMOS and a drive NMOS.

Abstract: A method for calibrating gain in a multi-path subsystem having a first processing path, a second processing path, and a mixed signal return path, may include low-pass filtering an input signal and a mixed signal return path signal generated from the input signal at subsonic frequencies to generate a filtered input signal and a filtered mixed signal return path signal and tracking and correcting for a gain difference between the first processing path and the second processing path based on the filtered input signal and the filtered mixed signal return path signal.

Abstract: Disclosed in the present invention are a radio frequency power amplifier based on power detection feedback, a chip, and a communication terminal. The radio frequency power amplifier comprises multiple stages of amplifier circuits and at least one power detection feedback circuit; the input end of the power detection feedback circuit is connected to the output end of a current stage of amplifier circuit, and the output end of the power detection feedback circuit is connected to the input ends of the current stage of amplifier circuit and at least one stage of amplifier circuit located prior to the current stage of amplifier circuit. The power detection feedback circuit generates, according to the detected output power of the current stage of amplifier circuit, a control voltage varying inversely with the output power, so that the power detection feedback circuit outputs current varying positively with the control voltage.

Abstract: An input receiver includes a first current source circuit, a second current source circuit, a first rail-to-rail amplifier circuit, a first inverter circuit, and a second inverter circuit. The first current source circuit adjusts an operating current flowing through a first node according to a first bias signal. The second current source circuit adjusts a ground current flowing through a second node according to a second bias signal. The first rail-to-rail amplifier circuit and the first inverter circuit are connected in parallel between the first node and the second node. The first rail-to-rail amplifier circuit receives an input signal and compares the input signal with a reference voltage and accordingly outputs an amplified signal. The second inverter circuit is coupled between an operating voltage and a ground voltage. The second inverter circuit generates an output signal according to an inverted signal outputted by the first inverter circuit.

Abstract: A digitally controlled grounded capacitance multiplier circuit system and method is disclosed. The capacitance multiplier (CM) circuit comprises an op-amp, a digitally controlled current amplifier and two resistors in addition to a reference capacitor. The CM circuit is designed using complementary metal-oxide-semiconductor (CMOS) technology. The value of the equivalent capacitance can be adjusted through digitally programming the gain of the current amplifier. The CM circuit provides a significant multiplication factor while using two active devices.

Abstract: A power amplifier includes initial-stage and output-stage amplifier circuits, and initial-stage and output-stage bias circuits. The initial-stage amplifier circuit includes a first high electron mobility transistor having a source electrically connected to a reference potential, and a gate to which a radio-frequency input signal is inputted, and a first heterojunction bipolar transistor having an emitter electrically connected to a drain of the first high electron mobility transistor, a base electrically connected to the reference potential in an alternate-current fashion, and a collector to which direct-current power is supplied and from which a radio-frequency signal is outputted.

Abstract: One example includes a device that is comprised of a pre-power amplifier, a power amplifier, a signal path, and a dynamic bias circuit. The pre-power amplifier amplifies an input signal and outputs a first amplified signal. The power amplifier receives the first amplified signal and amplifies the first amplified signal based on a dynamic bias signal to produce a second amplified signal at an output thereof. The signal path is coupled between an output of the pre-power amplifier and an input of the power amplifier. The dynamic bias circuit monitors the first amplified signal, generates the dynamic bias signal, and outputs the dynamic bias into the signal path.

Abstract: A PWM modulator has a quantizer that generates a PWM output signal to speaker driver. When a first voltage swing range is supplied to the speaker driver, the quantizer analog gain is controlled to be a first gain value. When a second PWM drive voltage swing range is supplied to the speaker driver, the analog gain is controlled to be a second gain value. The first and second gain values of the analog gain of the quantizer cause the combined gain of the quantizer and driver to be approximately equal in the two modes. The quantizer has at least two gain-affecting measurable non-ideal characteristics. The quantizer is adjustable using measured first and second values to correct for first and second of the at least two non-ideal characteristics. The gain of the quantizer is calibratable while the quantizer is adjusted using the measured first and second measured values.

Abstract: A Class-D amplifier that includes a driver stage operable in a plurality of modes having different respective output impedances, a loop filter having an output, and a circuit configured to sense a current at a load of the Class-D amplifier, determine, based on the sensed current, an IR drop for a respective output impedance of the driver stage, and add the IR drop to the loop filter output to compensate for the respective output impedance of the driver stage to reduce distortion.

Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor.

Abstract: Systems and methods are provided herein that include an amplifier arrangement and a balun arrangement that accommodate two or more frequency bands using various common components that are operated and/or coupled in differing ways based upon which frequency band is in operation.