Abstract: Methods, systems, and devices for determining a parameter of interest of downhole fluid using an acoustic assembly comprising a single solid acoustic transmission medium having a face immersed in the downhole fluid. Methods include using characteristics of a plurality of acoustic pulse reflections from a solid-liquid interface at the face of the solid acoustic transmission medium to estimate the parameter of interest in near real-time. The characteristics may comprise a corresponding reflection amplitude and the corresponding unique angle of reflection for each acoustic pulse reflection. Methods may include generating a two dimensional data set from measured characteristics, generating a curve by performing data fitting on the two dimensional data set, and using the reciprocal slope of the curve to estimate the parameter of interest.

Abstract: A helmet testing apparatus including a movable member, a sensor coupled to the movable member and configured to acquire compliance data regarding a liner disposed within a shell of a helmet through engagement of the sensor with the liner, and a processing circuit configured to determine a rating for the helmet based on the compliance data and predetermined compliance parameters for the helmet.

Abstract: An organic electroluminescent display is disclosed. The organic electroluminescent display includes a substrate having a pixel region and a non-pixel region, a first electrode disposed on the pixel region, an organic light emitting layer disposed on the first electrode and capable of generating light, a second electrode disposed on the organic light emitting layer and including a conductive material capable of reflecting light, a pixel defining layer disposed on the non-pixel region, and a bump disposed on the pixel region and capable of reflecting light to the substrate. The pixel region may include multiple pixel regions defined in the substrate. The bump may include multiple bumps. At least two bumps may have thicknesses different from each other.

Abstract: Embodiments are directed to forming a structure comprising at least one fin, a gate, and a spacer, applying an annealing process to the structure to create a gap between the at least one fin and the spacer, and growing an epitaxial semiconductor layer in the gap between the spacer and the at least one fin.

Abstract: An apparatus including a first spindle group for chucking a first gear, whereby the first gear is mountable on the first spindle group so that it is rotatable, and a second spindle group for chucking a second gear, whereby the second gear is mountable on the second spindle group so that it is rotatable. The apparatus further defining a first linear axis oriented to perform a first linear displacement of the first spindle group relative to the second spindle group; a second linear axis oriented to perform a second linear displacement of the first spindle group relative to the second spindle group; and at least one of a swivel axis oriented to perform pivoting of the first spindle group thereabout, and a swivel axis oriented to perform pivoting of the second spindle group thereabout.

Abstract: An in-plane MEMS or NEMS detection device for measuring displacements directed along a direction including a seismic mass suspended with respect to a substrate, the seismic mass being pivotable about an axis perpendicular to the plane of the substrate, at least one piezoresistive strain gauge mechanically connected to the seismic mass and the substrate, wherein the piezoresistive gauge has a thickness lower than that of the seismic mass, and wherein the axis of the piezoresistive strain gauge is orthogonal to the plane containing the pivot axis and the center of gravity of the seismic mass and the plane is orthogonal to the direction of the displacements to be measured.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least a gate structure thereon and an interlayer dielectric (ILD) layer surrounding the gate structure, wherein the gate structure comprises a hard mask thereon; forming a dielectric layer on the gate structure and the ILD layer; removing part of the dielectric layer to expose the hard mask and the ILD layer; and performing a surface treatment to form a doped region in the hard mask and the ILD layer.

Abstract: A tool for inspecting the integrity of fasteners in their environment of use and methods of performing such inspections are disclosed and claimed. The tool includes a probe that matches the internal socket by which the fastener is coupled to the workpiece. The probe contains ultrasonic transducers on flat portions corresponding to flat portions of the socket. The transducers induce angled ultrasonic beams into the fastener to detect flaws therein. The beams are angled so they can be directed to the areas of interest at the head to shank region of the fastener. The presence of a defect such as a crack is determined based on the reply/echoes of the imparted ultrasonic beams.

Abstract: The present disclosure involves a method of fabricating a semiconductor device. A surface of a silicon wafer is cleaned. A first buffer layer is then epitaxially grown on the silicon wafer. The first buffer layer contains an aluminum nitride (AlN) material. A second buffer layer is then epitaxially grown on the first buffer layer. The second buffer layer includes a plurality of aluminum gallium nitride (AlxGa1-xN) sub-layers. Each of the sub-layers has a respective value for x that is between 0 and 1. A value of x for each sub-layer is a function of its position within the second buffer layer. A first gallium nitride (GaN) layer is epitaxially grown over the second buffer layer. A third buffer layer is then epitaxially grown over the first GaN layer. A second GaN layer is then epitaxially grown over the third buffer layer.

Abstract: A vehicle may include an operative sub-system positioned within a body of the vehicle, and a sensor assembly secured to the operative sub-system. The sensor assembly may include at least one sensor configured to detect vibration or shock energy, directed into the operative sub-system; and a processing unit configured to determine damage to the operative sub-system as damage data that is based on one or both of a magnitude and duration of the vibration or shock energy detected by the sensor(s). The sensor assembly may be self-powered.

Abstract: A method includes providing a semiconductor-on-insulator structure including a semiconductor substrate, a layer of electrically insulating material over the semiconductor substrate and a layer of semiconductor material over the layer of electrically insulating material. A first transistor is formed. The formation of the first transistor includes forming a dummy gate structure over the layer of semiconductor material, forming a source region of the first transistor and a drain region of the first transistor in portions of the semiconductor substrate adjacent the dummy gate structure, forming an electrically insulating structure annularly enclosing the dummy gate structure and performing a replacement gate process. The replacement gate process includes removing the dummy gate structure and a portion of the layer of semiconductor material below the dummy gate structure, wherein a recess is formed in the electrically insulating structure. The recess is filled with an electrically conductive material.

Abstract: Provided are a power device having an improved field stop layer and a method of manufacturing the same. The power device includes: a first field stop layer formed of a semiconductor substrate and of a first conductive type; a second field stop layer formed on the first field stop layer and of the first conductive type, the second field stop layer having a region with an impurity concentration higher than the first field stop layer; a drift region formed on the second field stop layer and of the first conductive type, the drift region having an impurity concentration lower than the first field stop layer; a plurality of power device cells formed on the drift region; and a collector region formed below the first field stop layer, wherein the second field stop layer includes a first region having a first impurity concentration and a second region having a second impurity concentration higher than the first impurity concentration.

Abstract: A thermal mass dispersion flow rate sensing transducer and transducer assembly or instrument for improved functional life of the transducer without degradation in sensing accuracy. Several aspects of the transducer components and structure reduce thermal leakage within the transducer so the sensor (RTD) output signal is accurately transmitted to the signal processor, resulting in precise ?T determinations and consequent precise determinations of mass flow rate of the fluid flowing in the conduit. Additionally, the same components and structure also have long life without appreciable degradation, thereby delaying any basis for the need for recalibration of the instrument.

Abstract: A tire testing apparatus for testing a tire comprises a loading means for the tire (17), a measuring head (20, 22, 24) which is movable relative to the tire (17), and lower bearing elements (7) on which the tire (17) can be positioned in vertical position. To improve such tire testing apparatus, the tire testing apparatus comprises upper bearing elements (8) which are movable relative to the lower bearing elements (7) and which together with the lower bearing elements (7) form a holder for the tire (17). (FIG.

Abstract: In a silicon carbide semiconductor device, a p-type SiC layer is disposed in a corner of a bottom of a trench. Thus, even if an electric field is applied between a drain and a gate when a MOSFET is turned off, a depletion layer in a pn junction between the p-type SiC layer and an n? type drift layer greatly extends toward the n? type drift layer, and a high voltage caused by an influence of a drain voltage hardly enters a gate insulating film. Hence, an electric field concentration within the gate insulating film can be reduced, and the gate insulating film can be restricted from being broken. In this case, although the p-type SiC layer may be in a floating state, the p-type SiC layer is formed in only the corner of the bottom of the trench. Thus, the deterioration of the switching characteristic is relatively low.

Abstract: A method of making a monolithic three dimensional NAND device includes forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, forming a mask layer over the stack and patterning the mask layer to form at least on opening in the mask layer to expose a top layer of the stack. The method also includes forming a metal block in the at least one opening in the mask layer, etching the stack by metal induced localized etch using the metal block in the at least one opening in the mask layer to form at least one opening in the stack and forming at least one layer of the NAND device in the at least one opening.

Abstract: A semiconductor process includes the following step. A metal gate strip and a cap layer are sequentially formed in a trench of a dielectric layer. The cap layer and the metal gate strip are cut off to form a plurality of caps on a plurality of metal gates, and a gap isolates adjacent caps and adjacent metal gates. An isolation material fills in the gap. The present invention also provides semiconductor structures formed by said semiconductor process. For example, the semiconductor structure includes a plurality of stacked structures in a trench of a dielectric layer, where each of the stacked structures includes a metal gate and a cap on the metal gate, where an isolation slot isolates and contacts adjacent stacked structures at end to end, and the isolation slot has same level as the stacked structures.

Abstract: A semiconductor device includes a semiconductor-on-insulator substrate having an insulator layer, and at least one silicon germanium (SiGe) fin having a superlattice structure. The SiGe fin is formed on an upper surface of the insulator layer. A gate stack is formed on an upper surface of the at least one silicon germanium fin. The gate stack includes first and second opposing spacers defining a gate length therebetween. First and second epitaxial source/drain structures are formed on the insulator layer. The first and second epitaxial source/drain structures extend beneath the spacer to define a silicon germanium gate channel beneath the gate stack.

Abstract: A method for identifying and quantitatively analyzing an unknown organic compound in a gaseous medium. More specifically, the method provides a gas sensor array (120a, 120b, 120c, 120d) coupled to a diluting channeling gas inlet (105) with a honeycomb configuration. Each sensor (120a, 120b, 120c, 120d) in the array receives the test gas after successive dilutions. Detected gas are identified by correlating the responses of each sensor with its associated dilution.

Abstract: To provide a semiconductor device with low power consumption. In transistors electrically connected to function as a comparator circuit, back gates are provided in the transistors functioning as current sources, and the transistors functioning as the current sources can be switched between conduction and non-conduction in accordance with a control signal supplied to the back gates. The control signal makes the transistor conductive in a period during which the comparator circuit operates and non-conductive in the other period. A semiconductor layer to be a channel formation region of the transistor included in the semiconductor device includes an oxide semiconductor.