Patents Examined by Ryan Jager
  • Reconfigurable power in a wireless power transfer system
    Patent number: 11387689
    Abstract: Embodiments described herein provide a method for wireless power transmission of reconfigurable power levels. A wireless power receiver is used to receive power from a wireless power transmitter according to a negotiated power level. The wireless power receiver determines whether a re-negotiation condition is met at the wireless power receiver. The wireless power receiver then sends, to the wireless power transmitter, a re-negotiation request for an updated power level different from the negotiated power level. The wireless power receiver receives, from the wireless power transmitter, an acknowledgement that acknowledges the updated power level, and then operates to receive power from the wireless power transmitter according to the updated power level.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: July 12, 2022
    Assignee: Integrated Device Technology, Inc
    Inventor: Detelin Borislavov Martchovsky
  • Pulse signal sending circuit
    Patent number: 11387821
    Abstract: A pulse signal sending circuit that outputs pulse signals from an output terminal includes: an output transistor; an inverter circuit; and a delay circuit. The output transistor includes a drain terminal connected to the output terminal. The inverter circuit is connected to a gate terminal of the output transistor and outputs a signal to be input to the gate terminal of the output transistor. The delay circuit receives a pulse signal as an input and delays rising or falling of the input pulse signal. The pulse signal delayed by the delay circuit is input to the inverter circuit.
    Type: Grant
    Filed: January 30, 2021
    Date of Patent: July 12, 2022
    Assignee: MITSUMI ELECTRIC CO., LTD.
    Inventor: Keizo Kumagai
  • Apparatus and method for interpolating between a first signal and a second signal
    Patent number: 11387841
    Abstract: An apparatus for interpolating between a first signal and a second signal is provided. The apparatus includes a first plurality of interpolation cells configured to generate a first interpolation signal at a first node. At least one of the first plurality of interpolation cells is configured to supply, based on a first number of bits of a control word, at least one of the first signal and the second signal to the first node. The apparatus further includes a second plurality of interpolation cells configured to generate a second interpolation signal at a second node. At least one of the second plurality of interpolation cells is configured to supply, based on a second number of bits of the control word, at least one of the first signal and the second signal to the second node.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: July 12, 2022
    Assignee: INTEL CORPORATION
    Inventors: Ofir Degani, Rotem Banin, Assaf Ben-Bassat, Bassam Khamaisi, Gil Asa
  • Processing circuit with multiple power supply ports and electronic device
    Patent number: 11381091
    Abstract: The invention provides a processing circuit with multiple power supply ports and an electronic device. The processing circuit includes: N power supply ports; a first-level power supply; N middle transmission modules, connected between the first-level power supply and the corresponding power supply port, wherein at least one of which is used as a second-level power supply; and a charging protocol control module. The charging protocol control module is respectively connected to the first-level power supply, the N power supply ports, and the N middle transmission modules. The second-level power supply operates in a switching power mode or a pass through mode. In the pass through mode, the output voltage of the second-level power supply matches the input voltage received by the first-level power supply, and the output voltage of the second-level power supply is not adjustable.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: July 5, 2022
    Assignee: SHENZHEN WING SEMICONDUCTOR CO., LTD.
    Inventors: Rui Fang, Wenjun Liu, Yong Zhang
  • Miller transition control gate drive circuit
    Patent number: 11381236
    Abstract: Aspects of the present disclosure are directed toward designs and methods of improving driving of switching devices. One proposed solution to improving driving of switching devices is an auxiliary control circuit that selectively guides the switching device through at least one switching region, permitting an improved operation of the switching device.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: July 5, 2022
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Ramanujam Ramabhadran, Krishna Mainali, Kum-Kang Huh, Maja Harfman-Todorovic, Robert James Thomas, Cong Li
  • Interpolation circuit of optical encoder
    Patent number: 11371864
    Abstract: There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: June 28, 2022
    Assignee: PIXART IMAGING INC.
    Inventors: Swee-Lin Thor, Gim-Eng Chew
  • High-voltage power supply device
    Patent number: 11373851
    Abstract: A negative DC voltage is supplied to a flight tube from a negative voltage generator by turning on switching elements and turning off other switching elements during performance of a measurement, and a capacitor is charged by an auxiliary positive voltage generator by turning on a switching element. When an applied voltage is switched from a negative to a positive polarity, a large current is supplied to the flight tube from the capacitor by turning off the switching elements and turning on the switching element, and thus a capacitance is quickly charged to a positive potential. Thereafter, a stable positive DC voltage is applied to the flight tube from a positive voltage generator by turning off the switching element and turning on the switching element.
    Type: Grant
    Filed: September 4, 2017
    Date of Patent: June 28, 2022
    Assignee: SHIMADZU CORPORATION
    Inventors: Yasushi Aoki, Takuro Kishida
  • Zero-offset phase detector apparatus and method
    Patent number: 11374578
    Abstract: A phase detection circuit includes a first phase detection path having a first input to receive a first signal, and a second input to receive a second signal. Asynchronous transition detection circuitry detects an early/late relationship between the first signal and the second signal when at least one of the first signal and the second signal transitions from a first state to a second state. Output circuitry generates a control signal with a value based on the early/late relationship.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: June 28, 2022
    Assignee: Movellus Circuits Inc.
    Inventors: Chun-Ju Chou, Yuxiang Mu, Jeffrey Alan Fredenburg
  • Multiphase signal generator
    Patent number: 11368143
    Abstract: An apparatus which includes a multiphase signal generator circuit. The multiphase signal generator circuit is configured to receive as input a complementary analog signal having a fundamental frequency, and generate a plurality of output complementary analog signals. Each output complementary analog signal comprises the same fundamental frequency as the input complementary analog signal, and wherein each output complementary analog signal comprises a different phase.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: June 21, 2022
    Assignee: International Business Machines Corporation
    Inventors: Sudipto Chakraborty, Rajiv Joshi
  • Wide-band frequency synthesizer for zero-IF WLAN radio transceiver and method thereof
    Patent number: 11356109
    Abstract: A frequency synthesizer includes a clock multiplier unit configured to receive a first clock and output a second clock in accordance with a multiplication factor; a divide-by-three circuit configured to receive the second clock and output a third clock; a first divide-by-two circuit configured to receive the second clock and output a fourth clock; a second divide-by-two circuit configured to receive the fourth clock and output a fifth clock; a first multiplexer configured to receive the third clock and the fourth clock and output a seventh clock in accordance with a first selection signal; a second multiplexer configured to receive the third clock and the fifth clock and output an eighth clock in accordance with a second selection signal; and a mixer configured to receive the seventh clock and the eighth clock and output an output clock.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: June 7, 2022
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Chia-Liang (Leon) Lin
  • Low-loss bi-directional passive LSB phase shifter in mm-wave CMOS
    Patent number: 11356084
    Abstract: A phase shifter with a first port and a second port has a triple inductor network with a center inductor connected to the first port and the second port, and first and second peripheral inductors each electromagnetically coupled to the center inductor. A resistance switch network that is connected to the first and second peripheral inductors. The resistance switch network is selectively activatable to set a first state defined at least by a first resistance in a series circuit with the first and second peripheral inductors, a second state defined at least by a second resistance in the series circuit, and a third state defined at least by a third resistance in the series circuit. A transmission signal from the first port to the second port is shifted in phase by a prescribed angle corresponding to forward transmission coefficients for the first state, second state, and third state.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: June 7, 2022
    Assignee: Mobix Labs, Inc.
    Inventors: Oleksandr Gorbachov, Lisette L. Zhang
  • Energy storage module with XRAM current multiplier
    Patent number: 11356080
    Abstract: An electrical machine includes as part of its stator XRAM windings for multiplying current output of the machine. The XRAM windings are coupled to switching elements that are configured to produce current multiplication for output to an external load. The XRAM windings may be in slots in the stator, or may be elsewhere in the stator, operatively coupled to other windings in the stator. The stator may be operatively coupled to a rotor and hence to an inertial energy source, such as a flywheel on the same shaft as the elements of the electrical machine. Short circuiting of select windings of the machine can advantageously cause a shifting and concentration of a machine airgap flux of the machine over other windings, and increasing their magnetic storage energy.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: June 7, 2022
    Assignee: Raytheon Company
    Inventor: Stephen Kuznetsov
  • Delay circuit and phase interpolator
    Patent number: 11349466
    Abstract: A delay circuit includes a first delay line suitable for delaying a first clock by a delay value that is adjusted based on a delay control code; a delay control circuit suitable for comparing a phase of the first clock delayed through the first delay line with a phase of a second clock to generate the delay control code; and a second delay line having, based on a delay control code, a delay value corresponding to a half of the delay value of the first delay line.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: May 31, 2022
    Assignee: SK hynix Inc.
    Inventors: Ji Hwan Park, Jun Il Moon, Byung Kuk Yoon, Myeong Jae Park
  • Power converter with reconfigurable output
    Patent number: 11347252
    Abstract: A power converter includes an input circuit, an output circuit, and a configuration circuit. The input circuit is configured to receive an input voltage or current. The output circuit is electrically isolated from the input circuit and is configured to generate a combined output voltage or a combined output current in response to the input circuit. The output circuit includes a plurality of output stages that are each configured to generate a respective partial output voltage or current. The configuration circuit is coupled to the plurality of output stages to dynamically reconfigure a connection among the plurality of output stages to combine the respective partial output voltages or currents to adjust the combined output voltage, the combined output current, or a combined output impedance of the power converter.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: May 31, 2022
    Assignee: Facebook Technologies, LLC
    Inventors: Jonathan Robert Peterson, Andrew John Ouderkirk, Maik Andre Scheller, Christopher Yuan-Ting Liao
  • Electronic device to perform power management and operating method thereof
    Patent number: 11347253
    Abstract: An electronic device according to an embodiment may include: a plurality of loads, a processor, and a power management circuit configured to provide the plurality of loads with a power, wherein the power management circuit may include a plurality of regulators configured to adjust a voltage of a power received from a power source and output a voltage-adjusted power, a switching circuit configured to connect at least one of the plurality of regulators to at least one of the plurality of loads, a plurality of power sensors each power sensor being configured to measure a magnitude of a power input to each of the plurality of loads, and a controller.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: May 31, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaeseok Park, Sungku Yeo, Youngho Ryu, Jaesun Shin, Jeongman Lee, Chongmin Lee, Hyoseok Han
  • Method for amplifier load current cancellation in a current integrator and current integrator with amplifier load current cancellation
    Patent number: 11349439
    Abstract: The amplifier load current cancellation in a current integrator comprises applying an input current to an operational transconductance amplifier provided with an integration capacitor for current integration, leading an output current of the operational transconductance amplifier through a sensing resistor, thus producing a voltage drop over the sensing resistor, generating a cancellation current dependent on the voltage drop over the sensing resistor, and injecting the cancellation current to the output current, before or after the output current passes the sensing resistor, thus eliminating a dependence of the output current on the input current.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: May 31, 2022
    Assignee: AMS INTERNATIONAL AG
    Inventor: Fridolin Michel
  • Amplifier and signal processing circuit
    Patent number: 11342892
    Abstract: The present technology relates to an amplifier and a signal processing circuit that can reduce deterioration of signal quality. A voltage-to-time converter (VTC) integrates error information included in an output pulse width modulation (PWM) signal that is a PWM signal to be output to an outside of a device, so as to convert the error information into error time information. A delay unit generates a plurality of delayed signals using an input PWM signal that is a PWM signal input from the outside of the device. A signal selection unit selects a delayed signal according to the error time information from the plurality of delayed signals and outputs the output PWM signal. The present disclosure can be applied to, for example, an audio player.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 24, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kazuki Akutagawa
  • Vehicle redundant energy system
    Patent number: 11342784
    Abstract: In general, one or more loads on a vehicle can be connected to both a first voltage source on the vehicle and a backup vehicle power system on the vehicle. If the voltage provided by the first voltage source to the one or more loads satisfies a voltage threshold, the backup vehicle power system does not provide power to the one or more loads. However, if the voltage provided by the first voltage source to the one or more loads falls below the voltage threshold, the backup vehicle power system provides power to the one or more loads.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: May 24, 2022
    Assignee: Woven Planet North America, Inc.
    Inventors: Chen-yu Hsieh, Catalin Popovici
  • Modular interleaving techniques for scalable power electronics converter
    Patent number: 11334108
    Abstract: A power management integrated circuit comprises a modular interleaved clock generator comprising a plurality of interconnected modular elements, each element constructed to generate and output a clock signal, and each one comprising: a phase port high input; a phase port low input; a clock input; and a bypass switch coupled between the phase port high input and the phase port low input, wherein in response to the bypass switch of at least one of the plurality of elements in a closed state, the phase port high inputs or the phase port low inputs of the remaining elements absent the at least one interleaving controller having the bypass switch in the closed state each receives a voltage that interleaves the clock signals output from the remaining active elements to have an interleaving arrangement that includes equal phase delays.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: May 17, 2022
    Assignee: NXP USA, INC.
    Inventors: Miguel Mannes Hillesheim, Marc Michel Cousineau, Eric Pierre Rolland, Philippe Goyhenetche, Guillaume Jacques Léon Aulagnier
  • Clock monitoring unit with serial clock routing pipeline
    Patent number: 11327525
    Abstract: An apparatus including a serial clock routing pipeline including a first set of clock inputs and a clock output; a first set of clock generators including a first set of clock outputs coupled to the first set of clock inputs of the serial clock routing pipeline, respectively; and a first clock monitoring unit including a first clock input coupled to the clock output of the serial clock routing pipeline, and a first status output to provide information concerning one or more of the first set of clock generators. The apparatus may further include a set of phase locked loops (PLLs) coupled to the set of clock generators, respectively; the set of PLLs also coupled to the clock monitoring unit.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: May 10, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Federico Salluzzo, Sina Dena, Amod Phadke, Vanamali Bhat