Patents Examined by Saleha R. Mohamedulla
  • Patent number: 6517978
    Abstract: A microlithography mask for producing equal size features in a substrate. A first region exposes a first portion of the substrate corresponding to a first feature that is to be formed on the substrate. At least one compensating region in the vicinity of the first region partially exposes the first portion of the substrate and a second portion of the substrate corresponding to a second feature, wherein the second feature is to be removed from the substrate.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: February 11, 2003
    Assignee: International Business Machines Corporation
    Inventor: Song Peng
  • Patent number: 6517982
    Abstract: A method of forming a photoresist pattern by a photolithography technique is composed of: providing a photoresist layer; exposing the photoresist layer to a first pattern-defining light using a first mask; and exposing the photoresist layer to a second pattern-defining light using a second mask. The first mask includes a shielding region shielding the first pattern-defining light. The second mask includes a phase-shifting region having a phase shifter edge and a non-phase-shifting region adjacent to the phase-shifting region on the phase shifter edge. A first light portion of the second pattern-defining light passes through the phase-shifting region. A second light portion of the second pattern-defining light passes through the non-phase-shifting region. A first phase of the first light portion differs from a second phase of the second light portion. The first and second masks are aligned such that the phase shifter edge overlaps on the shielding region.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: February 11, 2003
    Assignee: NEC Corporation
    Inventor: Masashi Fujimoto
  • Patent number: 6514672
    Abstract: A new method of forming a bi-layer photoresist mask with a reduced critical dimension bias between isolated and dense lines and reduced edge roughness is described. A layer to be etched is provided on a semiconductor substrate wherein the surface of the layer has an uneven topography. The layer to be etched is coated with a first planarized photoresist layer which is baked. The first photoresist layer is coated with a second silicon-containing photoresist layer which is baked. Portions of the second photoresist layer not covered by a mask are exposed to actinic light. The exposed portions of the second photoresist layer are developed away. Then, portions of the first photoresist layer not covered by the second photoresist layer remaining are developed away in a dry development step wherein sufficient SO2 gas is included in the developing recipe to reduce microloading to form a bi-layer photoresist mask comprising the first and second photoresist layers remaining.
    Type: Grant
    Filed: June 11, 2001
    Date of Patent: February 4, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Bao-Ju Young, Chia-Shiung Tsai, Ying-Ying Wang
  • Patent number: 6514648
    Abstract: A microlithography mask for producing equal size features in a substrate. A first region exposes a first portion of the substrate corresponding to a first feature that is to be formed on the substrate. At least one compensating region in the vicinity of the first region partially exposes the first portion of the substrate and a second portion of the substrate corresponding to a second feature, wherein the second feature is to be removed from the substrate.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: February 4, 2003
    Assignee: International Business Machines Corporation
    Inventor: Song Peng
  • Patent number: 6506544
    Abstract: In the exposure method of the invention, a first pattern and a second pattern are joined and exposed on a substrate using a mask having a pattern. The pattern on the mask has a common pattern for the first pattern and the second pattern, and a non-common pattern different from the common pattern and formed continuously with the common pattern. The common pattern and at least a part of the non-common pattern are selected to effect the joining and exposing. According to this method, the number of masks required for exposure processing accompanying screen synthesis can be reduced.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: January 14, 2003
    Assignee: Nikon Corporation
    Inventors: Kazuhiko Hori, Katsuya Machino, Manabu Toguchi, Masahiro Iguchi
  • Patent number: 6503664
    Abstract: The fabrication of transmissive attenuating types of phase shift masks by formation of and selective etch of a layer, deposited on a substrate. This single layer provides both the phase shift and the attenuation required and is readily patterned and processed to produce attenuating phase shift masks.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: January 7, 2003
    Assignee: International Business Machines Corporation
    Inventors: Derek Brian Dove, Kwang Kuo Shih
  • Patent number: 6503665
    Abstract: A shading member is mounted on the upper side of a corner portion of a shading zone area corresponding to an area causing triple exposure with an adhesive. It is possible to provide a phase shift mask capable of readily exposing a semiconductor substrate with no bad influence on adjacent exposed areas.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: January 7, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Naohisa Tamada
  • Patent number: 6497995
    Abstract: A low cost, durable mask for use in structuring anodically bondable glass materials and other structurable glass materials.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: December 24, 2002
    Assignee: AlliedSignal Inc.
    Inventor: Amy V. Skrobis
  • Patent number: 6495297
    Abstract: A mask and method of forming a mask for forming electrode patterns having both closely spaced lines and lines with greater separation between them. The mask uses a pattern formed using attenuating phase shifting material for the region of the mask with lines with greater separation and a binary pattern formed using opaque material in the region of the mask with closely spaced lines. The mask design data is used to determine the mask regions using attenuating phase shifting material and the regions of the mask using a binary pattern. The mask is illuminated using off axis illumination, preferably quadrapole off axis illumination. The mask is formed using electron beam exposure of a resist using more than one exposure dose so that only one layer of resist is required to form the two regions of the mask one using attenuating phase shifting material and one using a binary pattern.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: December 17, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chih-Chiang Tu, San-De Tzu
  • Patent number: 6495296
    Abstract: A method, composition, and article for patterning and depositioning a substrate employing a colloidal suspension includes the step of agitating the colloidal suspension to eliminate aggregations of colloidal particles in the substrate. The colloidal suspension may include a plurality of colloidal particles in a suspension medium which may comprise deionized water, a resist such as photoresist, and a solvent.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: December 17, 2002
    Assignee: Micron Technology, Inc.
    Inventors: David H. Wells, James J. Hofmann
  • Patent number: 6492071
    Abstract: A device and process for applying mixtures of adhesive formulations combined with solder flux such that flip chips may be rapidly encapsulated with such combinations without interfering with subsequent wafer processing steps are provided. Also provided is a wafer stencil designed in such a manner that the saw kerf lines separating individual chip dies are protected from coming into contact with the formulation. Extrusion screening using such wafer stencil is also provided.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: December 10, 2002
    Assignee: International Business Machines Corporation
    Inventors: William E. Bernier, Mark V. Pierson, Ajit K. Trivedi
  • Patent number: 6492070
    Abstract: An electron beam exposure mask is provided with a substrate portion provided with an aperture and a thin film portion supported by the substrate portion. The thin film portion is provided with a thin semiconductor active film (the first semiconductor film) and a thick semiconductor active film (the second semiconductor film) thicker than the thin semiconductor active film. A fine pattern portion having small-gauge apertures is formed in the thin semiconductor active film and a coarse pattern portion having large-gauge apertures is formed in the thick semiconductor active film. As a result, a fine pattern portion can be formed partially.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: December 10, 2002
    Assignee: NEC Corporation
    Inventor: Hideo Kobinata
  • Patent number: 6492069
    Abstract: This invention discloses a method for forming an attenuated phase-shifting mask, including following steps. A transparent plate is provided, on which a phase-shifting layer, opaque layer, and undeveloped photoresist layer being stacked on the transparent plate successively. A first part of the photoresist layer is removed until exposing a first region of the opaque layer. The first region of the opaque layer is removed for exposing parts of the phase-shifting layer. A second part of the photoresist layer is removed for exposing a second region of the opaque layer. The exposed phase-shifting layer is then etched by employing the opaque layer as an etching mask. Then the exposed opaque layer and photoresist layer are successively remove, thus forming a complete attenuated phase-shifting mask.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: December 10, 2002
    Assignee: Worldwide Semiconductor Manufacturing Corp.
    Inventors: Ching-Liang Wu, Yueh-Lin Chou, Jen-Hui Tseng
  • Patent number: 6485869
    Abstract: An apparatus comprising a mask having an active device area and a moat. The moat substantially surrounds the mask active device area and has a width greater than a plasma specie diffusional length. A method comprising depositing a layer of resist on a mask substrate having transparent and opaque layers; and exposing the resist layer to radiation. The radiation is patterned to produce features within an active device area. The radiation is also patterned to produce a moat substantially surrounding the active device area having a width greater than a plasma specie diffusional length.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: November 26, 2002
    Assignee: Intel Corporation
    Inventors: Wilman Tsai, Marilyn Kamna, Frederick Chen, Jeff Farnsworth
  • Patent number: 6482552
    Abstract: The invention encompasses a method of forming photoresist on a semiconductor wafer. A wafer is coated with a first layer of photoresist to define a first photoresist-coated wafer. The first photoresist-coated wafer is placed on a temperature-regulated mass and thermally equilibrated to a temperature. Subsequently, the first photoresist-coated wafer is photo-processed. After the photo-processing, the wafer is coated with a second layer of photoresist to define a second photoresist-coated wafer. The second photoresist-coated wafer is placed on the temperature-regulated mass and thermally equilibrated to the same temperature that the first photoresist-coated wafer had been equilibrated to. Subsequently, the second layer of photoresist is photo-processed. The invention also encompasses a reticle forming method. A layer of masking material is formed over a reticle substrate, and the reticle substrate is then placed on a temperature-regulated mass.
    Type: Grant
    Filed: October 18, 1999
    Date of Patent: November 19, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Ziad R. Hatab, Paul D. Shirley, Tony C. Krauth
  • Patent number: 6482555
    Abstract: A method for making a mask for optically transferring a lithographic pattern corresponding to an integrated circuit from the mask onto a semiconductor substrate by use of an optical exposure tool. The method includes the steps of de-composing the existing mask patterns into arrays of “imaging elements.” The imaging elements are &pgr;-phase shifted and are separated by non-phase shifting and sub-resolution elements referred to as anti-scattering bars (ASBs). In essence, the ASBs are utilized to de-compose the larger-than-minimum-width mask features to form “halftone-like” imaging patterns. The placement of the ASBs and the width thereof are such that none of the &pgr;-phase shifting elements are individually resolvable, but together they form patterns substantially similar to the intended mask features.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: November 19, 2002
    Assignee: ASML Masktools Netherlands B.V.
    Inventors: J. Fung Chen, Roger Caldwell, Tom Laidig, Kurt E. Wampler
  • Patent number: 6472107
    Abstract: A method for creating a photomask which includes a layer of hard mask material the inclusion of which improves the uniformity of critical dimensions on the photomask by minimizing the affect of macro and micro loading. The method for producing the photomask of the instant invention includes two etching processes. The first etching process etches the layer of hard mask, and the second etching process etches the anti-reflective material and opaque material.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: October 29, 2002
    Assignee: Photronics, Inc.
    Inventor: David Y. Chan
  • Patent number: 6472109
    Abstract: In one aspect, the invention includes a method of maintaining dimensions of an opening in a semiconductive material stencil mask comprising providing two different dopants within a periphery of the opening, the dopants each being provided to a concentration of at least about 1017 atoms/cm3.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: October 29, 2002
    Assignee: Micron Technology, Inc.
    Inventor: J. Brett Rolfson
  • Patent number: 6465138
    Abstract: There are provided methods for making a reticle for use in a photolithography process, comprising forming at least two printable features on a reticle substrate, and forming at least one sub-resolution connecting structure on the reticle substrate, the sub-resolution connecting structure connecting at least two of the printable reticle features, as well as reticles formed according to such methods. In addition, there are provided computer-implemented methods for designing such a reticle, as well as computer readable storage media, computer systems and computer programs for use in making such reticles. In addition, there are provided photolithographic processes using such a reticle. The reticle may be a binary mask, a phase shift mask, or an attenuated phase shift mask.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: October 15, 2002
    Inventor: William Stanton
  • Patent number: 6465139
    Abstract: The invention is a mask pattern comprising a first region that is strip-shaped and has two long sides and two short sides, and two second regions that are strip-shaped with each region having two long sides and two short sides, in which the short sides of the second regions are shorter than the sides of the first region, and the second regions extend in a lengthwise direction from the two short sides of the first region, respectively, with the short sides of the second regions adjacent to the short sides of the first region. The mask pattern is used to define a floating gate region in a flash memory.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: October 15, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yau-feng Lo, Shiou-han Liaw, Jiaren Chen, Paul Chuang, Calvin Wu, Maxwell Lai