Abstract: Provided is a display substrate including a first display region and at least one second display region, wherein light transmittance of the second display region is greater than light transmittance of the first display region. The second display region of the display substrate is provided with a light adjustment layer configured to adjust a light transmission effect of the second display region.

Abstract: A display apparatus includes a first substrate having a display area and a non-display area; a pixel array layer provided on the display area of the first substrate; and a second substrate provided on the pixel array layer and having first and second grooves at side edges of the second substrate, wherein the first and second grooves are respectively located at first and second bending areas to facilitate a curvature radius of the end portions of the display and achieve a zero bezel display.

Abstract: Described herein is an optical sensor, a detector including the optical sensor for an optical detection of at least one object, and a method for manufacturing the optical sensor. The optical sensor (110) includes a substrate (120); a photoconductive layer (112) applied to a first portion (116) of a surface (118) of the substrate (120); and at least one electrode layer (124) applied to a second portion (126) of the surface (118) of the substrate (120). The optical sensor (110) exhibits a linear current-voltage characteristic according to Ohm's law.

Abstract: A semiconductor device includes a plurality of active area structures. One or more active devices include portions of the plurality of active area structures. A metal layer is formed on the plurality of active area structures and separated from the one or more active devices by one or more dummy gate layers. The metal layer is configured to measure, due to a change of resistance in the metal layer, a temperature of the plurality of active area structures.

Abstract: A semiconductor device and a manufacturing method are provided. The semiconductor device includes an active region, a bit line, a capacitor contact, a conductive ring and a storage capacitor. The active region is formed in a substrate. The bit line and the capacitor contact are disposed over the substrate and electrically connected with the active region. The bit line is laterally separated from the capacitor contact, and a top surface of the bit line is lower than a top surface of the capacitor contact. An upper portion of the capacitor contact is surrounded by the conductive ring. The storage capacitor is disposed over and in electrical contact with the capacitor contact and the conductive ring.

Abstract: A programmable array including a plurality cells aligned in a row on a substrate, wherein each of the plurality of cells includes a programmable element and a transistor, wherein the transistor includes a body including a first diffusion region and a second diffusion region on the first diffusion region and separated by a channel and the programmable element is disposed on the second diffusion region. A method of forming an integrated circuit including forming transistor bodies in a plurality rows on a substrate; forming a masking material as a plurality of rows across the bodies; etching the bodies through the masking material to define a width dimension of the transistor bodies; after etching the bodies, patterning each of the plurality of rows of the masking material into a plurality of individual masking units; and replacing each of the plurality of individual masking units with a programmable element.

Abstract: A display apparatus can include a substrate including a plurality of subpixels and a plurality of contact portions provided on one side of each of the plurality of subpixels, an insulating layer provided on the substrate, a first electrode provided in each of the plurality of subpixels and each of the plurality of contact portions on the insulating layer, a fence provided on the first electrode, a light emitting layer provided on the insulating layer, the fence, and the first electrode, a second electrode provided on the light emitting layer, a filling layer provided on the second electrode, and a trench provided in the fence and the insulating layer. The trench can include a first trench provided between the contact portions adjacent to each other and a second trench provided between the subpixels adjacent to each other.

Abstract: An organic light-emitting display device includes a pixel area and a transmitting area adjacent to the pixel area. The organic light-emitting display device includes an organic light-emitting diode, a driving power wiring, and a heating pattern adjacent to the driving power wiring. The organic light-emitting diode includes a first electrode disposed in the pixel area, an organic light-emitting layer disposed on the first electrode and a second electrode disposed on the organic light-emitting layer. The driving power wiring is electrically connected to the second electrode. A portion of the organic light-emitting layer is disposed in the transmitting area. The organic light-emitting layer includes an opening area overlapping the heating pattern and at least a portion of the driving power wiring. The second electrode electrically contacts the driving power wiring through the opening area.

Abstract: The system-on-chip camera comprises a semiconductor body with an integrated circuit, a sensor substrate, sensor elements arranged in the sensor substrate according to an array of pixels, a light sensor in the sensor substrate apart from the sensor elements, and a lens or an array of lenses on a surface of incidence. Filter elements, which may especially be interference filters for red, green or blue, are arranged between the sensor elements and the surface of incidence.

Abstract: A flip-chip light emitting diode (LED) includes: a sapphire substrate having an edge; an epitaxial layer over the substrate, wherein the epitaxial layer comprises: a first semiconductor layer, a second semiconductor layer, and a light emitting layer between the first semiconductor layer and the second semiconductor layer, wherein the epitaxial layer is divided into an epitaxial bulk layer and a barrier structure; and an insulating layer over the epitaxial bulk layer, wherein a portion of the insulating layer that covers a sidewall of the epitaxial bulk layer is separated from the edge of the substrate by the barrier structure.

Abstract: Some embodiments include an integrated assembly having a pillar of semiconductor material. The pillar has a base region, and bifurcates into two segments which extend upwardly from the base region. The two segments are horizontally spaced from one another by an intervening region. A conductive gate is within the intervening region. A first source/drain region is within the base region, a second source/drain region is within the segments, and a channel region is within the segments. The channel region is adjacent to the conductive gate and is vertically disposed between the first and second source/drain regions. Some embodiments include methods of forming integrated assemblies.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a gate structure formed on the substrate; a source region and a drain region formed in the substrate on either side of the gate structure, the source region and the drain region both having a first type of conductivity; and a dielectric layer having a first portion and a second portion, wherein the first portion of the dielectric layer is formed on a portion of the gate structure, and the second portion of the dielectric layer is formed on the substrate and extending to a portion of the drain region, wherein the dielectric layer includes at least one recess on the second portion. An associated fabricating method is also disclosed.

Abstract: A display device includes: a semiconductor layer; a gate insulating film; a first display wire; a first interlayer insulating film; a second display wire; a second interlayer insulating film; and a third display wire stacked on a substrate in this order, pixel circuits being provided corresponding to intersections of data signal lines and scanning signal lines included in the third display wire, each of the pixel circuits including a first transistor and a second transistor in which any one of the scanning signal lines overlaps the semiconductor layer through the gate insulating film, one terminal of the first transistor and one terminal of the second transistor are connected together through a connector included in a conductor region of the semiconductor layer, and the connector includes an overlap connector overlapped in a plan view with the data signal lines through a constant potential wires included in the first display wire.

Abstract: The present disclosure describes a method of forming an epitaxial layer on a substrate in a chamber. The method includes cleaning the chamber with a first etching gas and depositing the epitaxial layer on the substrate. Deposition of the epitaxial layer includes epitaxially growing a first portion of the epitaxial layer with a precursor, cleaning the substrate and the chamber with a flush of a second etching gas different from the first etching gas, and epitaxially growing a second portion of the epitaxial layer with the precursor. The first portion and the second portion have the same composition. The method furthers includes etching a portion of the epitaxial layer with a third etching gas having a flow rate higher than that of the second etching gas.

Abstract: The present invention discloses a super-flexible transparent semiconductor film and a preparation method thereof, the method includes: providing an epitaxial substrate; growing a sacrificial layer on the epitaxial substrate; stacking and growing at least one layer of Al1-nGanN epitaxial layer on the sacrificial layer, wherein 0<n?1; growing a nanopillar array containing GaN materials on the Al1-nGanN epitaxial layer; etching the sacrificial layer so as to peel off an epitaxial structure on the sacrificial layer as a whole; and transferring the epitaxial structure after peeling onto a surface of the flexible transparent substrate. Compared to traditional planar films, the present invention can not only improve the crystal quality by releasing stress, but also improve flexibility and transparency through characteristics of the nanopillar materials.

Abstract: A method of forming a storage cell includes: forming a transistor on a semiconductor substrate; forming a plurality of fuses in at least one conductive layer on the semiconductor substrate to couple a connecting terminal of the transistor; forming a bit line to couple the plurality of fuses; and forming a word line to couple a control terminal of the transistor.

Abstract: A method for fabricating memory cell of magnetoresistive RAM includes forming a memory stack structure on a first electrode layer. The memory stack structure includes a SAF layer to serve as a pinned layer; a magnetic free layer and a barrier layer sandwiched between the SAF layer and the magnetic free layer. A second electrode layer is then formed on the memory stack structure. The SAF layer includes a first magnetic layer, a second magnetic layer, and a spacer layer of a first metal element sandwiched between the first magnetic layer and the second magnetic layer. The first metal element is phase separated from a second metal element of the first and second magnetic layers, and the second metal element of the first magnetic layer and the second magnetic layer interfaces with the spacer layer.

Abstract: A display device including: a substrate; a plurality of display elements defining a display area on the substrate and each including a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode; a power supply wiring disposed outside the display area; an organic insulating layer on the power supply wiring and having an opening exposing the power supply wiring; a power supply electrode layer partially disposed on the organic insulating layer and including a plurality of holes over the organic insulating layer. A first portion of the power supply electrode layer overlaps the power supply wiring and a second portion of the power supply electrode layer overlaps the opposite electrode; a plurality of protrusions spaced apart from each other and respectively covering at least some of the plurality of holes; and an encapsulation layer covering the plurality of display elements.

Abstract: A Mie photo sensor is described. A Mie photo sensor is configured to leverage Mie scattering to implement a photo sensor having a resonance. The resonance is based on various physical and material properties of the Mie photo sensor. In an example, a Mie photo sensor includes a layer of semiconductor material with one or more mesas. Each mesa of semiconductor material may include a scattering center. The scattering center is formed by the semiconductor material of the mesa being at least partially surround by a material with a different refractive index than the semiconductor material. The abutting refractive index materials create an interface that forms a scattering center and localizes the generation of free carriers during Mie resonance. One or more electrical contacts may be made to the mesa to measure the electrical properties of the mesa.

Abstract: A display panel including a substrate including a display area surrounding an opening area and a non-display area between the opening area and the display area; a plurality of display elements on the display area; a plurality of scan lines extending in a first direction and detouring around an edge of the opening area; a plurality of data lines extending in a second direction that intersects with the first direction, the plurality of data lines detouring around the edge of the opening area; and a plurality of emission control lines extending in the first direction and detouring around the edge of the opening area.