Patents Examined by Suberr L Chi
  • Patent number: 11616117
    Abstract: A display apparatus includes: a substrate comprising a main display area, a component area, and a peripheral area; a main pixel electrode at the main display area of the substrate; a main thin-film transistor at the main display area of the substrate and electrically connected to the main pixel electrode; an auxiliary pixel electrode at the component area of the substrate; an auxiliary thin-film transistor at the peripheral area of the substrate; and a connecting wire connected to the auxiliary pixel electrode and including a thin portion having a thickness less than a thickness of the auxiliary pixel electrode, wherein the connecting wire electrically connects the auxiliary thin-film transistor to the auxiliary pixel electrode.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: March 28, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Juhyun Lee, Hyuneok Shin, Sungjoo Kwon
  • Patent number: 11609373
    Abstract: An optical coupling device includes a light receiving element including a first output terminal and a second output terminal, a light emitting element provided on the light receiving element, a first switching element, a first electrode plate, and a sealing member. The first switching element includes a first main terminal connected to the first output terminal, a first control terminal connected to the second output terminal, and a second main terminal. An upper surface of the first electrode plate is connected to the second main terminal. The sealing member covers the light receiving element, the light emitting element, and the first switching element. A lower surface of the first electrode plate is exposed on a lower surface of the sealing member. The lower surface of the first electrode plate and the lower surface of the sealing member form the same plane.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: March 21, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Mami Fujihara, Naoya Takai, Kazuki Tanaka
  • Patent number: 11610943
    Abstract: The present application relates to the field of display technology, and in particular, to a display panel, method for manufacturing a display panel and display device. The display panel includes: a base substrate; a pixel layer, provided on the base substrate and comprising a plurality of pixel islands; and a microlens layer, provided on a surface of the pixel layer facing away from the base substrate. Each of pixel islands includes a plurality of sub-pixels that emit light of a same color and are seamlessly coupled to each other, and the light emitted by the plurality of sub-pixels in each of the pixel islands is refracted by the microlens layer to be dispersed to different pixel areas.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: March 21, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dongni Liu, Minghua Xuan, Li Xiao
  • Patent number: 11605682
    Abstract: An organic light emitting diode (OLED) display panel and an electronic device are provided. The OLED display includes an under-screen camera display region and a normal display region surrounding the under-screen camera display region. A pixel density of the under-screen camera display region is less than a pixel density of the normal display region. By lowering the pixel density of the under-screen camera display region, and thereby raising a light transmittance of the under-screen camera display region, an under-screen camera and a true full screen display are realized.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: March 14, 2023
    Inventors: Jun Ying, Guochao Wang
  • Patent number: 11605751
    Abstract: A device for detecting UV radiation, comprising: a SiC substrate having an N doping; a SiC drift layer having an N doping, which extends over the substrate; a cathode terminal; and an anode terminal. The anode terminal comprises: a doped anode region having a P doping, which extends in the drift layer; and an ohmic-contact region including one or more carbon-rich layers, in particular graphene and/or graphite layers, which extends in the doped anode region. The ohmic-contact region is transparent to the UV radiation to be detected.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: March 14, 2023
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Simone Rascuná, Gabriele Bellocchi, Paolo Badalá, Isodiana Crupi
  • Patent number: 11594573
    Abstract: A light-emitting device, includes a substrate with a top surface; a first light-emitting structure unit and a second light-emitting structure unit separately formed on the top surface and adjacent to each other, and wherein the first light-emitting structure unit includes a first sidewall and a second sidewall; a trench between the first and the second light-emitting structure units; and an electrical connection arranged on the first sidewall and the second light-emitting structure unit, and electrically connecting the first light-emitting structure unit and the second light-emitting structure unit; wherein the first sidewall connects to the top surface; wherein the first sidewall faces the second light-emitting structure units, and the second sidewall is not between the first light-emitting structure unit and the second light-emitting structure unit; and wherein the second sidewall is steeper than the first sidewall.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: February 28, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Fu Shen, Chao-Hsing Chen, Tsun-Kai Ko, Schang-Jing Hon, Sheng-Jie Hsu, De-Shan Kuo, Hsin-Ying Wang, Chiu-Lin Yao, Chien-Fu Huang, Hsin-Mao Liu, Chien-Kai Chung
  • Patent number: 11587935
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a fin positioned on the substrate, a gate structure positioned on the fin, a pair of source/drain regions positioned on two sides of the fin, a dielectric layer positioned above the drain region and adjacent to the gate structure, and a storage conductive layer positioned on the dielectric layer. The drain region, the dielectric layer and the storage conductive layer form a storage structure.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: February 21, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Sheng-Hui Yang
  • Patent number: 11581450
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and/or PIN diode structures and methods of manufacture. The structure includes: at least one vertical pillar feature within a trench; a photosensitive semiconductor material extending laterally from sidewalls of the at least one vertical pillar feature; and a contact electrically connecting to the photosensitive semiconductor material.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: February 14, 2023
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Mark D. Levy, Siva P. Adusumilli, Vibhor Jain, John J. Ellis-Monaghan
  • Patent number: 11575112
    Abstract: The present disclosure provides a gasket for a display device and a display device. The gasket includes a body, the body having a plurality of via hole structures penetrating through the body in the same direction. The display device includes a display panel, the display panel having a bending structure bent toward the back of the display panel, the gasket being located between the bending structure and the display panel opposite to the bending structure, and the gasket is the above-mentioned gasket.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: February 7, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chao Fu, Shihua Huang, Jing Wang, Wei Li
  • Patent number: 11569285
    Abstract: A solid-state imaging device having a first area and a second area surrounding the first area is provided. The solid-state imaging device includes a substrate having a plurality of photoelectric conversion elements. The solid-state imaging device also includes a color filter layer disposed on the substrate. The color filter layer includes a plurality of color filter segments corresponding to the plurality of photoelectric conversion elements. The solid-state imaging device further includes an optical waveguide layer over the color filter layer. The optical waveguide layer includes a waveguide partition grid, a waveguide material in spaces of the waveguide partition grid, and an anti-reflection film on the waveguide partition grid and the waveguide material. The width of the top of the waveguide partition grid is larger than the width of the bottom of the waveguide partition grid.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: January 31, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventor: Chi-Han Lin
  • Patent number: 11569439
    Abstract: A memory device that includes a first magnetic insulating tunnel barrier reference layer present on a first non-magnetic metal electrode, and a free magnetic metal layer present on the first magnetic insulating tunnel barrier reference layer. A second magnetic insulating tunnel barrier reference layer may be present on the free magnetic metal layer, and a second non-magnetic metal electrode may be present on the second magnetic insulating tunnel barrier. The first and second magnetic insulating tunnel barrier reference layers are arranged so that their magnetizations are aligned to be anti-parallel.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: January 31, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Daniel C. Worledge
  • Patent number: 11569322
    Abstract: A display device includes: a substrate including a display area and a transmission area; a blocking layer disposed in the display area of the substrate and including a first blocking layer and a second blocking layer that is disposed on the first blocking layer; an insulating layer disposed on the blocking layer; a transistor disposed on the insulating layer; and a light emitting element connected to the transistor, wherein a first reflectivity of the first blocking layer is smaller than a second reflectivity of the second blocking layer, and a first absorption coefficient of the first blocking layer is smaller than a second absorption coefficient of the second blocking layer.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: January 31, 2023
    Inventors: Jin Seock Ma, Gyung Min Baek, Hyun Eok Shin, Ju Hyun Lee, Moo Soon Ko, Jin Goo Jung, Kyung Hyun Choi
  • Patent number: 11569258
    Abstract: Some embodiments include a method of forming stacked memory decks. A first deck has first memory cells arranged in first tiers disposed one atop another, and has a first channel-material pillar extending through the first tiers. An inter-deck structure is over the first deck. The inter-deck structure includes an insulative expanse, and a region extending through the insulative expanse and directly over the first channel-material pillar. The region includes an etch-stop structure. A second deck is formed over the inter-deck structure. The second deck has second memory cells arranged in second tiers disposed one atop another. An opening is formed to extend through the second tiers and to the etch-stop structure. The opening is subsequently extended through the etch-stop structure. A second channel-material pillar is formed within the opening and is coupled to the first channel-material pillar. Some embodiments include integrated assemblies.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: January 31, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Liu Liu, David Daycock, Rithu K. Bhonsle, Giovanni Mazzone, Narula Bilik, Jordan D. Greenlee, Minsoo Lee, Benben Li
  • Patent number: 11563155
    Abstract: According to one embodiment, a white light source includes a combination of a light emitting diode and phosphors. One of the phosphors is at least a cerium activated yttrium aluminum garnet-based phosphor. There is no light emission spectrum peak at which a ratio of a largest maximum value to a minimum value is greater than 1.9. The largest maximum value is largest among at least one maximum value present in a wavelength range of 400 nm to 500 nm in a light emission spectrum of white light emitted from the white light source. The minimum value is adjacent to the largest maximum value in a longer wavelength side of the light emission spectrum.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: January 24, 2023
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Tatsunori Itoga, Ryoji Tsuda, Naotoshi Matsuda, Yoshitaka Funayama
  • Patent number: 11552206
    Abstract: An optical waveguide type photodetector includes a first semiconductor layer of a first conductive type, a multiplication layer of a first conductive type on the first semiconductor layer, an optical waveguide structure, and a photodiode structure. The photodiode structure has a third semiconductor layer of a second conductive type, an optical absorption layer of an intrinsic conductive type or of a second conductive type, and a second semiconductor layer of a second conductive type. The optical waveguide structure includes an optical waveguiding core layer and a cladding layer. An end face of the photodiode structure located in a second region of the first semiconductor layer and an end face of the optical waveguide structure located in a first region of the first semiconductor layer are in contact.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: January 10, 2023
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Yoshihiro Yoneda, Takuya Okimoto
  • Patent number: 11552275
    Abstract: An organic light-emitting display device and a method of fabricating the same. The organic light-emitting display device includes a substrate including a plurality of subpixels and an overcoat layer disposed in light-emitting areas of the plurality of subpixels. The overcoat layer includes microlenses composed of a plurality of concave portions or a plurality of convex portions. Organic electroluminescent devices are disposed on the overcoat layer. At least one subpixel of the plurality of subpixels includes first microlenses and second microlenses of the microlenses, the second microlenses being different from the first microlenses.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: January 10, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Hansun Park, Kangju Lee, SeungRyong Joung, Seongsu Jeon, Wonhoe Koo
  • Patent number: 11552205
    Abstract: Disclosed are devices for optical sensing and manufacturing method thereof. In one embodiment, a device for optical sensing includes a substrate, a photodetector and a reflector. The photodetector is disposed in the substrate. The reflector is disposed in the substrate and spaced apart from the photodetector, wherein the reflector has a reflective surface inclined relative to the photodetector that reflects light transmitted thereto to the photodetector.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: January 10, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chiang Chang, Chia-Chan Chen
  • Patent number: 11532526
    Abstract: A packaged electronic module for downhole applications, in particular in a petrochemical well or similar environment. The electronic module includes one or more electronic components located on each side of a substrate, where the one or more electronic components are attached to the substrate by means of glue.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: December 20, 2022
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Cleverson Souza Chaves, Francois Barbara
  • Patent number: 11532695
    Abstract: A method and semiconductor device including a substrate having one or more semiconductor devices. In some embodiments, the device further includes a first passivation layer disposed over the one or more semiconductor devices. The device may further include a metal-insulator-metal (MIM) capacitor structure formed over the first passivation layer. In addition, the device may further include a second passivation layer disposed over the MIM capacitor structure. In various examples, a stress-reduction feature is embedded within the second passivation layer. In some embodiments, the stress-reduction feature includes a first nitrogen-containing layer, an oxygen-containing layer disposed over the first nitrogen-containing layer, and a second nitrogen-containing layer disposed over the oxygen containing layer.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jin-Mu Yin, Hung-Chao Kao, Hsiang-Ku Shen, Dian-Hau Chen, Yen-Ming Chen
  • Patent number: 11527577
    Abstract: The present invention provides an array substrate and a display panel. The array substrate includes a pixel structure. The pixel structure includes a plurality of pixel units. Each of the plurality of pixel units includes a first sub-pixel, a second sub-pixel, and a third sub-pixel connected in pairs and arranged in a honeycomb pattern, which facilitates spread of printed ink droplets and increases uniformity of light emission of sub-pixels. Each of the plurality of pixel units adopts an arrangement of RB1B2G or RB1GB2. Two columns of blue sub-pixels are alternately used to balance a problem of short lifetime of blue sub-pixel.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: December 13, 2022
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Zhenfei Cai