Abstract: An image processing apparatus includes a chipset unit which processes data; a connector which includes a plurality of terminals, and is configured to connect with a cable so that the chipset unit can transmit and receive a signal to and from an external device; a switching unit which supplies power to the external device through a first terminal of the connector, and selectively controls a switching operation regarding whether or not to supply power to the first terminal on the basis of a signal state of a second terminal of the connector when the cable is connected to the connector. A control method of the image processing apparatus is also disclosed.

Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a stage provided in a chamber, and a conveying module configured to convey a plurality of wafers into the chamber and to set the plurality of wafers on the stage. The apparatus further includes a controller configured to divide treatment time for simultaneously treating the plurality of wafers on the stage into first to K-th treatment periods where K is an integer of two or more, and to change positions of one or more of the plurality of wafers on the stage by the conveying module according to the treatment periods.

Abstract: Embodiments of systems, apparatuses, and methods for energy efficiency and energy conservation including enabling autonomous hardware-based deep power down of devices are described. In one embodiment, a system includes a device, a static memory, and a power control unit coupled with the device and the static memory. The system further includes a deep power down logic of the power control unit to monitor a status of the device, and to transfer the device to a deep power down state when the device is idle. In the system, the device consumes less power when in the deep power down state than in the idle state.

Abstract: Embodiments generally relate to thermal management in a multi-node computing device. The present technology discloses techniques that can receive multiple control signals from multiple computing nodes, each of the control signals being associated with a fan duty request, which is a request for a fan duty needed to keep a related computing node operating within a predetermined temperature range. The logic controller can rank the received control signals and select a control signal that requests a highest fan duty; lastly, the logic controller can cause multiple cooling fans to operate at the selected highest fan duty.

Abstract: In an example, a shared uncore memory fabric of a system-on-a-chip (SoC) is configured to provide real-time power management. The SoC may include a power management agent to inform the shared fabric that the processing cores and peripherals will be idle for a time, and to negotiate a power-saving state. The uncore fabric may also include a local power manager that detects when no access requests have been received for a time, such as when cores are operating from cache. The shared fabric may then unilaterally enter a power-saving state, and remain in that state until an access request is received. In the power-saving state, power and/or clocks are gated, and the fabric's state is stored in retention cells. When a new access request is received, an ungated controller may handle preliminary processing while the local power manager restores the state and powers up the shared fabric.

Abstract: An operating data aggregator module collects a first set of operating data and a second set of operating data for building equipment. A model generator module generates a first set of model coefficients and a second set of model coefficients for a predictive model for the building equipment using the first set of operating data and the second set of operating data, respectively. A test statistic module generates a test statistic based on a difference between the first set of model coefficients and the second set of model coefficients. A critical value module calculates critical value for the test statistic. A hypothesis testing module compares the test statistic with the critical value using a statistical hypothesis test to determine whether the predictive model has changed. In response to a determination that the predictive model has changed, a fault indication may be generated and/or the predictive model may be adaptively updated.

Abstract: In an embodiment, the present invention includes an execution unit to execute instructions of a first type, a local power gate circuit coupled to the execution unit to power gate the execution unit while a second execution unit is to execute instructions of a second type, and a controller coupled to the local power gate circuit to cause it to power gate the execution unit when an instruction stream does not include the first type of instructions. Other embodiments are described and claimed.

Abstract: In an embodiment, a processor includes a logic to cause at least one core to operate with a power control cycle including a plurality of on times and a plurality of off times according to an ON-OFF keying protocol, where the on and off times vary depending on whether and when an interrupt is incurred. Other embodiments are described and claimed.

Abstract: A system for sharing a power delivery controller is described herein. The system includes a plurality of ports and a power delivery controller communicatively coupled to the plurality of ports. The power delivery controller is to send a first message to a particular port of the plurality of ports and remain connected to the particular port and enable power delivery to the particular port in response to a particular return message from the port.

Abstract: Systems and methods are disclosed herein for determining relative orientation between a self-propelled device and a mobile computing device by utilizing the asymmetric radiation pattern of communication link emissions by the self-propelled device. Upon establishing the communication link, the self-propelled device may perform a spin, thereby enabling the self-propelled device and/or the mobile computing device to detect radiated pulses due to the asymmetry in the link. A direction may be determined based on such pulses, which may be utilized for calibration purposes.

Abstract: An application runs at a first operating frequency if the application is designed for a current version of a system and runs at a second operating frequency if the application is designed for a prior version of the system that operates at a lower frequency than the first operating frequency. The second operating frequency may be higher than the operating frequency of the prior version of the system to account for differences in latency, throughput or other processing characteristics between the two systems. Software readable cycle counters are based on a spoof clock running at the operating frequency of the prior version of the system, rather than the true operating frequency. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: In some examples, an electronic device receives, while an operating system is running in the electronic device, a request to access a function of a Basic Input/Output System (BIOS), the request containing a web address of the function of the BIOS, and routes, based on the web address of the function of the BIOS, the request through a web-based interface to a domain that includes the function of the BIOS.

Abstract: An operation of a processing machine with redundant actuators is controlled according to a reference trajectory by selecting, from a set of points forming a segment of the reference trajectory to be processed for a period of time, a subset of points corresponding to a fraction of the period of time. The subset of points is selected such that the redundant actuators are capable to position the worktool at each point in the subset within the period of time and are capable to maintain the worktool at the last point of the subset after the period of time while satisfying constraints on motion of the redundant actuators. The segment of the reference trajectory is modified in the time domain and the control inputs for controlling the motion of the redundant actuators are determined using the modified segment of the reference trajectory.

Abstract: A processor prunes state information based on information provided by software, thereby reducing the amount of state information to be stored prior to the processor entering a low-power state. The software, such as an operating system or application program executing at the processor, indicates one or more registers of the processor as storing data that is no longer useful. When preparing to enter the low-power state, the processor omits the indicated registers from the state information stored to memory.

Abstract: An embodiment includes a system, comprising: a processor; a plurality of memories; and a control circuit coupled to the processor and the memories, and configured to: receive a power limit; measure a power consumption of the processor and the memories; and iteratively change a plurality of operating parameters of the processor and the memories to optimize an objective function associated with the system to operating states where the power consumption is less than or equal to the power limit.

Abstract: A remote unit (1) that controls a control target (4) on the basis of a command from a CPU unit (2) is provided with: an external input section (11) to receive a detection result of a state of the control target from a detection means (3) that detects the state of the control target; an output section (13) to output a control output for controlling the control target; and an abnormality determining section (12) to determine an abnormality of the control target on the basis of the detection result and to output to the output section, a control instruction to instruct a change or a stop of the control output if the control target is determined to be abnormal.

Abstract: Status indicators are provided. An operation is performed in a current operating mode of the processor, in which the current operating mode is dynamically selectable from a plurality of supported operating modes. A first set of status indicators is set, based on performing the operation in the current operating mode. A second set of status indicators is set, based on performing the operation in the current operating mode, but the setting is to reflect at least one status condition for another operating mode supported by the processor. At least one of the first set of status indicators or the second set of status indicators is used in further processing.

Abstract: Various embodiments are directed to restrictions in portable computing device electric power to accommodate reductions in the voltage level of a power source. An apparatus comprises a controller caused to receive configuration data from a main processor circuit specifying a voltage level threshold and selected action to take to reduce electric power to a first component in response to the voltage level falling below the first voltage level threshold, recurringly monitor the voltage level; based on the voltage level falling below the first voltage level threshold, take the first selected action and transmit a signal to the main processor circuit indicating that the voltage level has fallen below the first voltage level threshold and that the first selected action has been taken; transmit the voltage level to the main processor circuit; receive a signal from the main processor circuit to undo the first selected action; and so undo.

Abstract: A memory controller includes an interface to receive a data strobe signal and corresponding read data. The data strobe signal and the read data correspond to a read command issued by the memory controller, and the read data is received in accordance with the data strobe signal and an enable signal. A circuit in the memory controller is to dynamically adjust a timing offset between the enable signal and the data strobe signal, and control logic is to issue a supplemental read command in accordance with a determination that a time interval since a last read command issued by the memory controller exceeds a predetermined value.

Abstract: A user-provided keystore may be utilized in a boot process to verify a boot image as disclosed herein. A device may be determined to be in a locked or verified state. A selected keystore may be determined to not verify against a first key such as a root key. A user may provide a keystore to a device. The system may display a prompt to the user which asks whether the user would like to continue to boot or not, if the system determines that the keystore does not verify against the first key. The user may respond to the prompt by indicating a desire to continue booting. The system may determine that the boot image verifies against the keystore and finish booting the device. Thus, the prompt may alert the user to a threat to the integrity of the boot process or device.