Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface; a first die having a first surface and an opposing second surface embedded in a first dielectric layer, where the first surface of the first die is coupled to the second surface of the package substrate by first interconnects; a second die having a first surface and an opposing second surface embedded in a second dielectric layer, where the first surface of the second die is coupled to the second surface of the first die by second interconnects; and a third die having a first surface and an opposing second surface embedded in a third dielectric layer, where the first surface of the third die is coupled to the second surface of the second die by third interconnects.

Abstract: An apparatus is provided which comprises: a plurality of first conductive contacts having a first pitch spacing on a substrate surface, a plurality of second conductive contacts having a second pitch spacing on the substrate surface, and a plurality of conductive interconnects disposed within the substrate to couple a first grouping of the plurality of second conductive contacts associated with a first die site with a first grouping of the plurality of second conductive contacts associated with a second die site and to couple a second grouping of the plurality of second conductive contacts associated with the first die site with a second grouping of the plurality of second conductive contacts associated with the second die site, wherein the conductive interconnects to couple the first groupings are present in a layer of the substrate above the conductive interconnects to couple the second groupings. Other embodiments are also disclosed and claimed.

Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate having a surface; a die having a first surface and an opposing second surface; and a chiplet having a first surface and an opposing second surface, wherein the chiplet is between the surface of the package substrate and the first surface of the die, wherein the first surface of the chiplet is coupled to the surface of the package substrate and the second surface of the chiplet is coupled to the first surface of the die, and wherein the chiplet includes: a capacitor at the first surface; and an element at the second surface, wherein the element includes a switching transistor or a diode.

Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first die having a first surface and an opposing second surface, wherein the first die is in a first dielectric layer; a magnetic core inductor, having a first surface and an opposing second surface, in the first dielectric layer, wherein the magnetic core inductor may include a first conductive pillar at least partially surrounded by a magnetic material, and a second conductive pillar coupled to the first conductive pillar; and a second die having a first surface and an opposing second surface, wherein the second die is in a second dielectric layer, and wherein the first surface of the second die is coupled to the second surface of the magnetic core inductor.

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate, a first die coupled to the package substrate with first interconnects, and a second die coupled to the first die with second interconnects, wherein the second die is coupled to the package substrate with third interconnects, a communication network is at least partially included in the first die and at least partially included in the second die, and the communication network includes a communication pathway between the first die and the second die.

Abstract: Embodiments include a waveguide bundle, a dielectric waveguide, and a vehicle. The waveguide bundle includes dielectric waveguides, where each dielectric waveguide has a dielectric core and a conductive coating around the dielectric core. The waveguide bundle also has a power delivery layer formed around the dielectric waveguides, and an insulating jacket enclosing the waveguide bundle. The waveguide bundle may also include the power deliver layer as a braided shield, where the braided shield provides at least one of a DC and an AC power line. The waveguide bundle may further have one of the dielectric waveguides provide a DC ground over their conductive coatings, where the AC power line does not use the braided shield as reference or ground. The waveguide bundle may include that the power delivery layer is separated from the dielectric waveguides by a braided shield, where the power delivery layer is a power delivery braided foil.

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may a die having a front side and a back side, the die comprising a first material and conductive contacts at the front side; and a thermal layer attached to the back side of the die, the thermal layer comprising a second material and a conductive pathway, wherein the conductive pathway extends from a front side of the thermal layer to a back side of the thermal layer.

Abstract: Embodiments may relate to a package substrate that is to couple with the die. The package substrate may include a signal line that is communicatively coupled with the die. The package substrate may further include a conductive line. The package substrate may further include a diode communicatively coupled with the signal line and the conductive line. Other embodiments may be described or claimed.

Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a die, having an active surface and an opposing backside surface, including a plurality of through silicon vias (TSVs); and an inductor including a first conductive pillar with a first end and an opposing second end, wherein the first end of the first conductive pillar is coupled to the backside surface of a first individual TSV; a second conductive pillar with a first end and an opposing second end, wherein the first end of the second conductive pillar is coupled to the backside surface of a second individual TSV, wherein the second end of the second conductive pillar is coupled to the second end of the first conductive pillar, and wherein the first and the second conductive pillars are at least partially surrounded in a magnetic material.

Abstract: An integrated circuit structure may be formed having a substrate, at least one integrated circuit device embedded in and electrically attached to the substrate, and at least one heat transfer fluid conduit extending through the substrate, wherein the heat transfer fluid conduit is electrically attached to the at least one integrated circuit device. In one embodiment, the at least one heat transfer fluid conduit is a power transfer route for the at least one integrated circuit device.

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include: a first die having a first surface and an opposing second surface, first conductive contacts at the first surface of the first die, and second conductive contacts at the second surface of the first die; and a second die having a first surface and an opposing second surface, and first conductive contacts at the first surface of the second die; wherein the second conductive contacts of the first die are coupled to the first conductive contacts of the second die by interconnects, the second surface of the first die is between the first surface of the first die and the first surface of the second die, and a footprint of the first die is smaller than and contained within a footprint of the second die.

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a first die comprising a first face and a second face; and a second die, the second die comprising a first face and a second face, wherein the second die further comprises a plurality of first conductive contacts at the first face and a plurality of second conductive contacts at the second face, and the second die is between first-level interconnect contacts of the microelectronic assembly and the first die.

Abstract: Embodiments of the invention include a packaged device with transmission lines that have an extended thickness, and methods of making such device. According to an embodiment, the packaged device may include a first dielectric layer and a first transmission line formed over the first dielectric layer. Embodiments may then include a second dielectric layer formed over the transmission line and the first dielectric layer. According to an embodiment, a first line via may be formed through the second dielectric layer and electrically coupled to the first transmission line. In some embodiments, the first line via extends substantially along the length of the first transmission line.

Abstract: An apparatus is provided which comprises: a plurality of first conductive contacts having a first pitch spacing on a substrate surface, a plurality of second conductive contacts having a second pitch spacing on the substrate surface, and a plurality of conductive interconnects disposed within the substrate to couple a first grouping of the plurality of second conductive contacts associated with a first die site with a first grouping of the plurality of second conductive contacts associated with a second die site and to couple a second grouping of the plurality of second conductive contacts associated with the first die site with a second grouping of the plurality of second conductive contacts associated with the second die site, wherein the conductive interconnects to couple the first groupings are present in a layer of the substrate above the conductive interconnects to couple the second groupings. Other embodiments are also disclosed and claimed.

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may a die having a front side and a back side, the die comprising a first material and conductive contacts at the front side; and a thermal layer attached to the back side of the die, the thermal layer comprising a second material and a conductive pathway, wherein the conductive pathway extends from a front side of the thermal layer to a back side of the thermal layer.

Abstract: Generally, this disclosure provides apparatus and systems for coupling waveguides to a server package with a modular connector system, as well as methods for fabricating such a connector system. Such a system may be formed with connecting waveguides that turn a desired amount, which in turn may allow a server package to send a signal through a waveguide bundle in any given direction without bending waveguides.

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface, and a die secured to the package substrate, wherein the die has a first surface and an opposing second surface, the die has first conductive contacts at the first surface and second conductive contacts at the second surface, and the first conductive contacts are coupled to conductive pathways in the package substrate by first non-solder interconnects.

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface, and a die secured to the package substrate, wherein the die has a first surface and an opposing second surface, the die has first conductive contacts at the first surface and second conductive contacts at the second surface, and the first conductive contacts are coupled to conductive pathways in the package substrate by first non-solder interconnects.

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate, a first die coupled to the package substrate with first interconnects, and a second die coupled to the first die with second interconnects, wherein the second die is coupled to the package substrate with third interconnects, a communication network is at least partially included in the first die and at least partially included in the second die, and the communication network includes a communication pathway between the first die and the second die.

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component, having a first surface and an opposing second surface including a first direct bonding region at the second surface with first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component, having a first surface and an opposing second surface, including a second direct bonding region at the first surface with second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, wherein the second microelectronic component is coupled to the first microelectronic component by the first and second direct bonding regions; and a shield structure in the first direct bonding dielectric material at least partially surrounding the one or more of the first metal contacts.