Patents by Inventor Akihiro Kikuchi
Akihiro Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240117483Abstract: The problem addressed by the present invention is to provide a copper-coated aluminum wire material with a reduced weight and excellent adhesiveness, and a production method therefor. This copper-coated aluminum wire material is provided with an aluminum wire material comprising aluminum or an aluminum alloy and a thin copper film covering the aluminum wire material. The space factor of the thin copper film is in the range of 0.2% to 4% and the adhesiveness between the aluminum wire material and the thin copper film based on a scratch test compliant with JIS R 3255 is at least 10 mN.Type: ApplicationFiled: February 28, 2022Publication date: April 11, 2024Applicant: NATIONAL INSTITUTE FOR MATERIALS SCIENCEInventors: Akihiro KIKUCHI, Hitoshi KITAGUCHI, Yasuo IIJIMA, Kazuto HIRATA
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Patent number: 11953843Abstract: A powder container includes a powder chamber for containing powder for forming images, a powder outlet formed in a face of the powder container, and a shutter assembly to open and close the powder outlet and including first and second shutters. The first shutter is movable between a sealing position to close the powder outlet and an open position to open the powder outlet and includes a pressed member to cancel retention of the first shutter at the sealing position. The second shutter includes a pressing projection that interferes with the pressed member of the first shutter and is movable between a shielding position to cover the pressed member without interference between the pressing projection and the pressed member and a releasing position to press the pressed member with the pressing projection.Type: GrantFiled: July 13, 2022Date of Patent: April 9, 2024Assignee: RICOH COMPANY, LTD.Inventors: Kentaro Nodera, Emi Kita, Akihiro Takayama, Susumu Tateyama, Shinnosuke Koshizuka, Tatsuya Kubo, Teppei Kikuchi
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Patent number: 11605869Abstract: An electronic apparatus includes a substrate and an electrical element mounted on the substrate. The electrical element includes a base material including a first principal surface and a second principal surface that are deformable and flat or substantially flat surfaces and a conductor pattern included on the base material. The electrical element further includes a first connection portion and a second connection portion that connect to a circuit included on the substrate and a transmission line portion located in a position different from positions of the first connection portion and the second connection portion that electrically connects the first connection portion and the second connection portion. The conductor pattern includes a conductor pattern of the first connection portion, a conductor pattern of the second connection portion, a conductor pattern of the transmission line portion, and an electrical-element-side bonding pattern arranged in the transmission line portion.Type: GrantFiled: January 26, 2021Date of Patent: March 14, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takahiro Baba, Akihiro Kikuchi, Genro Kato, Kosuke Nishino, Nobuo Ikemoto
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Patent number: 11411428Abstract: In a power converter including: a first DC-DC converter, an inverter, and a control circuit, a second DC-DC converter that controls an input and an output of a power storage unit is connectable to a DC bus. The control circuit deactivates a reverse power flow suppression function for suppressing a reverse power flow from the inverter to a power system when the second DC-DC converter is not connected to the DC bus and activates the reverse power flow suppression function when the second DC-DC converter is connected to the DC bus.Type: GrantFiled: September 25, 2019Date of Patent: August 9, 2022Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Kota Maeba, Akihiro Kikuchi, Wataru Horio, Hiroyuki Fujii, Kenji Hanamura, Tomoki Ito
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Patent number: 11025056Abstract: In a power converter, a DC bus is supplied with a DC power from a voltage conversion circuit for regulating a voltage of a power output from a DC power supply, a voltage of the DC power being regulated by the voltage conversion circuit. An inverter converts a DC power on the DC bus into an AC power and supplies the AC power as converted to a power system. A controller controls the inverter. When it is necessary to suppress an output, the controller suppresses the AC power supplied by the inverter to increase a voltage on the DC bus.Type: GrantFiled: January 22, 2018Date of Patent: June 1, 2021Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Akihiro Kikuchi, Kenji Hanamura, Tomoki Ito
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Publication number: 20210151845Abstract: An electronic apparatus includes a substrate and an electrical element mounted on the substrate. The electrical element includes a base material including a first principal surface and a second principal surface that are deformable and flat or substantially flat surfaces and a conductor pattern included on the base material. The electrical element further includes a first connection portion and a second connection portion that connect to a circuit included on the substrate and a transmission line portion located in a position different from positions of the first connection portion and the second connection portion that electrically connects the first connection portion and the second connection portion. The conductor pattern includes a conductor pattern of the first connection portion, a conductor pattern of the second connection portion, a conductor pattern of the transmission line portion, and an electrical-element-side bonding pattern arranged in the transmission line portion.Type: ApplicationFiled: January 26, 2021Publication date: May 20, 2021Inventors: Takahiro BABA, Akihiro KIKUCHI, Genro KATO, Kosuke NISHINO, Nobuo IKEMOTO
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Patent number: 10990313Abstract: In a multi-storage node system including a plurality of storage nodes, a plurality of storage nodes include a plurality of drives that store data and a control unit that controls writing of data to the drives. The control unit divides storage areas of the plurality of drives into a plurality of physical chunks, allocates the divided physical chunks to logical chunks, and stores data. A plurality of storage nodes are divided into fault sets affected by a single failure and manage the multi-storage node system. The control unit of one primary node that manages the multi-storage node system among a plurality of storage nodes includes a database for managing allocation of the physical chunks of a plurality of storage nodes to the logical chunks for each drive, each storage node, or for each fault set.Type: GrantFiled: September 6, 2019Date of Patent: April 27, 2021Assignee: HITACHI, LTD.Inventors: Akihiro Kikuchi, Takayuki Fukatani
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Publication number: 20210088552Abstract: The present invention focuses on a material constituting a contact pin and a processing technique of the material, and is directed to manufacturing a conductive member by using a material and a processing technique which are different from those in the related art. The conductive member is obtained by applying etching treatment to a copper-silver alloy including copper and silver while using at least copper alloy etching liquid, but silver etching liquid may also be selectively added to the copper alloy etching liquid.Type: ApplicationFiled: July 9, 2018Publication date: March 25, 2021Applicants: Kyosei Co., Ltd., National Institute of Materials ScienceInventors: Tsutomu SATO, Yoshikazu SAKAI, Akihiro KIKUCHI
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Patent number: 10944145Abstract: An electronic apparatus includes a substrate and an electrical element mounted on the substrate. The electrical element includes a base material including a first principal surface and a second principal surface that are deformable and flat or substantially flat surfaces and a conductor pattern included on the base material. The electrical element further includes a first connection portion and a second connection portion that connect to a circuit included on the substrate and a transmission line portion located in a position different from positions of the first connection portion and the second connection portion that electrically connects the first connection portion and the second connection portion. The conductor pattern includes a conductor pattern of the first connection portion, a conductor pattern of the second connection portion, a conductor pattern of the transmission line portion, and an electrical-element-side bonding pattern arranged in the transmission line portion.Type: GrantFiled: March 30, 2020Date of Patent: March 9, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takahiro Baba, Akihiro Kikuchi, Genro Kato, Kosuke Nishino, Nobuo Ikemoto
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Publication number: 20200264794Abstract: In a multi-storage node system including a plurality of storage nodes, a plurality of storage nodes include a plurality of drives that store data and a control unit that controls writing of data to the drives. The control unit divides storage areas of the plurality of drives into a plurality of physical chunks, allocates the divided physical chunks to logical chunks, and stores data. A plurality of storage nodes are divided into fault sets affected by a single failure and manage the multi-storage node system. The control unit of one primary node that manages the multi-storage node system among a plurality of storage nodes includes a database for managing allocation of the physical chunks of a plurality of storage nodes to the logical chunks for each drive, each storage node, or for each fault set.Type: ApplicationFiled: September 6, 2019Publication date: August 20, 2020Inventors: Akihiro KIKUCHI, Takayuki FUKATANI
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Publication number: 20200227806Abstract: An electronic apparatus includes a substrate and an electrical element mounted on the substrate. The electrical element includes a base material including a first principal surface and a second principal surface that are deformable and flat or substantially flat surfaces and a conductor pattern included on the base material. The electrical element further includes a first connection portion and a second connection portion that connect to a circuit included on the substrate and a transmission line portion located in a position different from positions of the first connection portion and the second connection portion that electrically connects the first connection portion and the second connection portion. The conductor pattern includes a conductor pattern of the first connection portion, a conductor pattern of the second connection portion, a conductor pattern of the transmission line portion, and an electrical-element-side bonding pattern arranged in the transmission line portion.Type: ApplicationFiled: March 30, 2020Publication date: July 16, 2020Inventors: Takahiro BABA, Akihiro KIKUCHI, Genro KATO, Kosuke NISHINO, Nobuo IKEMOTO
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Patent number: 10658188Abstract: Provided is a method of manufacturing a semiconductor device with which a trench shape having vertical, flat, and smooth side wall surfaces can be formed even at room temperature. A semiconductor substrate is placed on a sample stage which is kept at room temperature in a reaction container. A trench is formed in the semiconductor substrate by plasma etching that uses etching gas including oxygen and sulfur hexafluoride, while controlling the gas ratio of oxygen to sulfur hexafluoride so that the gas ratio is from 70% to 100%.Type: GrantFiled: November 16, 2017Date of Patent: May 19, 2020Assignee: ABLIC INC.Inventors: Akihiro Kikuchi, Takeshi Kuroda, Shintaro Koseki
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Patent number: 10644370Abstract: An electronic apparatus includes a substrate and an electrical element mounted on the substrate. The electrical element includes a base material including a first principal surface and a second principal surface that are deformable and flat or substantially flat surfaces and a conductor pattern included on the base material. The electrical element further includes a first connection portion and a second connection portion that connect to a circuit included on the substrate and a transmission line portion located in a position different from positions of the first connection portion and the second connection portion that electrically connects the first connection portion and the second connection portion. The conductor pattern includes a conductor pattern of the first connection portion, a conductor pattern of the second connection portion, a conductor pattern of the transmission line portion, and an electrical-element-side bonding pattern arranged in the transmission line portion.Type: GrantFiled: July 17, 2019Date of Patent: May 5, 2020Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takahiro Baba, Akihiro Kikuchi, Genro Kato, Kosuke Nishino, Nobuo Ikemoto
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Publication number: 20200019199Abstract: In a power converter including: a first DC-DC converter, an inverter, and a control circuit, a second DC-DC converter that controls an input and an output of a power storage unit is connectable to a DC bus. The control circuit deactivates a reverse power flow suppression function for suppressing a reverse power flow from the inverter to a power system when the second DC-DC converter is not connected to the DC bus and activates the reverse power flow suppression function when the second DC-DC converter is connected to the DC bus.Type: ApplicationFiled: September 25, 2019Publication date: January 16, 2020Inventors: Kota MAEBA, Akihiro KIKUCHI, Wataru HORIO, Hiroyuki FUJII, Kenji HANAMURA, Tomoki ITO
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Publication number: 20190341665Abstract: An electronic apparatus includes a substrate and an electrical element mounted on the substrate. The electrical element includes a base material including a first principal surface and a second principal surface that are deformable and flat or substantially flat surfaces and a conductor pattern included on the base material. The electrical element further includes a first connection portion and a second connection portion that connect to a circuit included on the substrate and a transmission line portion located in a position different from positions of the first connection portion and the second connection portion that electrically connects the first connection portion and the second connection portion. The conductor pattern includes a conductor pattern of the first connection portion, a conductor pattern of the second connection portion, a conductor pattern of the transmission line portion, and an electrical-element-side bonding pattern arranged in the transmission line portion.Type: ApplicationFiled: July 17, 2019Publication date: November 7, 2019Inventors: Takahiro BABA, Akihiro KIKUCHI, Genro KATO, Kosuke NISHINO, Nobuo IKEMOTO
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Publication number: 20190326752Abstract: In a power converter, a DC bus is supplied with a DC power from a voltage conversion circuit for regulating a voltage of a power output from a DC power supply, a voltage of the DC power being regulated by the voltage conversion circuit. An inverter converts a DC power on the DC bus into an AC power and supplies the AC power as converted to a power system. A controller controls the inverter. When it is necessary to suppress an output, the controller suppresses the AC power supplied by the inverter to increase a voltage on the DC bus.Type: ApplicationFiled: January 22, 2018Publication date: October 24, 2019Inventors: Akihiro KIKUCHI, Kenji HANAMURA, Tomoki ITO
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Patent number: 10424824Abstract: An electronic apparatus includes a substrate and an electrical element mounted on the substrate. The electrical element includes a base material including a first principal surface and a second principal surface that are deformable and flat or substantially flat surfaces and a conductor pattern included on the base material. The electrical element further includes a first connection portion and a second connection portion that connect to a circuit included on the substrate and a transmission line portion located in a position different from positions of the first connection portion and the second connection portion that electrically connects the first connection portion and the second connection portion. The conductor pattern includes a conductor pattern of the first connection portion, a conductor pattern of the second connection portion, a conductor pattern of the transmission line portion, and an electrical-element-side bonding pattern arranged in the transmission line portion.Type: GrantFiled: January 17, 2017Date of Patent: September 24, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takahiro Baba, Akihiro Kikuchi, Genro Kato, Kosuke Nishino, Nobuo Ikemoto
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Publication number: 20180166290Abstract: Provided is a method of manufacturing a semiconductor device with which a trench shape having vertical, flat, and smooth side wall surfaces can be formed even at room temperature. A semiconductor substrate is placed on a sample stage which is kept at room temperature in a reaction container. A trench is formed in the semiconductor substrate by plasma etching that uses etching gas including oxygen and sulfur hexafluoride, while controlling the gas ratio of oxygen to sulfur hexafluoride so that the gas ratio is from 70% to 100%.Type: ApplicationFiled: November 16, 2017Publication date: June 14, 2018Inventors: Akihiro KIKUCHI, Takeshi KURODA, Shintaro KOSEKI
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Patent number: 9925571Abstract: A method of cleaning a substrate processing apparatus including a gas supply part configured to eject a process gas via gas passages formed in the gas supply part, and divided into first and second regions corresponding to first and second in-plane positions of a substrate, respectively, includes cleaning a first one of the gas passages corresponding to the first region with the plasma of the process gas by causing a first flow rate of the process gas supplied to the first region to be lower than a second flow rate of the process gas supplied to the second region and cleaning a second one of the gas passages corresponding to the second region with the plasma by causing a third flow rate of the process gas supplied to the first region to be higher than a fourth flow rate of the process gas supplied to the second region.Type: GrantFiled: June 27, 2014Date of Patent: March 27, 2018Assignee: Tokyo Electron LimitedInventors: Akihiro Kikuchi, Mitsuhiro Tomura
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Patent number: 9728381Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.Type: GrantFiled: December 5, 2014Date of Patent: August 8, 2017Assignee: TOKYO ELECTRON LIMITEDInventors: Akihiro Kikuchi, Satoshi Kayamori, Shinya Shima, Yuichiro Sakamoto, Kimihiro Higuchi, Kaoru Oohashi, Takehiro Ueda, Munehiro Shibuya, Tadashi Gondai