Abstract: The present invention relates to a crosslinkable polymer composition for use as a sheath layer of cable, and to a cable comprising a crosslinked layer obtained from said composition. The crosslinkable polymer composition according to the present invention comprises a polymer blend of ethylene vinyl acetate copolymer and ethylene methyl acrylate copolymer, a flame retardant filler and a crosslinking agent.

Abstract: The present invention relates to a silicon oxide composite for a lithium secondary battery anode material and a method for manufacturing same and, more specifically, to a silicon oxide composite for a lithium secondary battery anode material and a method for manufacturing same, wherein the silicon oxide composite comprises a Si cluster and MgxSiOy(0?x?3, 0?y?5) formed on a peripheral portion of the Si cluster.

Abstract: A semiconductor device includes an interlayer dielectric layer on a substrate, a first connection line that fills a first trench of the interlayer dielectric layer, the first trench having a first width, and a second connection line that fills a second trench of the interlayer dielectric layer, the second trench having a second width greater than the first width, and the second connection line including a first metal layer that covers an inner sidewall of the second trench, a barrier layer that covers a bottom surface of the second trench, and a second metal layer on the first metal layer and the barrier layer, the first connection line and the first metal layer include a first metal, and the second metal layer includes a second metal different from the first metal.

Abstract: A semiconductor device includes a substrate, an interlayer insulating layer on the substrate, a first etch stop layer on the substrate, a first through-silicon-via (TSV) configured to pass vertically through the substrate and the interlayer insulating layer, and a second TSV configured to pass vertically through the substrate, the interlayer insulating layer, and the first etch stop layer, wherein the second TSV has a width greater than that of the first TSV.

Abstract: A semiconductor device includes a substrate, an interlayer insulating layer on the substrate, a first etch stop layer on the substrate, a first through-silicon-via (TSV) configured to pass vertically through the substrate and the interlayer insulating layer, and a second TSV configured to pass vertically through the substrate, the interlayer insulating layer, and the first etch stop layer, wherein the second TSV has a width greater than that of the first TSV.

Abstract: A mixed silver powder and a conductive paste comprising the powder are disclosed. The mixed silver powder is obtained by mixing two or more spherical silver powders having different properties from each other. The mixed powder may minimize the disadvantages of the respective types of the two or more powders and maximize the advantages thereof, thereby improving the characteristics of products. In addition, by comprehensively controlling the particle size distribution of surface-treated mixed silver powder and the particle diameter and specific gravity of primary particles, a high-density conductor pattern, a precise line pattern, and the suppression of aggregation over time can be simultaneously achieved.

Abstract: An apparatus to produce a letterbox using a strip of material includes: a bender to receive and bend the strip of material into a desired shape of a letterbox including flanges and notches, and the bender to bend at least one end of the strip of material slightly to produce a slight bent; a processor to measure a first plurality of hole positions on a first end of the strip of material and a second plurality of hole positions on flanges of the strip of material, wherein the first plurality of hole positions on the first end are measured to match a first plurality of holes on a second end of the strip of material, wherein the second plurality of hole positions on the flanges are measured to match a second plurality of holes on a base plate; and a puncher to punch the first plurality of holes on at least one of the first end and the second end of the strip of material according to the first plurality of hole positions, and the puncher to punch the second plurality of holes on the flanges according to the second

Abstract: Applying padding material around shaped cutting blades includes: receiving a blade shape diagram and a rule of blade; bending the rule of blade according to the blade shape diagram to produce the shaped cutting blades; and applying the padding material around the shaped cutting blades using the blade shape diagram to produce a padded shaped cutting blade, wherein the padding material provides a spring action to quickly detach the shaped cutting blades from a plate matter.

Abstract: The present invention relates to a crosslinkable polymer composition for use as a sheath layer of cable, and to a cable comprising a crosslinked layer obtained from said composition. The crosslinkable polymer composition according to the present invention comprises a polymer blend of ethylene vinyl acetate copolymer and ethylene methyl acrylate copolymer, a flame retardant filler and a crosslinking agent.

Abstract: A semiconductor device is provided. The semiconductor device includes a first insulating interlayer disposed on a first surface of a substrate; a pad pattern disposed on a lower surface of the first insulating interlayer, the pad pattern including a first copper pattern; and a through silicon via passing through the substrate and the first insulating interlayer, and contacting the first copper pattern of the pad pattern. The through silicon via includes a first portion passing through the substrate and the first insulating interlayer, and a second portion under the first portion and extending to a portion of the first copper pattern in the pad pattern. A boundary of the through silicon via has a bent portion between the first portion and the second portion.

Abstract: Provided herein may be a semiconductor memory device and a method of operating the same. The semiconductor memory device may include peripheral circuits configured to perform a verify operation on selected memory cells by applying a verify voltage to a word line, and perform a compensation program operation on the selected memory cells by applying a compensation program voltage to the word line; and a control logic configured to control the peripheral circuits such that the compensation program operation is performed by applying the compensation program voltage to the selected memory cells to be programmed to a selected threshold voltage distribution among the threshold voltage distributions other than a highest threshold voltage distribution, wherein the compensation program voltage has a positive voltage lower than the main program voltage most recently applied to the word line.

Abstract: A semiconductor device includes a conductive component on a substrate, a passivation layer on the substrate and including an opening that exposes at least a portion of the conductive component, and a pad structure in the opening and located on the passivation layer, the pad structure being electrically connected to the conductive component. The pad structure includes a lower conductive layer conformally extending on an inner sidewall of the opening, the lower conductive layer including a conductive barrier layer, a first seed layer, an etch stop layer, and a second seed layer that are sequentially stacked, a first pad layer on the lower conductive layer and at least partially filling the opening, and a second pad layer on the first pad layer and being in contact with a peripheral portion of the lower conductive layer located on the top surface of the passivation layer.

Abstract: Disclosed is a semiconductor device including a conductive pattern on a substrate, a passivation layer on the substrate and including an opening that partially exposes the conductive pattern, and a pad structure in the opening of the passivation layer and connected to the conductive pattern. The pad structure includes a first metal layer that fills the opening of the passivation layer and has a width greater than that of the opening, and a second metal layer on the first metal layer. The first metal layer has a first thickness at an outer wall of the first metal layer, a second thickness on a top surface of the passivation layer, and a third thickness on a top surface of the conductive pattern. The second thickness is greater than the first thickness, and the third thickness is greater than the second thickness.

Abstract: Semiconductor chips and methods of manufacturing the same are provided. The semiconductor chip includes a substrate, an interlayer insulation layer including a bottom interlayer insulation layer on an upper surface of the substrate and a top interlayer insulation layer on the bottom interlayer insulation layer, an etch stop layer between the bottom interlayer insulation layer and the top interlayer insulation layer, a landing pad on the interlayer insulation layer, and a through via connected to the landing pad through the substrate, the interlayer insulation layer, and the etch stop layer. The etch stop layer is isolated from direct contact with the landing pad.

Abstract: A semiconductor device is provided. The semiconductor device includes a first insulating interlayer disposed on a first surface of a substrate; a pad pattern disposed on a lower surface of the first insulating interlayer, the pad pattern including a first copper pattern; and a through silicon via passing through the substrate and the first insulating interlayer, and contacting the first copper pattern of the pad pattern. The through silicon via includes a first portion passing through the substrate and the first insulating interlayer, and a second portion under the first portion and extending to a portion of the first copper pattern in the pad pattern. A boundary of the through silicon via has a bent portion between the first portion and the second portion.

Abstract: A semiconductor package includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first semiconductor chip includes a substrate having a first via hole, an insulation interlayer formed on the substrate and having a first bonding pad in an outer surface thereof and a second via hole connected to the first via hole and exposing the first bonding pad, and a plug structure formed within the first and second via holes to be connected to the first bonding pad. The second semiconductor chip includes a second bonding pad bonded to the plug structure which is exposed from a surface of the substrate of the first semiconductor chip.

Abstract: The present invention relates to a device for blocking cooling water of a weld gun, the device preventing water leakage by blocking the cooling water leaking from the weld gun when a tip provided to the weld gun is replaced.

Abstract: The present invention relates to a cable comprising a crosslinked layer obtained from a polymer composition, the polymer composition comprising: a polymer blend comprising an ethylene vinyl acetate (EVA) copolymer, nitrile rubber (NBR), and an ethylene-methyl acrylate (AEM) copolymer; a crosslinking agent; and a flame-retardant filler.

Abstract: A semiconductor device includes a conductive component on a substrate, a passivation layer on the substrate and including an opening that exposes at least a portion of the conductive component, and a pad structure in the opening and located on the passivation layer, the pad structure being electrically connected to the conductive component. The pad structure includes a lower conductive layer conformally extending on an inner sidewall of the opening, the lower conductive layer including a conductive barrier layer, a first seed layer, an etch stop layer, and a second seed layer that are sequentially stacked, a first pad layer on the lower conductive layer and at least partially filling the opening, and a second pad layer on the first pad layer and being in contact with a peripheral portion of the lower conductive layer located on the top surface of the passivation layer.

Abstract: The present disclosure relates to a manufacturing method of a vehicle seatback cover, comprising a lightweight composite manufacturing step of manufacturing a lightweight composite using a reinforcing fiber and a thermoplastic resin fiber, a lightweight composite forming step of forming the lightweight composite into a vehicle seatback cover shape and preparing a vehicle seatback cover material, and a carpet bonding step of bonding the vehicle seatback cover material and a carpet material.