Patents by Inventor Cheng Lu

Cheng Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240155904
    Abstract: A display substrate comprises a base substrate that comprises a first display area provided with multiple sub-pixels of different colors. At least one sub-pixel comprises a light-emitting element and a pixel driving circuit for driving the light-emitting element to emit light. The light-emitting element comprises a first electrode, a second electrode, and an organic light-emitting layer provided between the first electrode and the second electrode. The first electrode is a reflective electrode and is electrically connected to the pixel driving circuit. A first structure is provided on a side of the first electrode of the light-emitting element of a sub-pixel of at least one target color close to the base substrate, and a surface of the first structure close to the first electrode is uneven.
    Type: Application
    Filed: May 26, 2021
    Publication date: May 9, 2024
    Inventors: Xin LI, Xing FAN, Jing YANG, Shantao CHEN, Cheng HAN, Jiangnan LU, Yansong LI
  • Patent number: 11976105
    Abstract: The present application provides antibody-TCR chimeric constructs comprising an antibody moiety that specifically binds to a target antigen fused to a TCRM capable of recruiting at least one TCR-associated signaling module. Also provided are methods of making and using these constructs.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: May 7, 2024
    Assignee: EUREKA THERAPEUTICS, INC.
    Inventors: Jingwei Lu, Zhiyuan Yang, Cheng Liu, Hong Liu, Yiyang Xu, Su Yan, Vivien Wai-Fan Chan, Lucas Horan
  • Publication number: 20240144725
    Abstract: A system and a method for performing unified human motion prediction (HMP) are provided. In operation, the system provides a unified HMP module, which includes an encoder configured to encode a plurality of existing two-dimensional (2D) and three-dimensional (3D) pose sequences into a shared latent space V and a decoder configured to predict a plurality of predicted future 2D and 3D pose sequences based on the encoded shared latent space V, thus forming four pathways of knowledge flow. The system then trains the unified HMP module and the shared latent space V in a weakly supervised manner with input features Xwith actual future 2D and 3D pose sequences by 10 minimizing a loss between the predicted future 2D and 3D pose sequences and the actual future 3 D and 3D pose sequences. Once the training is complete, the unified HMP may be performed using the trained encoded shared latent space V.
    Type: Application
    Filed: October 18, 2022
    Publication date: May 2, 2024
    Inventors: Yanjun Zhu, Chen Bai, Cheng Lu
  • Publication number: 20240141388
    Abstract: The present invention relates to variant polypeptides, methods of preparing the variant polypeptides, processes for characterizing the variant polypeptides, compositions and cells comprising the variant polypeptides, and methods of using the variant polypeptides. The invention further relates to complexes comprising the variant polypeptides, methods of producing the complexes, processes for characterizing the complexes, cells comprising the complexes, and methods of using the complexes.
    Type: Application
    Filed: March 9, 2022
    Publication date: May 2, 2024
    Inventors: Shaorong Chong, Wei-Cheng Lu, Brendan Jay Hilbert, Quinton Norman Wessells, Lauren E. Alfonse, Anthony James Garrity
  • Publication number: 20240144098
    Abstract: Aspects of the present disclosure provide an automated labeling system. For example, the automated labeling system can include an automated labeling module (ALM) configured to receive wireless signals and ground truth of learning object and label the wireless signals with the ground truth when receiving the ground truth to generate labeled training data. The automated labeling system can also include a training database coupled to the ALM. The training database can be configured to store the labeled training data.
    Type: Application
    Filed: October 16, 2023
    Publication date: May 2, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chao Peng WANG, Chia-Da LEE, Po-Yu CHEN, Hsiao-Chien CHIU, Yi-Cheng LU
  • Publication number: 20240142833
    Abstract: An electronic device includes a substrate, a driving element, a first insulating layer, a pixel electrode layer, and a common electrode layer. The driving element is disposed on the substrate. The first insulating layer is disposed on the driving element. The pixel electrode layer is disposed on the first insulating layer. The first insulating layer comprises a hole, and the pixel electrode layer is electrically connected to the driving element through the hole. The common electrode layer is disposed on the pixel electrode layer. The common electrode layer comprises a slit, and the slit has an edge, and the edge is disposed in the hole.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Applicant: Innolux Corporation
    Inventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
  • Patent number: 11971565
    Abstract: An absorption type near-infrared filter comprising a first multilayer film, a second multilayer film, and an absorption film, wherein in the ultraviolet band, the difference of between the wavelength with the transmittance at 80% of the absorbing film and the wavelength with the reflectivity at 80% of the first multilayer film falls in the range between 25 nm and 37 nm, the difference of between the wavelength with the transmittance at 50% of the absorbing film and the wavelength with the reflectivity at 50% of the first multilayer film falls in the range between 6 nm and 14 nm, and the difference of between the wavelength with the transmittance at 20% of the absorbing film and the wavelength with the reflectivity at 20% of the first multilayer film falls in the range between ?6 nm and 2.5 nm.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: April 30, 2024
    Assignees: PTOT (SUZHOU) INC., PLATINUM OPTICS TECHNOLOGY INC.
    Inventors: Chung-Han Lu, Hsiao-Ching Shen, Chun-Cheng Hsieh, Ming-Zhan Wang
  • Publication number: 20240136428
    Abstract: Improved inner spacers for semiconductor devices and methods of forming the same are disclosed.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Wen-Kai Lin, Che-Hao Chang, Chi On Chui, Yung-Cheng Lu
  • Publication number: 20240133281
    Abstract: A calculation system for predicting a proppant embedding depth based on a shale softening effect is provided, including a sampling test terminal, a scheduling module, a monitoring module, and a calculation module, wherein the scheduling module, the monitoring module, and the calculation module are connected in communication, and the monitoring module is connected to an external operating system through a wireless network, wherein the external operating system is configured to perform a hydraulic fracturing operation and receive a first control signal and/or a second control signal from the monitoring module. The sampling test terminal is configured to test the samples and obtain test data. The scheduling module is configured to determine a target construction parameter.
    Type: Application
    Filed: December 23, 2023
    Publication date: April 25, 2024
    Applicant: SOUTHWEST PETROLEUM UNIVERSITY
    Inventors: Cong LU, Qijun ZENG, Jianchun GUO, Jiaxing LIU, Jun WU, Junkai LU, Cheng LUO, Guangqing ZHOU, Xianbo MENG, Jiandong WANG, Yanhui LIU, Xiaoshan WANG, Xin SHAN
  • Patent number: 11966352
    Abstract: An information handling system with modular riser components for receiving expansion cards having various requirements. The system includes a riser body assembly having a common support structure for receiving expansion cards. The common support structure may be coupled to different expansion structures to provide support of expansion cards having requirements that would not be met by the common support structure alone.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: April 23, 2024
    Assignee: Dell Products L.P.
    Inventors: Yu-Feng Lin, Hao-Cheng Ku, Yi-Wei Lu
  • Patent number: 11967596
    Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
  • Publication number: 20240125776
    Abstract: Provided herein are encoded microcarriers for analyte detection in multiplex assays. The microcarriers are encoded with an analog code for identification and comprise a capture agent for analyte detection and a substantially transparent magnetic polymer. The analog code is generated by a two-dimensional shape of a substantially non-transparent layer. Also provided are methods of making the encoded microcarriers disclosed herein. Further provided are methods and kits for conducting a multiplex assay using the microcarriers described herein.
    Type: Application
    Filed: November 21, 2023
    Publication date: April 18, 2024
    Applicant: Plexbio Co., Ltd.
    Inventors: Dean TSAO, Chin-Shiou HUANG, Cheng-Tse LIN, Chien-Te WU, FengKan LU
  • Patent number: 11961912
    Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
  • Patent number: 11963295
    Abstract: Provided are a circuit apparatus, a manufacturing method thereof, and a circuit system. The circuit apparatus includes a flexible circuit board, a flexible packaging material layer and an electronic device. The flexible circuit board has at least one hollow pattern, wherein the flexible circuit board has an inner region and a peripheral region surrounding the inner region, and has a first surface and a second surface opposite to each other. The flexible packaging material layer is disposed in the at least one hollow pattern. The electronic device is disposed on the first surface of the flexible circuit board and electrically connected with the flexible circuit board.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Hung-Hsien Ko, Yi-Cheng Lu, Heng-Yin Chen, Hao-Wei Yu, Te-Hsun Lin
  • Patent number: 11963300
    Abstract: A panel device including a substrate, a conductor pad, a turning wire, and a circuit board is provided. The substrate has a first surface and a second surface connected to the first surface while a normal direction of the second surface is different from a normal direction of the first surface. The conductor pad is disposed on the first surface of the substrate. The turning wire is disposed on the substrate and extends from the first surface to the second surface. The turning wire includes a wiring layer in contact with the conductor pad and a wire covering layer covering the wiring layer. The circuit board is bonded to and electrically connected to the wire covering layer. A manufacturing method of a panel device is also provided herein.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: April 16, 2024
    Assignee: Au Optronics Corporation
    Inventors: Chun-Yueh Hou, Hao-An Chuang, Fan-Yu Chen, Hsi-Hung Chen, Yun Cheng, Wen-Chang Hsieh, Chih-Wen Lu
  • Publication number: 20240120402
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.
    Type: Application
    Filed: November 19, 2023
    Publication date: April 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jia-Ni YU, Kuo-Cheng CHIANG, Mao-Lin HUANG, Lung-Kun CHU, Chung-Wei HSU, Chun-Fu LU, Chih-Hao WANG, Kuan-Lun CHENG
  • Publication number: 20240121594
    Abstract: A method implemented by a first network node in a communication network is provided. The method comprises: receiving a first subscription for subscribing a first User Equipment UE reachability event of a UE from an event subscriber, wherein the first subscription comprises a first indicator for indicating whether the first UE reachability event is to be reported in a direct mode or an indirect mode; sending a second subscription for subscribing a second UE reachability event to a second network node that is registered in the first network node, the second subscription comprises a second indicator for indicating that the first UE reachability event is to be directly or indirectly reported to the event subscriber according to the first indicator; and sending a first UE reachability report to the event subscriber.
    Type: Application
    Filed: January 25, 2022
    Publication date: April 11, 2024
    Inventors: Emiliano Merino Vazquez, Cheng Wang, Jose Miguel Dopico Sanjuan, Yunjie Lu, Juan Manuel Fernandez Galmes
  • Patent number: D1024959
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: April 30, 2024
    Assignee: VOLTRONIC POWER TECHNOLOGY CORP.
    Inventors: You-Sheng Chiang, Yu-Cheng Lu, Juor-Ming Hsieh
  • Patent number: D1026816
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: May 14, 2024
    Assignee: VOLTRONIC POWER TECHNOLOGY CORP.
    Inventors: You-Sheng Chiang, Yu-Cheng Lu, Juor-Ming Hsieh
  • Patent number: D1026817
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: May 14, 2024
    Assignee: VOLTRONIC POWER TECHNOLOGY CORP.
    Inventors: You-Sheng Chiang, Yu-Cheng Lu, Juor-Ming Hsieh