Patents by Inventor Cheng Lu

Cheng Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240021706
    Abstract: A method includes performing an atomic layer deposition (ALD) process to form a dielectric layer on a wafer. The ALD process comprises an ALD cycle includes pulsing calypso ((SiCl3)2CH2), purging the calypso, pulsing ammonia, and purging the ammonia. The method further includes performing a wet anneal process on the dielectric layer, and performing a dry anneal process on the dielectric layer.
    Type: Application
    Filed: August 7, 2023
    Publication date: January 18, 2024
    Inventors: Wen-Kai Lin, Che-Hao Chang, Chi On Chui, Yung-Cheng Lu, Szu-Ying Chen
  • Patent number: 11866746
    Abstract: The present invention relates to variant Cas12i4 polypeptides, methods of producing the variant Cas12i4 polypeptides, processes for characterizing the variant Cas12i4 polypeptides, cells comprising the variant Cas12i4 polypeptides, and methods of using the variant Cas12i4 polypeptides. The invention further relates to complexes comprising a variant Cas12i4 polypeptide and an RNA guide, methods of producing the complexes, processes for characterizing the complexes, cells comprising the complexes, and methods of using the complexes.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: January 9, 2024
    Assignee: ARBOR BIOTECHNOLOGIES, INC.
    Inventors: Shaorong Chong, Wei-Cheng Lu, Brendan Jay Hilbert, Quinton Norman Wessells, Tia Marie Ditommaso, Anthony James Garrity
  • Patent number: 11865666
    Abstract: An apparatus for performing chemical mechanical polish on a wafer includes a polishing head that includes a retaining ring. The polishing head is configured to hold the wafer in the retaining ring. The retaining ring includes a first ring having a first hardness, and a second ring encircled by the first ring, wherein the second ring has a second hardness smaller than the first hardness.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: January 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chien Hou, Ching-Hong Jiang, Kuo-Yin Lin, Ming-Shiuan She, Shen-Nan Lee, Teng-Chun Tsai, Yung-Cheng Lu
  • Patent number: 11866418
    Abstract: Disclosed are compounds of formulae I and II, and pharmaceutically acceptable salts and prodrugs thereof, which are inhibitors of the complement system. Also provided are pharmaceutical compositions comprising such a compound, and methods of using the compounds and compositions in the treatment or prevention of a disease or condition characterized by aberrant complement system activity.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: January 9, 2024
    Assignee: BioCryst Pharmaceuticals, Inc.
    Inventors: Pravin L. Kotian, Yarlagadda S. Babu, Weihe Zhang, Peng-Cheng Lu, Minwan Wu, Wei Lv, Trung Xuan Nguyen, Zhao Dang, Venkat R. Chintareddy, V. Satish Kumar, Krishnan Raman
  • Patent number: 11862122
    Abstract: The disclosure provides a display device and another display device. The display device includes a display panel. The display panel has a functional display area. The functional display area includes a pixel. The pixel includes a white pixel and multiple display pixels. The display pixels surround at least a part of the white pixel, and the white pixel includes a pixel electrode. The another display device includes another display panel. The another display panel has a functional display area, and the functional display area includes a pixel and a signal line. The pixel includes a white pixel and multiple display pixels. The signal line includes a branch, and the branch is electrically connected to one of the display pixels. The display device and the another display device of the disclosure is capable of reducing the problem of diffraction or having a better optical sensing effect.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: January 2, 2024
    Assignee: Innolux Corporation
    Inventors: Chia-Hao Tsai, Ming-Jou Tai, Yi-Shiuan Cherng, Yu-Shih Tsou, You-Cheng Lu, Yung-Hsun Wu
  • Patent number: 11863065
    Abstract: A method for controlling a power module includes: configuring N cells in cascade connection, where N is a positive integer equal to or greater than 2, each cell comprising a bidirectional switching unit and a non-controlled rectifier bridge, the bidirectional switching unit being connected to central points of two bridge arms of the non-controlled rectifier bridge; controlling each cell to operate in one of three operating modes of a modulation mode, a bypass mode and a non-controlled rectifying mode, wherein in the N cells, m1 cells operate in the bypass mode, where 0?m1?M1, m2 cells operate in the non-controlled rectifying mode, where 0?m2?M2, m3 cells operate in the modulation mode and can realize power factor correction, where 0<m3; wherein m1+m2+m3=N, M1 is the allowable number of cells for bypass in the system, and M2 is the allowable number of cells for non-controlled rectification in the system.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: January 2, 2024
    Assignee: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Hong Liu, Wen Zhang, Dan Wang, Cheng Lu, Hongyang Wu
  • Patent number: 11863449
    Abstract: A communication device which is configured to receive a data flow includes a monitor port and a packet processor. The monitor port is configured to receive a packet of the data flow. The packet processor is coupled to the monitor port, and the packet processor is configured to compute a digest value of the packet and compute an identification code of the packet according to the digest value of the packet, and the packet processor searches a status value associated with the identification code in a lookup table so as to determine whether a dropping event of the data flow is recorded.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: January 2, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kuo-Cheng Lu, Chun-Da Wu, Yu-Hsiu Lin
  • Publication number: 20230409280
    Abstract: A playback device is provided. The playback device includes a processor; an audio interface connected to the processor and configured to output audio; a communication interface connected to the processor and configured to communicate over a network; a memory operably connected to the processor; and instructions stored in the memory. The instructions are executable by the processor such that the playback device can receive an audio stream via a first wireless network; play back, via the audio interface, audio content based on the audio stream; while receiving the audio stream via the first wireless network, transmit an indication of availability of the audio stream; detect a request, from another playback device, to play back the audio stream; establish a second wireless network; detect that the other playback device has joined the second wireless network; and transmit the audio stream to the other playback device via the second wireless network.
    Type: Application
    Filed: June 14, 2023
    Publication date: December 21, 2023
    Inventors: Brenda Stefani, Christopher Babroski, Da-Hai Ding, Gary Anthony Matulis, Robert James Bermani, Zhaoyun Huang, Meng Wang, Joe Jingzhong Zheng, Cheng Lu
  • Publication number: 20230400741
    Abstract: A display device having a first region, a second region, and a third region set between the first region and the second region is provided. The display device includes a first sub-pixel, a second sub-pixel, and a first signal line. The first sub-pixel is arranged in the first region. The second sub-pixel is arranged in the second region, the area of the first sub-pixel is larger than the area of the second sub-pixel. The first signal line is arranged in the first region and the third region, and is electrically connected to the first sub-pixel and the second sub-pixel. At least a part of the first signal line extends in the first direction in the first region. At least another part of the first signal line extends in the second direction in the third region. The first direction is different from the second direction.
    Type: Application
    Filed: April 27, 2023
    Publication date: December 14, 2023
    Applicant: Innolux Corporation
    Inventors: You-Cheng Lu, Chia-Hao Tsai, Ming-Jou Tai, Yi-Shiuan Cherng, Yung-Hsun Wu
  • Publication number: 20230386937
    Abstract: Disclosed is a method of forming a semiconductor device. The method includes providing a precursor having a substrate and gate stacks over the substrate, wherein each of the gate stacks includes an electrode layer, a first hard mask (HM) layer over the electrode layer, and a second HM layer over the first HM layer. The method further includes depositing a dielectric layer over the substrate and the gate stacks and filling spaces between the gate stacks; and performing a first chemical mechanical planarization (CMP) process to partially remove the dielectric layer. The method further includes performing an etching process to remove the second HM layer and to partially remove the dielectric layer, thereby exposing the first HM layer. The method further includes performing a second CMP process to at least partially remove the first HM layer.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 30, 2023
    Inventors: Yu-Jen Shen, Ying-Ho Chen, Yung-Cheng Lu
  • Patent number: 11831413
    Abstract: A time-division multiplexing (TDM) scheduler determines a service order for serving N packet transmission requesters. The TDM scheduler includes: N current count value generators configured to serve the N packet transmission requesters respectively, and generate N current count values according to parameters of the N packet transmission requesters, a previous scheduling result generated by the EDD scheduler previously, and a predetermined counting rule; and an earliest due date (EDD) scheduler configured to generate a current scheduling result for determining the service order according to the N current count values and a predetermined urgency decision rule, wherein an extremum of the N current count values relates to one of the N packet transmission requesters, and the EDD scheduler selects this requester as the one to be served preferentially.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: November 28, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kuo-Cheng Lu, Yu-Mei Pan, Yung-Chang Lin
  • Patent number: 11823605
    Abstract: An electronic device including a plurality of pixels and a driving element is provided. Each of the plurality of pixels includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. The driving element drives each first sub-pixel of the plurality of pixels.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: November 21, 2023
    Assignee: Innolux Corporation
    Inventors: Chia-Hao Tsai, You-Cheng Lu, Yi-Shiuan Cherng, Wei-Yen Chiu
  • Publication number: 20230369518
    Abstract: An optical sensing apparatus including: a substrate including a first material; an absorption region including a second material different from the first material; an amplification region formed in the substrate and configured to collect at least a portion of the photo-carriers from the absorption region and to amplify the portion of the photo-carriers; an interface-dopant region formed in the substrate between the absorption region and the amplification region; a buffer layer formed between the absorption region and the interface-dopant region; one or more field-control regions formed between the absorption region and the interface-dopant region and at least partially surrounding the buffer layer; and a buried-dopant region formed in the substrate and separated from the absorption region, where the buried-dopant region is configured to collect at least a portion of the amplified portion of the photo-carriers from the amplification region.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 16, 2023
    Inventors: Yen-Cheng Lu, Yu-Hsuan Liu, Jung-Chin Chiang, Yun-Chung Na, Tsung-Ting Wu, Zheng-Shun Liu, Chou-Yun Hsu
  • Patent number: 11818187
    Abstract: Disclosed herein are playback devices, groups of playback devices, and methods of operating playback devices and groupings thereof to cause the playback devices in a mixed-mode configuration to play audio content in synchrony with each other.
    Type: Grant
    Filed: August 31, 2019
    Date of Patent: November 14, 2023
    Assignee: Sonos, Inc.
    Inventors: Hrishikesh Gossain, Cheng Lu, Zhaoyun Huang, Jeffrey Peters
  • Patent number: 11811310
    Abstract: Embodiments of the present disclosure provide a power conversion system and a control method. The power conversion system includes multiple power modules, and each power module includes a first port, a second port, and a third port, where the first port of each power module is connected to an external device, second ports of the power modules are independent of each other and used as independent ports to output power, third ports of the power modules are connected in parallel to form a power bus and power flow of the third port of each power module is bidirectional.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: November 7, 2023
    Assignee: Delta Electronics (Shanghai) Co., Ltd.
    Inventors: Cheng Lu, Hong Liu, Wenfei Hu, Jie Kong
  • Patent number: 11811297
    Abstract: A power module includes N inverter units outputting N AC voltages and being coupled to N high-frequency AC terminals, wherein the N high-frequency AC terminals are cascaded and connected to a post-stage rectifier circuit. A phase-shift control method for the power module includes: setting at least two phase-shift sequences, wherein phase sequence numbers of the N AC voltages of the N inverter units are different in the at least two phase-shift sequences; in one switching period, controlling the N AC voltages of the N inverter units to shift a first angle according to a first phase-shift sequence of the at least two phase-shift sequences; and in another switching period, controlling the N AC voltages of the N inverter units to shift the first angle according to a second phase-shift sequence of the at least two phase-shift sequences.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: November 7, 2023
    Assignee: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Hong Liu, Jie Kong, Wen Zhang, Baihui Song, Cheng Lu, Hongyang Wu
  • Publication number: 20230352568
    Abstract: The present disclosure provides embodiments of semiconductor structures and method of forming the same. An example semiconductor structure includes a first source/drain feature and a second source/drain feature and a hybrid fin disposed between the first source/drain feature and the second source/drain feature and extending lengthwise along a first direction. The hybrid fin includes an inner feature and an outer layer disposed around the inner feature. The outer layer includes silicon oxycarbonitride and the inner feature includes silicon carbonitride.
    Type: Application
    Filed: June 30, 2023
    Publication date: November 2, 2023
    Inventors: Wan-Yi Kao, Yung-Cheng Lu, Che-Hao Chang, Chi On Chui, Hung Cheng Lin
  • Publication number: 20230341732
    Abstract: An electronic device includes a substrate, a driving element, a first transparent conductive layer, an insulating layer, and a second transparent conductive layer. The driving element is disposed on the substrate and includes a drain electrode having a first edge. The first transparent conductive layer is disposed on the driving element. The insulating layer is disposed between the driving element and the first transparent conductive layer and includes a hole through which the first transparent conductive layer is electrically connected to the driving element. The second transparent conductive layer is disposed on the insulating layer. One of the first and second transparent conductive layers includes at least one slit, and the first or second transparent conductive layer that includes the at least one slit has a second edge. The second edge is located in the hole, and the at least one slit exposes the first edge of the drain electrode.
    Type: Application
    Filed: March 21, 2023
    Publication date: October 26, 2023
    Applicant: Innolux Corporation
    Inventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
  • Patent number: 11799393
    Abstract: The application provides a dispersed carrier phase-shifting method and system. The method includes connecting at least two power modules to form a modular system; each power module including a control module for sampling at least twice a common state variate, signs of slopes of the common state variate at a first and second sampling time are opposite, and a reference time of the first sampling time for each control module is the same; and regulating a carrier frequency of the power module according to a relative size between a sampled values at the first and second sampling time. According to embodiments herein, carrier phase-shifting of modular system may be implemented without communication between respective modules. Under closed-loop control, optimal carrier phase-shifting can be automatically achieved under various duty ratios, thereby having good stability.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: October 24, 2023
    Assignee: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Hong Liu, Wen Zhang, Wenfei Hu, Cheng Lu, Hongyang Wu
  • Publication number: 20230335182
    Abstract: A complementary storage unit and a method of preparing the same, and a complementary memory. The complementary storage unit includes: a control transistor, a pull-up diode and a pull-down diode. The control transistor is configured to control reading and writing of the storage unit. One end of the pull-up diode is connected to a positive selection line, and the other end thereof is connected to a source end of the control transistor, so as to control a high-level input. One end of the pull-down diode is connected to a negative selection line, and the other end thereof is connected to the source end of the control transistor, so as to control a low-level input. The pull-up diode and the pull-down diode are symmetrically arranged in a first direction.
    Type: Application
    Filed: August 24, 2020
    Publication date: October 19, 2023
    Inventors: Qing Luo, Bing Chen, Hangbing Lv, Ming Liu, Cheng Lu