Patents by Inventor Chien-Cheng Lin
Chien-Cheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240071888Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.Type: ApplicationFiled: August 28, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
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Patent number: 11916122Abstract: A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.Type: GrantFiled: July 8, 2021Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Zhi-Chang Lin, Kuan-Ting Pan, Shih-Cheng Chen, Jung-Hung Chang, Lo-Heng Chang, Chien-Ning Yao, Kuo-Cheng Chiang
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Patent number: 11911951Abstract: A matte film for hot pressing and a manufacturing method thereof are provided. The manufacturing method includes steps of forming at least one polyester composition into an unstretched polyester thick film and stretching the unstretched polyester thick film in a machine direction (MD) and a transverse direction (TD). The polyester composition includes 81% to 97.9497% by weight of a polyester resin, 0.02% to 2% by weight of an antioxidative ingredient, 0.0003% to 1% by weight of a nucleating agent, 0.01% to 2% by weight of a flow aid, 0.01% to 2% by weight of a polyester modifier, 0.01% to 2% by weight of an inorganic filler, and 2% to 10% by weight of silica particles. The polyester resin has an intrinsic viscosity between 0.60 dl/g and 0.80 dl/g.Type: GrantFiled: September 4, 2020Date of Patent: February 27, 2024Assignee: NAN YA PLASTICS CORPORATIONInventors: Te-Chao Liao, Wen-Cheng Yang, Wen-Jui Cheng, Chia-Yen Hsiao, Chien-Chih Lin
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Publication number: 20240047440Abstract: An electronic package is provided and includes at least one electronic element, at least one first conductive structure and a second conductive structure disposed on one side of a carrier structure with at least one circuit layer, and an encapsulation layer covering the electronic element, the first conductive structure and the second conductive structure, where the first conductive structure is exposed from the encapsulation layer to externally connect required elements according to functional requirements.Type: ApplicationFiled: September 29, 2022Publication date: February 8, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Wen-Jung Tsai, Chih-Hsien Chiu, Chin-Chiang He, Ko-Wei Chang, Chien-Cheng Lin
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Publication number: 20230360997Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.Type: ApplicationFiled: July 18, 2023Publication date: November 9, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsien Chiu, Siang-Yu Lin, Wen-Jung Tsai, Chia-Yang Chen, Chien-Cheng Lin
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Patent number: 11749583Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.Type: GrantFiled: July 19, 2021Date of Patent: September 5, 2023Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsien Chiu, Siang-Yu Lin, Wen-Jung Tsai, Chia-Yang Chen, Chien-Cheng Lin
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Patent number: 11723144Abstract: An electronic device is provided, in which an antenna module for receiving and transmitting radiation signals is disposed on a mounting surface of a circuit board, and an inner layer of the circuit board is formed with a ground surface to arrange a strip-shaped ground circuit along the edges of the ground surface so that the ground circuit occupies at most 50% of the area of the ground surface to improve antenna radiation efficiency.Type: GrantFiled: September 2, 2021Date of Patent: August 8, 2023Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Ming-Fan Tsai, Chih-Wei Chen, Chien-Cheng Lin, Chao-Ya Yang, Chia-Yang Chen
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Publication number: 20220375822Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.Type: ApplicationFiled: July 19, 2021Publication date: November 24, 2022Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsien Chiu, Siang-Yu Lin, Wen-Jung Tsai, Chia-Yang Chen, Chien-Cheng Lin
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Patent number: 11476572Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.Type: GrantFiled: January 23, 2020Date of Patent: October 18, 2022Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
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Publication number: 20220225493Abstract: An electronic device is provided, in which an antenna module for receiving and transmitting radiation signals is disposed on a mounting surface of a circuit board, and an inner layer of the circuit board is formed with a ground surface to arrange a strip-shaped ground circuit along the edges of the ground surface so that the ground circuit occupies at most 50% of the area of the ground surface to improve antenna radiation efficiency.Type: ApplicationFiled: September 2, 2021Publication date: July 14, 2022Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Ming-Fan Tsai, Chih-Wei Chen, Chien-Cheng Lin, Chao-Ya Yang, Chia-Yang Chen
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Publication number: 20210352906Abstract: Antibacterial coating material includes a coating-material main component, silicon dioxide powder and a nano antibacterial solution, wherein when the antibacterial coating material is hardened to an antibacterial coating layer, silicon dioxide particles of the silicon dioxide powder can gather most of nano antibacterial particles of the nano antibacterial solution to a position near a surface of the antibacterial coating layer, so that the nano antibacterial particles cannot be wasted, and cost of the nano antibacterial solution can be reduced. Moreover, most of the nano antibacterial particles are gathered near a surface layer of the antibacterial coating layer, so that the antibacterial effect of the antibacterial coating layer cannot be limited, and the best antibacterial effect can be achieved. Furthermore, if the nano antibacterial particles of the nano antibacterial solution have an antiviral effect, the dried nano antibacterial particles also have an antiviral effect.Type: ApplicationFiled: May 12, 2021Publication date: November 18, 2021Inventor: Chien-Cheng LIN
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Patent number: 11044027Abstract: A wireless transmission performance test system is provided, configured to test wireless transmission performance of a device under test (DUT) which is disposed in a testing chamber. The wireless transmission performance test system includes a directional antenna and a control device. The directional antenna is disposed inside the testing chamber and adjacent to the DUT to receive testing signal generated by the DUT after testing. The signal coupling direction of the directional antenna is directed to the DUT. The control device is configured to receive the testing signal transmitted from the directional antenna, process the testing signal, and generate testing result. A wireless transmission performance test method is also provided herein.Type: GrantFiled: April 16, 2020Date of Patent: June 22, 2021Assignee: AmTRAN Technology Co., Ltd.Inventors: Chien-Cheng Lin, Chih-Hung Chuang
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Publication number: 20210067257Abstract: A wireless transmission performance test system is provided, configured to test wireless transmission performance of a device under test (DUT) which is disposed in a testing chamber. The wireless transmission performance test system includes a directional antenna and a control device. The directional antenna is disposed inside the testing chamber and adjacent to the DUT to receive testing signal generated by the DUT after testing. The signal coupling direction of the directional antenna is directed to the DUT. The control device is configured to receive the testing signal transmitted from the directional antenna, process the testing signal, and generate testing result. A wireless transmission performance test method is also provided herein.Type: ApplicationFiled: April 16, 2020Publication date: March 4, 2021Inventors: Chien-Cheng LIN, Chih-Hung CHUANG
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Publication number: 20200317934Abstract: An antibacterial coating layer comprises a coating material; and a plurality of antibacterial nano-particles, all located near a surface of the coating material. For example, the antibacterial nano-particles are exposed from the surface of the coating material, so that the antibacterial effect of the antibacterial coating layer is not limited, and the best antibacterial effect is achieved.Type: ApplicationFiled: April 1, 2020Publication date: October 8, 2020Inventor: Chien-Cheng LIN
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Publication number: 20200161756Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.Type: ApplicationFiled: January 23, 2020Publication date: May 21, 2020Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
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Patent number: 10587041Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.Type: GrantFiled: May 16, 2017Date of Patent: March 10, 2020Assignee: Silicon Precision Industries Co., Ltd.Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
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Patent number: 10587037Abstract: An electronic package structure is provided, including a substrate, a package encapsulant disposed on the substrate, and an antenna structure corresponding to a disposing area of the package encapsulant and having a first extension layer, a second extension layer disposed on the substrate, and a connection portion disposed between and electrically connected to the first extension layer and the second extension layer. Through the formation of the antenna structure on the disposing area of the package encapsulant, the substrate is not required to be widen, and, as such, the electronic package structure meets the miniaturization requirement.Type: GrantFiled: December 16, 2013Date of Patent: March 10, 2020Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Chien-Cheng Lin, Tsung-Hsien Tsai, Chao-Ya Yang, Yude Chu
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Patent number: 10419046Abstract: A quadrature transmitter includes a first and second matched transmitter path. Each transmitter path receives respective sets of quadrature baseband signals. At least one local oscillator port receives respective sets of quadrature LO signals. Mixer stage(s) respectively multiply the sets of quadrature baseband signals with the respective sets of quadrature LO signals to produce a respective output radio frequency signal. A combiner combines the output RF signals. The first set of quadrature signals is a substantially 45° phase shifted version of the second set of quadrature signals; and the first set of quadrature LO signals is a reverse substantially 45° phase shifted version of the second set of quadrature LO signals. A baseband error correction circuit corrects a phase error between the quadrature baseband signals at baseband and a LO error correction circuit corrects a phase error between the quadrature baseband signals at a LO frequency.Type: GrantFiled: June 7, 2018Date of Patent: September 17, 2019Assignee: MediaTek Singapore Pte. LtdInventors: Yangjian Chen, Bernard Mark Tenbroek, Chien-Wei Tseng, Ian Tseng, Ming-Da Tsai, Chien-Cheng Lin
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Patent number: 10382004Abstract: A matching network circuit and an associated apparatus are provided. The matching network circuit includes a matching unit coupled between a common path port and a first path port of the matching network circuit, and an impedance unit coupled between the common path port and a second path port of the matching network circuit. The common path port is utilized for connecting the matching network circuit to a common path, the first path port is utilized for connecting the matching network circuit to a first device on a first path, and the second path port is utilized for connecting the matching network circuit to a second device on a second path. The matching unit is arranged for performing impedance matching between the common path port and the first path port, and the impedance unit is arranged for performing impedance matching between the common path port and the second path port.Type: GrantFiled: July 3, 2016Date of Patent: August 13, 2019Assignee: MEDIATEK INC.Inventor: Chien-Cheng Lin
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METHOD FOR MANAGING FLASH MEMORY MODULE AND ASSOCIATED FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE
Publication number: 20190213137Abstract: The present invention provides a method for managing a flash memory module, wherein the method comprises: reading a logical address to physical address (L2P) mapping table from the flash memory module; compressing the L2P mapping table to generate a compressed mapping table, wherein the compressed mapping table records a reference physical address and whether a corresponding physical address of each logical address is the reference physical address plus an offset value; and when receiving a read command asking for reading data corresponding to a specific logical address, referring to the compressed mapping table to determine a specific physical address corresponding to the specific logical address, and reading the data from the flash memory module according to the specific physical address.Type: ApplicationFiled: June 29, 2018Publication date: July 11, 2019Inventors: Chien-Cheng Lin, Chia-Chi Liang, Jie-Hao Lee