Abstract: Methods and apparatuses for controlling brightness of a display are disclosed in the present disclosure. One method includes: determining a first brightness value of a display at a current brightness adjustment level; determining, based on a gamma correction lookup table, a first input grayscale value corresponding to the first brightness value, wherein the gamma correction lookup table comprises a gamma correction relationship between a brightness value of the display and an initial input grayscale value of the display at a predetermined brightness adjustment levels; and controlling an output brightness value of the display based on the first input grayscale value.

Abstract: A light generation system is provided. The light generation system includes a vaporization device, a laser device and a lens structure. The vaporization device is configured to vaporize a metal-nonmetal compound to generate a metal-nonmetal precursor gas. The laser device is configured to provide laser light, and irradiate the metal-nonmetal precursor gas released from the vaporization device with the laser light to emit a light signal. The lens structure is configured to direct the light signal toward a photomask used in a lithography process.

Abstract: A reticle-masking structure is provided. The reticle-masking structure includes a magnetic substrate and a paramagnetic part disposed on the magnetic substrate. The magnetic substrate has a magnetic field, and the paramagnetic part has an induced magnetic field in a direction of the magnetic field of the magnetic substrate. The paramagnetic part includes a rough surface defined by a plurality of protrusion structures of the paramagnetic part. A method for forming a reticle-masking structure and an extreme ultraviolet apparatus are also provided.

Abstract: An ellipsometer includes a light source, a polarizer, an asymmetric wavelength retarder, an analyzer and an optical detection component. The light source is configured to provide a light beam having multiple wavelengths incident to a sample. The polarizer is disposed between the light source and the sample, and configured to polarize the light beam. The asymmetric wavelength retarder is configured to provide a varied retardation effect on the light beam varied by wavelength. The analyzer is configured to analyze a polarization state of the light beam reflected by the sample. The optical detection component is configured to detect the light beam from the analyzer.

Abstract: A random bit cell includes a latch, a voltage selector, a first non-volatile storage element, and a second non-volatile storage element. The latch has a first terminal coupled to a first local bit line, and a second terminal coupled to a second local bit line. The first non-volatile storage element has a first terminal coupled to the first local bit line, and a second terminal coupled to the voltage selector. The second non-volatile storage element has a first terminal coupled to the second local bit line, and a second terminal coupled to the voltage selector. During an initial operation, the first terminals of the first non-volatile storage element and the second non-volatile storage element are floating. During an enroll operation, the first terminals of the first non-volatile storage element and the second non-volatile storage element receive a program voltage from the voltage selector.

Abstract: An ellipsometer includes a light source, a polarizer, an asymmetric wavelength retarder, an analyzer and an optical detection component. The light source is configured to provide a light beam having multiple wavelengths incident to a sample. The polarizer is disposed between the light source and the sample, and configured to polarize the light beam. The asymmetric wavelength retarder is configured to provide a varied retardation effect on the light beam varied by wavelength. The analyzer is configured to analyze a polarization state of the light beam reflected by the sample. The optical detection component is configured to detect the light beam from the analyzer.

Abstract: A storage cell includes a selection circuit, a first memory transistor, and a second memory transistor. The selection circuit is coupled to a source line and a common node. When the selection circuit is turned on, the selection circuit forms an electrical connection between the source line and the common node. The first memory transistor has a first terminal coupled to the common node, a second terminal coupled to a first bit line, and a control terminal coupled to a control line. The second memory transistor has a first terminal coupled to the common node, a second terminal coupled to a second bit line, and a control terminal coupled to the control line. The first memory transistor and the second memory transistor are 2-dimension charge-trapping devices or 3-dimension charge-trapping devices.

Abstract: The invention provides a code generating apparatus and an OTP memory block. The code generating apparatus of present disclosure includes a plurality of first one time programming (OTP) memory cells, a reference signal provider and a sense amplifier. The first OTP memory cells are coupled to a first bit line. The reference signal provider provides a reference signal. Wherein, at least one of the first OTP memory cells provides a read current to the first bit line, and the sense amplifier compares the read current and the reference signal to generate an output code. A current value of the reference signal is set within a range, and the range is set by the bit current corresponding to a maximum bit count, such as that the output code is determined by a manufacturing variation of the at least one first OTP memory cell.

Abstract: An ellipsometer includes a light source, a polarizer, an asymmetric wavelength retarder, an analyzer and an optical detection component. The light source is configured to provide a light beam having multiple wavelengths incident to a sample. The polarizer is disposed between the light source and the sample, and configured to polarize the light beam. The asymmetric wavelength retarder is configured to provide a varied retardation effect on the light beam varied by wavelength. The analyzer is configured to analyze a polarization state of the light beam reflected by the sample. The optical detection component is configured to detect the light beam from the analyzer.

Abstract: A photomask and a method of manufacturing a photomask are provided. According to an embodiment, a method includes: providing a substrate; depositing a reflective layer over the substrate; depositing a capping layer over the reflective layer; depositing an absorption layer over the capping layer; and treating the reflective layer by a laser beam to form a border region. The laser beam includes a pulse duration of less than about ten picoseconds.

Abstract: A light generation system is provided. The light generation system includes a vaporization device, a laser device and a lens structure. The vaporization device is configured to vaporize a metal-nonmetal compound to generate a metal-nonmetal precursor gas. The laser device is configured to provide laser light, and irradiate the metal-nonmetal precursor gas released from the vaporization device with the laser light to emit a light signal. The lens structure is configured to direct the light signal toward a photomask used in a lithography process.

Abstract: A random bit generator includes a voltage source, a bit data cell, and a sensing control circuit. The voltage source provides a scan voltage during enroll operations. The data cell includes a first transistor and a second transistor. The first transistor has a first terminal coupled to a first bit line, a second terminal coupled to the voltage source, and a control terminal. The second transistor has a first terminal coupled to a second bit line, a second terminal coupled to the voltage source, and a control terminal. The sensing control circuit is coupled to the first bit line and the second bit line, and outputs a random bit data according to currents generated through the first transistor and the second transistor during an enroll operation of the bit data cell.

Abstract: A random bit cell includes a latch, a voltage selector, a first non-volatile storage element, and a second non-volatile storage element. The latch has a first terminal coupled to a first local bit line, and a second terminal coupled to a second local bit line. The first non-volatile storage element has a first terminal coupled to the first local bit line, and a second terminal coupled to the voltage selector. The second non-volatile storage element has a first terminal coupled to the second local bit line, and a second terminal coupled to the voltage selector. During an initial operation, the first terminals of the first non-volatile storage element and the second non-volatile storage element are floating. During an enroll operation, the first terminals of the first non-volatile storage element and the second non-volatile storage element receive a program voltage from the voltage selector.

Abstract: A random code generator includes a power source, a sensing circuit, a first memory cell and a second memory cell. A first terminal of the first memory cell is connected with the power source. A second terminal of the first memory cell is connected with the sensing circuit. A first terminal of the second memory cell is connected with the power source. A second terminal of the second memory cell is connected with the sensing circuit. The power source provides a supplying voltage to both the first memory cell and the second memory cell during an enrollment. A random code is then determined according to the resistance difference between the first memory cell and the second memory cell after the enrollment.

Abstract: The present invention provides an additive for tin stripping, comprising 0.1 to 20 wt % of copper corrosion inhibitor and 0.1 to 20 wt % of nickel corrosion inhibitor; wherein said weight percentage is based on the total weight of said additive. The present additive can be used with nitric acid conventionally used for metal-stripping for not only reducing the usage of nitric acid but also improving the efficiency of tin stripping. The present invention also provides a method for Tin recycle and a reaction tank for metal recycle. Both of them are favorable for satisfying the needs of metal recycle (especially, tin recycle) in the field.

Abstract: The invention provides a code generating apparatus and an OTP memory block. The code generating apparatus of present disclosure includes a plurality of first one time programming (OTP) memory cells, a reference signal provider and a sense amplifier. The first OTP memory cells are coupled to a first bit line. The reference signal provider provides a reference signal. Wherein, at least one of the first OTP memory cells provides a read current to the first bit line, and the sense amplifier compares the read current and the reference signal to generate an output code. A current value of the reference signal is set within a range, and the range is set by the bit current corresponding to a maximum bit count, such as that the output code is determined by a manufacturing variation of the at least one first OTP memory cell.

Abstract: The invention provides a code generating apparatus and an OTP memory block. The code generating apparatus of present disclosure includes a plurality of first one time programming (OTP) memory cells, a reference signal provider and a sense amplifier. The first OTP memory cells are coupled to a first bit line. The reference signal provider provides a reference signal. Wherein, at least one of the first OTP memory cells provides a read current to the first bit line, and the sense amplifier compares the read current and the reference signal to generate an output code. A current value of the reference signal is set within a range, and the range is set by the bit current corresponding to a maximum bit count, such as that the output code is determined by a manufacturing variation of the at least one first OTP memory cell.

Abstract: The invention provides a code generating apparatus and an OTP memory block. The code generating apparatus of present disclosure includes a plurality of first one time programming (OTP) memory cells, a reference signal provider and a sense amplifier. The first OTP memory cells are coupled to a first bit line. The reference signal provider provides a reference signal. Wherein, at least one of the first OTP memory cells provides a read current to the first bit line, and the sense amplifier compares the read current and the reference signal to generate an output code. A current value of the reference signal is set within a range, and the range is set by the bit current corresponding to a maximum bit count, such as that the output code is determined by a manufacturing variation of the at least one first OTP memory cell.

Abstract: A display driving apparatus and a display driving method are provided. The display driving apparatus includes a compression and decompression unit, a storage unit, a data selection unit, and a display acceleration unit. When a current frame correlates with a preceding frame, and the current frame is dynamic relative to the preceding frame, the data selection unit obtains a compensated preceding frame by means of calculation according to the current frame, a decompressed current frame, and a decompressed preceding frame, and the display acceleration unit determines an overdrive value according to the compensated preceding frame and the current frame. It may be learned from the foregoing description that no compression error is involved in an overdrive value determining process, an overdrive mechanism may be still used to determine a grayscale value of a displayed pixel. Therefore, display quality of a dynamic image is improved.

Abstract: A random number generator device has at least at least a memory unit, a voltage generator, and a control circuit. Each memory unit has two memory cells, one of the two memory cells is coupled to a bias line and a first bit line, and another of the two memory cells is coupled to the bias line and a second bit line. The voltage generator provides the two memory cells a bias voltage, a first bit line voltage and a second bit line voltage via the bias line, the first bit line and the second bit line respectively. The control circuit shorts the first bit line and the second bit line to program the two memory cells simultaneously during a programming period and generates a random number bit according the statuses of the two memory cells during a reading period.