Abstract: The invention relates to the wheat cultivar designated 01071506. Provided by the invention are the seeds, plants and derivatives of the wheat cultivar 01071506. Also provided by the invention are tissue cultures of the wheat cultivar 01071506 and the plants regenerated therefrom. Still further provided by the invention are methods for producing wheat plants by crossing the wheat cultivar 01071506 with itself or another wheat cultivar and plants produced by such methods.

Abstract: These embodiments relate to authentication and securing of write-once, read-many (WORM) memory devices. In one embodiment, a memory device comprises a controller operable in first and second modes of operation after stored security information is validated, wherein in the first mode of operation, the memory device operates in a read-only mode, and wherein in the second mode of operation, the memory device operates in a write-once, read-many (WORM) mode. In another embodiment, the controller is operative to perform security methods.

Abstract: One-time programmable (OTP) and write-once read-many (WORM) memory devices and methods for use therewith are provided. These embodiments can be used to provide compatibility between a memory device that uses an OTP (or few-time programmable (FTP)) memory array and host devices that use a file system, such as the DOS FAT file system, that expects to be able to rewrite to a memory address in the memory device. These embodiments can also be used to prevent accidental or deliberate overwrites, changes, or deletions to existing data in a WORM memory device.

Abstract: One-time programmable (OTP) and write-once read-many (WORM) memory devices and methods for use therewith are provided. These embodiments can be used to provide compatibility between a memory device that uses an OTP (or few-time programmable (FTP)) memory array and host devices that use a file system, such as the DOS FAT file system, that expects to be able to rewrite to a memory address in the memory device. These embodiments can also be used to prevent accidental or deliberate overwrites, changes, or deletions to existing data in a WORM memory device.

Abstract: These embodiments relate to authentication and securing of write-once, read-many (WORM) memory devices. In one embodiment, a memory device comprises a controller operable in first and second modes of operation after stored security information is validated, wherein in the first mode of operation, the memory device operates in a read-only mode, and wherein in the second mode of operation, the memory device operates in a write-once, read-many (WORM) mode. In another embodiment, the controller is operative to perform security methods.

Abstract: One-time programmable (OTP) and write-once read-many (WORM) memory devices and methods for use therewith are provided. These embodiments can be used to provide compatibility between a memory device that uses an OTP (or few-time programmable (FTP)) memory array and host devices that use a file system, such as the DOS FAT file system, that expects to be able to rewrite to a memory address in the memory device. These embodiments can also be used to prevent accidental or deliberate overwrites, changes, or deletions to existing data in a WORM memory device.

Abstract: These embodiments relate to authentication and securing of write-once, read-many (WORM) memory devices. In one embodiment, a memory device comprises a controller operable in first and second modes of operation after stored security information is validated, wherein in the first mode of operation, the memory device operates in a read-only mode, and wherein in the second mode of operation, the memory device operates in a write-once, read-many (WORM) mode. In another embodiment, the controller is operative to perform security methods.

Abstract: The embodiments described herein can be used to enable one-time or few-time programmable memories to work with existing consumer electronic devices (such as those that work with flash—an erasable, non-volatile memory) without requiring a firmware upgrade, thereby providing backwards compatibility while minimizing user impact. As such, these embodiments are a viable way to bridge one-time or few-time programmable memories with existing consumer electronic devices that have flash card slots. These embodiments also allow future consumer electronic devices to be designed without updating firmware to include a file system customized for a one-time or few-time programmable memory.

Abstract: A method for repairing a neighborhood of rows in a memory array using a patch table is disclosed. First data to be stored in row N in a memory array of the memory device, second data, if any, stored in row N?1 in the memory array, and third data, if any, stored in row N+1 in the memory array are stored in a temporary storage area of a memory device. The first data is written in row N, and, in response to an error, the first data, the second data, if any, and the third data, if any, are written in respective rows in a repair area in the memory device. The addresses of rows N?1, N, and N+1 are added to a table stored in the memory device to indicate which rows in the repair area should be used instead of rows N?1, N, and N+1.

Abstract: A memory device for repairing a neighborhood of rows in a memory array using a patch table is disclosed. In one embodiment, circuitry in the memory device is operative to store, in a temporary storage area of the memory device, (i) first data to be stored in row N in the memory array, (ii) second data, if any, stored in row N?1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array. The circuitry is operative to write the first data in row N in the memory array, and, in response to an error in writing the first data, to write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device. The circuitry is further operative to add the addresses of rows N?1, N, and N+1 to a table stored in the memory device.

Abstract: These embodiments relate to authentication and securing of write-once, read-many (WORM) memory devices. In one embodiment, a memory device comprises a controller operable in first and second modes of operation after stored security information is validated, wherein in the first mode of operation, the memory device operates in a read-only mode, and wherein in the second mode of operation, the memory device operates in a write-once, read-many (WORM) mode. In another embodiment, the controller is operative to perform security methods.

Abstract: The embodiments described herein can be used to enable one-time or few-time programmable memories to work with existing consumer electronic devices (such as those that work with flash—an erasable, non-volatile memory) without requiring a firmware upgrade, thereby providing backwards compatibility while minimizing user impact. As such, these embodiments are a viable way to bridge one-time or few-time programmable memories with existing consumer electronic devices that have flash card slots. These embodiments also allow future consumer electronic devices to be designed without updating firmware to include a file system customized for a one-time or few-time programmable memory.

Abstract: The embodiments described herein can be used to enable one-time or few-time programmable memories to work with existing consumer electronic devices (such as those that work with flash—an erasable, non-volatile memory) without requiring a firmware upgrade, thereby providing backwards compatibility while minimizing user impact. As such, these embodiments are a viable way to bridge one-time or few-time programmable memories with existing consumer electronic devices that have flash card slots. These embodiments also allow future consumer electronic devices to be designed without updating firmware to include a file system customized for a one-time or few-time programmable memory.

Abstract: The embodiments described herein can be used to enable one-time or few-time programmable memories to work with existing consumer electronic devices (such as those that work with flash—an erasable, non-volatile memory) without requiring a firmware upgrade, thereby providing backwards compatibility while minimizing user impact. As such, these embodiments are a viable way to bridge one-time or few-time programmable memories with existing consumer electronic devices that have flash card slots. These embodiments also allow future consumer electronic devices to be designed without updating firmware to include a file system customized for a one-time or few-time programmable memory.

Abstract: Compositions and methods of treating textiles are disclosed. More specifically, stable compositions and methods for softening a wide range of fabrics are disclosed, including 100% cotton and hydrophobic synthetic fabrics, without detrimentally affecting the water absorbency properties of the fabrics. The compositions and methods provide desirable odor control without interfering with the stability of the product. The compositions contain at least one fatty material, water-dispersible polyolefin or at least one water-soluble or waterdispersible polyorganosiloxane, and at least one bleaching agent, preferably hydrogen peroxide. The compositions may optionally contain discrete, individual polymer particles, preferably polytetrafluoroethylene (PTFE), polyvinyl acetate (PVA), polyvinyl acetate/acrylic copolymer (PVA/a), or a combination thereof. The compositions are particularly useful when added to the rinse water in the laundering process, or in the final scouring of a fabric finishing operation.

Abstract: One-time programmable (OTP) and write-once read-many (WORM) memory devices and methods for use therewith are provided. These embodiments can be used to provide compatibility between a memory device that uses an OTP (or few-time programmable (FTP)) memory array and host devices that use a file system, such as the DOS FAT file system, that expects to be able to rewrite to a memory address in the memory device. These embodiments can also be used to prevent accidental or deliberate overwrites, changes, or deletions to existing data in a WORM memory device.

Abstract: A one-time programmable (OTP) memory device and methods for use therewith are provided. These embodiments can be used to provide compatibility between a memory device that uses an OTP (or few-time programmable (FTP)) memory array and host devices that use a file system, such as the DOS FAT file system, that expects to be able to rewrite to a memory address in the memory device.

Abstract: The present invention includes an integrated (composite) watchband and process for making a watchband that integrates a high tensile strength fabric (e.g. an aramid fabric) within the watchband via an injection molding process. The resultant integrated watchband exhibits greatly increased strength while maintaining all the necessary characteristics of a conventional band.

Abstract: Compositions and methods of treating textiles are disclosed. More specifically, stable compositions and methods for softening a wide range of fabrics are disclosed, including 100% cotton and hydrophobic synthetic fabrics, without detrimentally affecting the water absorbency properties of the fabrics. The compositions and methods provide desirable odor control without interfering with the stability of the product. The compositions contain at least one fatty material, water-dispersible polyolefin or at least one water-soluble or waterdispersible polyorganosiloxane, and at least one bleaching agent, preferably hydrogen peroxide. The compositions may optionally contain discrete, individual polymer particles, preferably polytetrafluoroethylene (PTFE), polyvinyl acetate (PVA), polyvinyl acetate/acrylic copolymer (PVA/a), or a combination thereof. The compositions are particularly useful when added to the rinse water in the laundering process, or in the final scouring of a fabric finishing operation.

Abstract: A method for repairing a neighborhood of rows in a memory array using a patch table is disclosed. First data to be stored in row N in a memory array of the memory device, second data, if any, stored in row N-1 in the memory array, and third data, if any, stored in row N+1 in the memory array are stored in a temporary storage area of a memory device. The first data is written in row N, and, in response to an error, the first data, the second data, if any, and the third data, if any, are written in respective rows in a repair area in the memory device. The addresses of rows N-1, N, and N+1 are added to a table stored in the memory device to indicate which rows in the repair area should be used instead of rows N-1, N, and N+1.