Abstract: A memory device for repairing a neighborhood of rows in a memory array using a patch table is disclosed. In one embodiment, circuitry in the memory device is operative to store, in a temporary storage area of the memory device, (i) first data to be stored in row N in the memory array, (ii) second data, if any, stored in row N?1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array. The circuitry is operative to write the first data in row N in the memory array, and, in response to an error in writing the first data, to write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device. The circuitry is further operative to add the addresses of rows N?1, N, and N+1 to a table stored in the memory device.

Abstract: Compositions and methods of treating textiles are disclosed. More specifically, stable compositions and methods for softening a wide range of fabrics are disclosed, including 100% cotton and hydrophobic synthetic fabrics, without detrimentally affecting the water absorbency properties of the fabrics. The compositions and methods provide desirable odor control without interfering with the stability of the product. The compositions contain at least one fatty material, water-dispersible polyolefin or at least one water-soluble or waterdispersible polyorganosiloxane, and at least one bleaching agent, preferably hydrogen peroxide. The compositions may optionally contain discrete, individual polymer particles, preferably polytetrafluoroethylene (PTFE), polyvinyl acetate (PVA), polyvinyl acetate/acrylic copolymer (PVA/a), or a combination thereof. The compositions are particularly useful when added to the rinse water in the laundering process, or in the final scouring of a fabric finishing operation.

Abstract: The embodiments described herein can be used to enable one-time or few-time programmable memories to work with existing consumer electronic devices (such as those that work with flash—an erasable, non-volatile memory) without requiring a firmware upgrade, thereby providing backwards compatibility while minimizing user impact. As such, these embodiments are a viable way to bridge one-time or few-time programmable memories with existing consumer electronic devices that have flash card slots. These embodiments also allow future consumer electronic devices to be designed without updating firmware to include a file system customized for a one-time or few-time programmable memory.

Abstract: A digital storage system is coupled to a write-once memory array. File delete commands are implemented by over-writing a destructive digital pattern to at least a portion of the memory cells associated with the file to be deleted. One disclosed system alters the manner in which a file delete command is implemented, depending upon whether the file is stored in a write-once memory or in a re-writable memory.

Abstract: The preferred embodiments described herein provide a method for reading data in a write-once memory device using a write-many file system. In one preferred embodiment, data traffic between a data storage device and a write-once memory device is redirected so that file system structures of a write-many file system do not overwrite previously-stored file system structures. Data traffic between the write-once storage device and a data reading device is also redirected so that a current file system structure of the write-many file system is provided to the data reading device instead of an out-of- date file system structure. In another preferred embodiment, a non-volatile write-many memory array is provided in the write-once memory device to store file system structures of a write-many file system.

Abstract: The preferred embodiments described herein provide various data allocation and error recovery methods that allow data to be written to a write-once memory array using a write-many file system. Other preferred embodiments described herein relate to methods for generating a set of valid file system structures. The various preferred embodiments can be used alone or in combination with one another.

Abstract: The preferred embodiments described herein provide a memory device and method for storing and reading a file system structure in a write-once memory array. In one preferred embodiment, a plurality of bits representing a file system structure is inverted and stored in a write-once memory array. When the inverted plurality of bits is read from the memory array, the bits are inverted to provide the file system structure bits in their original, non-inverted configuration. With this preferred embodiment, a file system structure can be updated to reflect data stored in the memory array after the file system structure was written. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another.

Abstract: The preferred embodiments described herein provide a memory device and method for storing and reading data in a write-once memory array. In one preferred embodiment, a plurality of bits representing data is inverted and stored in a write-once memory array. When the inverted plurality of bits is read from the memory array, the bits are inverted to provide the data in its original, non-inverted configuration. By storing data bits in an inverted form, the initial, un-programmed digital state of the memory array is redefined as the alternative, programmed digital state. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another. For example, the embodiments in which data bits are inverted can be used alone or in combination with the embodiments in which data is redirected.

Abstract: The preferred embodiments described herein provide a memory device and methods for use therewith. In one preferred embodiment, a method is presented for using a file system to dynamically respond to variability in an indicated minimum number of memory cells of first and second write-once memory devices. In another preferred embodiment, a method for overwriting data in a memory device is described in which an error code is disregarded after a destructive pattern is written. In yet another preferred embodiment, a method is presented in which, after a block of memory has been allocated for a file to be stored in a memory device, available lines in that block are determined. Another preferred embodiment relates to reserving at least one memory cell in a memory device for file structures or file system structures. A memory device is also provided in which file system structures of at least two file systems are stored in the same memory partition.

Abstract: The preferred embodiments described herein provide a method for altering a word stored in a write-once memory device. In one preferred embodiment, a write-once memory device is provided storing a word comprising a plurality of data bits and a plurality of syndrome bits. The word is altered by identifying X bit(s) in the word that are in an un-programmed state and switching the X bit(s) from the un-programmed state to a programmed state, where X is sufficient to introduce an uncorrectable error in the word. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.

Abstract: The preferred embodiments described herein provide a method for making a write-once memory device read compatible with a write-many file system. In one preferred embodiment, a method for re-writing to a logical address of a write-once memory device is provided. A physical-to-logical address map is built from data stored in the memory device that associates individual physical addresses with individual logical addresses. When a logical address is re-written, data associating that logical address with a new physical address is stored, and data associating that logical address with an old physical address is invalidated. When the logical address is read, the physical-to-logical address map is used to read the new physical address instead of the old physical address. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another.

Abstract: A multiple-mode memory includes a three-dimensional array of word lines, bit lines and memory cells. The memory cells are arranged in multiple vertically stacked layers. In some layers the memory cells are implemented as field-programmable write-once memory cells, and in other layers the memory cells are implemented as field-programmable re-writable memory cells. In this way, both re-writability and permanent data storage are provided in an inexpensive, single-chip solution. Additional types and numbers of types of memory cells can be used.

Abstract: The preferred embodiments described herein provide a memory device and methods for use therewith. In one preferred embodiment, a method is presented for using a file system to dynamically respond to variability in an indicated minimum number of memory cells of first and second write-once memory devices. In another preferred embodiment, a method for overwriting data in a memory device is described in which an error code is disregarded after a destructive pattern is written. In yet another preferred embodiment, a method is presented in which, after a block of memory has been allocated for a file to be stored in a memory device, available lines in that block are determined. Another preferred embodiment relates to reserving at least one memory cell in a memory device for file structures or file system structures. A memory device is also provided in which file system structures of at least two file systems are stored in the same memory partition.

Abstract: Textiles treated with hydrophobic dispersions that exhibit superior drying rates and lower spin-dry water contents are disclosed. Polytetrafluoroethylene, polyvinyl acetate, and polyvinyl acetate/acrylic copolymer dispersions are used to treat textiles, including yarns, fabrics, linens, and articles of clothing. The use of dispersions create textiles with a discontinuous treatment of discrete individual hydrophobic particles applied to the surface. The treated textiles exhibit superior drying properties at very low levels of treatment. Also provided are methods for treating textiles with hydrophobic dispersions. The incremental cost to the textile of the treatment is minimized by low levels of treatment and flexibility in application.

Abstract: A multiple-mode memory includes a three-dimensional array of word lines, bit lines and memory cells. The memory cells are arranged in multiple vertically stacked layers. In some layers the memory cells are implemented as field-programmable write-once memory cells, and in other layers the memory cells are implemented as field-programmable re-writable memory cells. In this way, both re-writability and permanent data storage are provided in an inexpensive, single-chip solution. Additional types and numbers of types of memory cells can be used.

Abstract: The preferred embodiments described herein provide a memory device and methods for use therewith. In one preferred embodiment, a method is presented for using a file system to dynamically respond to variability in an indicated minimum number of memory cells of first and second write-once memory devices. In another preferred embodiment, a method for overwriting data in a memory device is described in which an error code is disregarded after a destructive pattern is written. In yet another preferred embodiment, a method is presented in which, after a block of memory has been allocated for a file to be stored in a memory device, available lines in that block are determined. Another preferred embodiment relates to reserving at least one memory cell in a memory device for file structures or file system structures. A memory device is also provided in which file system structures of at least two file systems are stored in the same memory partition.

Abstract: The preferred embodiments described herein provide a memory device and method for reading data stored in a portion of a memory device unreadable by a file system of a host device. In one preferred embodiment, a memory device is provided comprising a first portion that is readable by a file system of a host device and a second portion that is unreadable by the file system of the host device. The first portion stores program code operative to enable the host device to read the second portion. In operation, after the memory device is connected with the host device, the program code is provided to the host device, and the host device reads the data stored in the second portion of the memory device. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another.

Abstract: A multiple-mode memory includes a three-dimensional array of word lines, bit lines and memory cells. The memory cells are arranged in multiple vertically stacked layers. In some layers the memory cells are implemented as field-programmable write-once memory cells, and in other layers the memory cells are implemented as field-programmable re-writable memory cells. In this way, both re-writability and permanent data storage are provided in an inexpensive, single-chip solution. Additional types and numbers of types of memory cells can be used.

Abstract: Support circuitry for a three-dimensional memory array is formed in a substrate at least partially under the three-dimensional memory array and defines open area in the substrate under the three-dimensional memory array. In one preferred embodiment, one or more memory arrays are formed at least partially in the open area under the three-dimensional memory array, while in another preferred embodiment, logic circuitry implementing one or more functions is formed at least partially in the open area under the three-dimensional memory array. In yet another preferred embodiment, both one or more memory arrays and logic circuitry are formed at least partially in the open area under the three-dimensional memory array. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.

Abstract: The preferred embodiments described herein provide various data allocation and error recovery methods that allow data to be written to a write-once memory array using a write-many file system. Other preferred embodiments described herein relate to methods for generating a set of valid file system structures. The various preferred embodiments can be used alone or in combination with one another.