Abstract: FinFET structures are formed on silicon germanium fins. Both the sides and the top surfaces of the source/drain regions of the fins are etched, thereby exposing portions of the channel regions of the fins within gate spacers. Doped source/drain structures are epitaxially grown on the source/drain regions of the fins and exposed channel regions to obtain a uniform junction profile through the fin height direction as well as the fin top surface.

Abstract: A semiconductor structure includes a first strained fin portion and a second strained fin portion, a pair of inactive inner gate structures upon respective strained fin portions, and spacers upon outer sidewalls surfaces of the inactive inner gate structures, upon the inner sidewall surfaces of the inactive inner gate structures, and upon the first strained fin portion and the second strained fin portion end surfaces. The first strained fin portion and the second strained fin portion end surfaces are coplanar with respective inner sidewall surfaces of the inactive inner gate structures. The spacer formed upon the end surfaces limits relaxation of the first strained fin portion and the second strained fin portion and limits shorting between the first strained fin portion and the second strained fin portion.