Patents by Inventor Doo-Young Lee

Doo-Young Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240132386
    Abstract: The present invention relates to a water treatment device, and more specifically to a water purifier capable of removing scale in a simple manner.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 25, 2024
    Applicant: COWAY Co., Ltd.
    Inventors: Si Jun PARK, Hyun Suk MOON, Sang-Young LEE, Doo Won HAN, Jung Chul PARK, In Du CHOI
  • Publication number: 20240127748
    Abstract: A display device includes a scan driver to supply scan signals to first and second scan lines, a data driver to supply a data signal to data lines, a sensor connected to sensing lines, and pixels including a light-emitting element, a driving transistor to control an amount of current supplied to the light-emitting element in response to a voltage of a first node, a switching transistor between a j-th data line and the first node, and including a gate electrode coupled to an i-th first scan line, and a sensing transistor coupled between a second node, which is between the light-emitting element and the driving transistor, and a k-th sensing line, and including a gate electrode coupled to an i-th second scan line, and wherein the sensor is to sense deterioration information of the light-emitting element in a state in which the switching and sensing transistors are turned on.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 18, 2024
    Inventors: Hyuk KIM, Jong Hee KIM, Doo Young LEE, Chang Soo LEE, Sang Uk LIM, Bo Yong CHUNG
  • Patent number: 11961742
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: April 16, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
  • Publication number: 20240120211
    Abstract: A wafer level fan out package includes a semiconductor die having a first surface, a second surface, and a third surface. A stiffener is disposed on the third surface of the semiconductor die. A conductive via passes through the stiffener. First and second electrically conductive patterns electrically connected to the conductive via are disposed on the first and second surfaces of the semiconductor die and stiffener. Solder balls are electrically connected to the first or second electrically conductive patterns.
    Type: Application
    Filed: September 15, 2023
    Publication date: April 11, 2024
    Inventors: Jin Young Kim, Doo Hyun Park, Seung Jae Lee
  • Patent number: 11950506
    Abstract: The present disclosure relates to a plurality of host materials comprising a first host material comprising a compound represented by formula 1, and a second host material comprising a compound represented by formula 2, and an organic electroluminescent device comprising the same. By comprising a specific combination of compounds as host materials, it is possible to provide an organic electroluminescent device having lower driving voltage, higher luminous efficiency, higher power efficiency, and/or superior lifespan characteristics compared to conventional organic electroluminescent devices.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: April 2, 2024
    Assignee: Rohm and Haas Electronic Materials Korea Ltd.
    Inventors: So-Young Jung, Su-Hyun Lee, Mi-Ja Lee, Sang-Hee Cho, Doo-Hyeon Moon
  • Publication number: 20240096283
    Abstract: A display device includes a display panel including pixels, a gate driver which sequentially applies scan signals to pixel rows including the pixels at a scan frequency, a data driver which applies data voltages to the pixels, a power voltage generator which applies a power voltage to the pixels, and a timing controller which sets a ripple frequency of the power voltage to deviate from the scan frequency by a predetermined reference ratio or more.
    Type: Application
    Filed: May 16, 2023
    Publication date: March 21, 2024
    Inventors: SANG-UK LIM, JONGHEE KIM, HYUK KIM, SEUNGHYUN PARK, DOO-YOUNG LEE, BOYONG CHUNG
  • Publication number: 20240087503
    Abstract: A display device includes pixels each including a driving transistor and a light-emitting element, a sensing unit which generates a digital data by receiving a sensing voltage corresponding to a characteristic of a driving transistor from a predetermined pixel among the pixels during a sensing period, and generates sensing data using the digital data, and a timing controller which receives input data from an outside, corrects the input data using the sensing data and generates output data, and the sensing unit generates one sensing data using two or more digital data corresponding to the predetermined pixel.
    Type: Application
    Filed: May 19, 2023
    Publication date: March 14, 2024
    Inventors: Sang Uk LIM, Hyuk KIM, Doo Young LEE, Bo Yong CHUNG
  • Patent number: 11927886
    Abstract: Disclosed are a substrate treating apparatus and a substrate treating method. According to an embodiment of the inventive concept, the purge operation of the purge nozzle is performed while the nozzle arm is moved from the first substrate support member to the second substrate support member, it hardly influences the operation of treating the substrate while the nozzle arm is moved from the first substrate support member to the second substrate support member. According to an embodiment of the inventive concept, the substrate treating apparatus may perform an operation of purging the photosensitive liquid nozzle while the treatment liquid supply unit performs a process of supplying the photosensitive liquid to the substrate. Accordingly, because the operation of purging the photosensitive liquid nozzle is performed at the same time when the substrate treating apparatus performs a process, productivity may be improved.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: March 12, 2024
    Assignee: SEMES CO., LTD.
    Inventors: Doo Young Oh, Joon Jae Lee
  • Publication number: 20240078962
    Abstract: Provided is a gate driving circuit comprising an N-th stage and an N+1-th stage. The N-th stage outputs an N-th scan gate signal based on an N-th scan clock signal, a voltage of a QN node, and a voltage of a QBN node and to output an N-th carry signal based on an N-th carry clock signal, the voltage of the QN node, and the voltage of the QBN node. The N+1-th stage outputs an N+1-th scan gate signal based on an N+1-th scan clock signal, a voltage of a QN+1 node, and the voltage of the QBN node and an N+1-th carry signal based on an N+1-th carry clock signal, the voltage of the QN+1 node, and the voltage of the QBN node. The N-th stage and the N+1-th stage share an inverting circuit. The inverting circuit controls the QBN node based on a third signal. N is a positive integer.
    Type: Application
    Filed: May 3, 2023
    Publication date: March 7, 2024
    Inventors: HYUK KIM, JONGHEE KIM, DOO-YOUNG LEE, CHANG-SOO LEE, SANG-UK LIM, BOYONG CHUNG
  • Patent number: 11824462
    Abstract: Proposed is a sub-module of a power converter, the sub-module capable of allowing failure-causing electric current to quickly bypass the sub-module when a failure occurs in the sub-module. A sub-module of a power converter according to an embodiment of the present disclosure, the sub-module including an energy storage unit, at least one power semiconductor circuit connected, in parallel, to the energy storage unit and configured with a plurality of power semiconductor switches and a plurality of freewheeling diodes, and a switching element arranged between two output terminals connected to one of one or more of the power semiconductor circuits, forced to undergo an induced failure when an induced-failure signal is input into a gate terminal thereof, and internally short-circuited, thereby connecting the output terminals to each other.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: November 21, 2023
    Assignee: HYOSUNG HEAVY INDUSTRIES CORPORATION
    Inventors: Doo Young Lee, Yong Hee Park, Hong Ju Jung
  • Patent number: 11817767
    Abstract: Proposed is a submodule of an MMC converter configured to stably supply power to a submodule controller controlling the submodule of an MMC converter. The submodule includes: an energy storage part storing electric energy therein; a plurality of switching elements connected in parallel to the energy storage part to have a shape of a bridge; a plurality of serially-connected resistors connected in parallel to the energy storage part; a plurality of DC-DC converters connected in parallel to a resistor of the plurality of resistors; a power switching part operating to select and output one voltage of voltages output from the plurality of DC-DC converters and a plurality of voltages input from outside; and a submodule controller operating with the voltage output by the power switching part so as to control switching operations of the plurality of switching elements.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: November 14, 2023
    Assignee: HYOSUNG HEAVY INDUSTRIES CORPORATION
    Inventors: Yong Hee Park, Sung Min Oh, Doo Young Lee, Hong Ju Jung
  • Publication number: 20230269984
    Abstract: A display panel includes a base layer, a first conductive layer disposed on the base layer and including a power pattern, a second conductive layer disposed on the first conductive layer, and a first insulating layer disposed between the first conductive layer and the second conductive layer. The first insulating layer is provided with at least one first contact hole defined therethrough and disposed at an upper side in a plan view and at least one second contact hole defined therethrough and disposed at a lower side in a plan view, the first conductive layer is electrically connected to the second conductive layer via the at least one first contact hole and the at least one second contact hole, and a number of the at least one first contact hole is equal to a number of the at least one second contact hole.
    Type: Application
    Filed: February 21, 2023
    Publication date: August 24, 2023
    Applicant: Samsung Display Co., Ltd.
    Inventors: DOO-YOUNG LEE, BOGYEONG KIM, TAK-YOUNG LEE, SANG-UK LIM
  • Patent number: 11727851
    Abstract: A gate driver includes active stages that output gate signals to a display part and pre-stages connected to the active stages to output carry signals to the active stages. The pre-stages include a first pre-stage and a second pre-stage. The second pre-stage includes a Q node compensator that receives a clock signal from the first pre-stage and compensates for a voltage of a Q node based on the clock signal of the first pre-stage. The Q node compensator includes a feedback transistor that diode-connects a feedback input terminal, which receives the clock signal of the first pre-stage, to a feedback node of the second pre-stage. The feedback transistor includes a first electrode, a second electrode, and a third electrode, where the first electrode is connected to the feedback input terminal, the second electrode is connected to the first electrode, and the third electrode is connected to the feedback node.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Junghwan Hwang, Doo-young Lee
  • Patent number: 11652401
    Abstract: The present disclosure relates to a sub-module of a power converter, the sub-module capable of allowing failure-causing electric current to bypass the sub-module when a failure occurs in the sub-module.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: May 16, 2023
    Assignee: HYOSUNG HEAVY INDUSTRIES CORPORATION
    Inventors: Doo Young Lee, Yong Hee Park, Hong Ju Jung
  • Publication number: 20220376611
    Abstract: Proposed is a sub-module of a power converter, the sub-module capable of allowing failure-causing electric current to quickly bypass the sub-module when a failure occurs in the sub-module. A sub-module of a power converter according to an embodiment of the present disclosure, the sub-module including an energy storage unit, at least one power semiconductor circuit connected, in parallel, to the energy storage unit and configured with a plurality of power semiconductor switches and a plurality of freewheeling diodes, and a switching element arranged between two output terminals connected to one of one or more of the power semiconductor circuits, forced to undergo an induced failure when an induced-failure signal is input into a gate terminal thereof, and internally short-circuited, thereby connecting the output terminals to each other.
    Type: Application
    Filed: August 21, 2020
    Publication date: November 24, 2022
    Inventors: Doo Young LEE, Yong Hee PARK, Hong Ju JUNG
  • Publication number: 20220376610
    Abstract: The present disclosure relates to a sub-module of a power converter, the sub-module capable of allowing failure-causing electric current to bypass the sub-module when a failure occurs in the sub-module.
    Type: Application
    Filed: August 21, 2020
    Publication date: November 24, 2022
    Inventors: Doo Young LEE, Yong Hee PARK, Hong Ju JUNG
  • Publication number: 20220358873
    Abstract: A gate driver includes active stages that output gate signals to a display part and pre-stages connected to the active stages to output carry signals to the active stages. The pre-stages include a first pre-stage and a second pre-stage. The second pre-stage includes a Q node compensator that receives a clock signal from the first pre-stage and compensates for a voltage of a Q node based on the clock signal of the first pre-stage. The Q node compensator includes a feedback transistor that diode-connects a feedback input terminal, which receives the clock signal of the first pre-stage, to a feedback node of the second pre-stage. The feedback transistor includes a first electrode, a second electrode, and a third electrode, where the first electrode is connected to the feedback input terminal, the second electrode is connected to the first electrode, and the third electrode is connected to the feedback node.
    Type: Application
    Filed: March 24, 2022
    Publication date: November 10, 2022
    Inventors: Junghwan Hwang, Doo-young Lee
  • Publication number: 20220231107
    Abstract: A light emitting display device including: a first pixel including a first lower storage electrode, a first gate electrode of a first driving transistor, and a first upper storage electrode; and a second pixel provided near the first pixel, and including a second lower storage electrode, a second gate electrode of a second driving transistor, and a second upper storage electrode. In a plan view, the first gate electrode and the second gate electrode have first sides facing each other, the first side of the first gate electrode is positioned inside a border of the first lower storage electrode or the first upper storage electrode in a plan view, and the first side of the second gate electrode is positioned inside a border of the second lower storage electrode or the second upper storage electrode in a plan view.
    Type: Application
    Filed: September 10, 2021
    Publication date: July 21, 2022
    Inventors: Doo-Young Lee, Jong Hee Kim, Yoo Mi Ra, Kyung-Ho Park, Geun Ho Lee, Chang-Soo Lee, Tak-Young Lee, Bo Yong Chung, Jung Hwan Hwang
  • Publication number: 20220094279
    Abstract: Proposed is a submodule of an MMC converter configured to stably supply power to a submodule controller controlling the submodule of an MMC converter. The submodule includes: an energy storage part storing electric energy therein; a plurality of switching elements connected in parallel to the energy storage part to have a shape of a bridge; a plurality of serially-connected resistors connected in parallel to the energy storage part; a plurality of DC-DC converters connected in parallel to a resistor of the plurality of resistors; a power switching part operating to select and output one voltage of voltages output from the plurality of DC-DC converters and a plurality of voltages input from outside; and a submodule controller operating with the voltage output by the power switching part so as to control switching operations of the plurality of switching elements.
    Type: Application
    Filed: December 30, 2019
    Publication date: March 24, 2022
    Inventors: Yong Hee PARK, Sung Min OH, Doo Young LEE, Hong Ju JUNG
  • Patent number: 11133392
    Abstract: Provided is a semiconductor device including a substrate with an active pattern, a gate electrode crossing the active pattern, a source/drain region in an upper portion of the active pattern at a side of the gate electrode, the source/drain region including a recess region at an upper region thereof, a contact electrically connected to the source/drain region, the contact including a lower portion provided in the recess region, and a metal silicide layer provided at a lower region of the recess region and between the source/drain region and the contact.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: September 28, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyoseok Choi, Hwichan Jun, Yoonhae Kim, Chulsung Kim, Heungsik Park, Doo-Young Lee