Patents by Inventor Elpida Tzortzatos

Elpida Tzortzatos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9898226
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: February 20, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Harris M. Morgenstern, James H. Mulder, Elpida Tzortzatos, Dieter Wellerdiek
  • Patent number: 9898198
    Abstract: In one embodiment, a computer-implemented method includes building an available frame header queue (AFHQ). The AFHQ includes one or more headers, each header including one or more frame references being no more than a maximum count of frame references. Each of the one or more frame references of each of the one or more headers refers to an available frame. A frame request is received for one or more requested frames. One or more frame references are extracted, by a computer processor, from the AFHQ in response to the frame request. The extracting includes extracting from the AFHQ one or more requested headers including the one or more frame references referring to at least a portion of the one or more requested frames.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: February 20, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Hom, Harris M. Morgenstern, Steven M. Partlow, Scott B. Tuttle, Elpida Tzortzatos
  • Publication number: 20180032338
    Abstract: Embodiments of the present invention provide systems and methods for clearing specified blocks of main storage. In one embodiment, an EADM start subchannel is executed. The instructions of the execution of the EADM start subchannel may include a SAP receiving an ADM request block, which specifies a main-storage-clearing operation command. The address and size of a block of main memory to be cleared by the SAP is specified in an MSB designated by the ADM request block.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 1, 2018
    Inventors: Anthony F. Coneski, Beth A. Glendening, Dan F. Greiner, Peter G. Sutton, Scott B. Tuttle, Elpida Tzortzatos
  • Publication number: 20180032337
    Abstract: Embodiments of the present invention provide systems and methods for clearing specified blocks of main storage. In one embodiment, an EADM start subchannel is executed. The instructions of the execution of the EADM start subchannel may include a SAP receiving an ADM request block, which specifies a main-storage-clearing operation command. The address and size of a block of main memory to be cleared by the SAP is specified in an MSB designated by the ADM request block.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 1, 2018
    Inventors: Anthony F. Coneski, Beth A. Glendening, Dan F. Greiner, Peter G. Sutton, Scott B. Tuttle, Elpida Tzortzatos
  • Publication number: 20170329722
    Abstract: Memory management is provided which includes a page replacement process managed by a storage manager and a workload manager. The page replacement process swaps out the content associated with a frame of physical memory to an auxiliary storage in order to provide a free frame. The memory management process includes: determining that the physical memory runs out of free frames; providing priority information from the workload manager to the storage manager, the priority information indicating the priority or business relevance of a certain process; selecting one or more pages to be swapped to the auxiliary storage based on the priority information; and swapping out the contents of the one or more selected pages to the auxiliary storage.
    Type: Application
    Filed: May 16, 2016
    Publication date: November 16, 2017
    Inventors: Harris M. MORGENSTERN, Horst SINRAM, Elpida TZORTZATOS, Dieter WELLERDIEK
  • Publication number: 20170315731
    Abstract: An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.
    Type: Application
    Filed: July 17, 2017
    Publication date: November 2, 2017
    Inventors: Peter D. Driever, Charles W. Gainey, JR., Steven G. Glassen, Thomas B. Mathias, Kenneth J. Oakes, Peter G. Sutton, Peter K. Szwed, Elpida Tzortzatos, Harry M Yudenfriend
  • Patent number: 9747033
    Abstract: An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: August 29, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Peter D. Driever, Charles W. Gainey, Jr., Steven G. Glassen, Thomas B. Mathias, Kenneth J. Oakes, Peter G. Sutton, Peter K. Szwed, Elpida Tzortzatos, Harry M Yudenfriend
  • Patent number: 9740605
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: August 22, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Harris M. Morgenstern, James H. Mulder, Elpida Tzortzatos, Dieter Wellerdiek
  • Patent number: 9727335
    Abstract: Embodiments of the present invention provide systems and methods for clearing specified blocks of main storage. In one embodiment, an EADM start subchannel is executed. The instructions of the execution of the EADM start subchannel may include a SAP receiving an ADM request block, which specifies a main-storage-clearing operation command. The address and size of a block of main memory to be cleared by the SAP is specified in an MSB designated by the ADM request block.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Incorporated
    Inventors: Anthony F. Coneski, Beth A. Glendening, Dan F. Greiner, Peter G. Sutton, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 9715350
    Abstract: In one embodiment, a computer-implemented method includes receiving a large frame area (LFAREA) request, including a request for a plurality of page frame table entries (PFTEs) to back a plurality of frames in an LFAREA of main memory. Each of the plurality of frames has one of a first size and a second size, where the second size is larger than the first size. The method further includes counting how many frames in the main memory have yet to be initialized and have one of the first size and the second size. A size needed for the plurality of PFTEs is calculated, based at least in part on the counting. A storage area is reserved for the plurality of PFTEs, by a computer processor, where a size of the storage area is the size calculated based at least in part on the counting.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: July 25, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Harris M. Morgenstern, Steven M. Partlow, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 9715349
    Abstract: Technical solutions for providing real time analytics of a private area of a virtual address space are described. One general aspect includes a method that includes determining, by a processor, a start address and a size of the private area of the virtual address space. The method also includes determining, by the processor, a highest address corresponding to a user region of the private area. The method also includes determining, by the processor, a lowest address corresponding to a high-end region of the private area. The method also includes storing, by the processor, the determined information in a common area outside the virtual address space.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: July 25, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Hom, Paula M. Spens, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 9703501
    Abstract: Technical solutions for providing real time analytics of a private area of a virtual address space are described. One general aspect includes a method that includes determining, by a processor, a start address and a size of the private area of the virtual address space. The method also includes determining, by the processor, a highest address corresponding to a user region of the private area. The method also includes determining, by the processor, a lowest address corresponding to a high-end region of the private area. The method also includes storing, by the processor, the determined information in a common area outside the virtual address space.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: July 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Hom, Paula M. Spens, Scott B. Tuttle, Elpida Tzortzatos
  • Patent number: 9696924
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: July 4, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Patent number: 9697143
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: July 4, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Patent number: 9690483
    Abstract: In one embodiment, a computer-implemented method includes producing one or more clean frames by clearing a batch of one or more frames for use in backing virtual memory pages. The producing the one or more clean frames may be performed asynchronously from a unit of work being performed by a processor. The one or more clean frames may be added to a clean frame queue, where the clean frame queue includes a plurality of clean frames that have been cleared. A first request may be received, from the processor, for a frame for use in backing a virtual memory page of the unit of work. A clean frame, of the one or more clean frames, may be removed from the clean frame queue, responsive to the first request. The clean frame may be delivered to the processor, responsive to the first request.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: June 27, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Miller, Jr., Steven M. Partlow, Thomas F. Rankin, Scott B. Tuttle, Elpida Tzortzatos
  • Publication number: 20170161207
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Application
    Filed: February 23, 2017
    Publication date: June 8, 2017
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Patent number: 9658792
    Abstract: In one embodiment, a computer-implemented method includes receiving a large frame area (LFAREA) request, including a request for a plurality of page frame table entries (PFTEs) to back a plurality of frames in an LFAREA of main memory. Each of the plurality of frames has one of a first size and a second size, where the second size is larger than the first size. The method further includes counting how many frames in the main memory have yet to be initialized and have one of the first size and the second size. A size needed for the plurality of PFTEs is calculated, based at least in part on the counting. A storage area is reserved for the plurality of PFTEs, by a computer processor, where a size of the storage area is the size calculated based at least in part on the counting.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: May 23, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Harris M. Morgenstern, Steven M. Partlow, Scott B. Tuttle, Elpida Tzortzatos
  • Publication number: 20170123966
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Application
    Filed: August 26, 2016
    Publication date: May 4, 2017
    Inventors: ROBERT MILLER, JR., HARRIS M. MORGENSTERN, JAMES H. MULDER, ELPIDA TZORTZATOS, DIETER WELLERDIEK
  • Publication number: 20170123725
    Abstract: Technical solutions for reducing page invalidation broadcasts in virtual storage management are described. One general aspect includes a method including allocating, by a storage manager, a virtual memory page to a memory buffer that is used by an application being executed by a multiprocessor system, the virtual memory page being allocated from an address space of the application. The method also includes recording, by a memory management unit, a mapping between the virtual memory page and a physical location in a memory. The method also includes in response to a request, from the application, to deallocate the memory buffer, delaying invalidation of the mapping between the virtual memory page and the physical location in a memory, based on a count of free frames in the address space of the application.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 4, 2017
    Inventors: ROBERT MILLER, JR., HARRIS M. MORGENSTERN, JAMES H. MULDER, ELPIDA TZORTZATOS, DIETER WELLERDIEK
  • Publication number: 20170123735
    Abstract: Technical solutions are described for reducing page invalidation broadcasts in a computer system. An example method includes pre-allocating a pool of large memory frames by a real storage manager. The method also includes receiving, by a virtual storage manager, an instruction from an application to allocate a memory buffer, where the instruction includes a request to back the memory buffer using large pages. The virtual storage manager, in response to the instruction, allocates the memory buffer from the pre-allocated pool of large memory frames.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 4, 2017
    Inventors: DAVID HOM, JAMES H. MULDER, PAULA M. SPENS, ELPIDA TZORTZATOS