Patents by Inventor Feng Chang

Feng Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161818
    Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 16, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
  • Patent number: 11984322
    Abstract: A manufacturing method of a semiconductor device, comprises the following steps: providing a semiconductor substrate; forming a dummy insulation layer and a dummy electrode sequentially stacked on the semiconductor substrate; forming spacers on sidewalls of the dummy electrode; removing the dummy electrode to exposes inner sidewalls of the spacers; and performing an ion implantation process to the inner sidewalls of the spacers and the dummy insulation layer.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tien-Shun Chang, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20240153950
    Abstract: A semiconductor device includes a first to sixth regions, a first gate, a first metal contact and a second metal contact. The second region is disposed opposite to the first region with respect to the first gate. The first metal contact couples the first region to the second region. The fourth region is disposed opposite to the third region with respect to the first gate. The second metal contact is coupling the third region to the fourth region. The fifth region is disposed between the first gate and the second region, and is disconnected from the first metal contact and the second metal contact. The sixth region is disposed between the first gate and the first region, and is disconnected from the first metal contact and the second metal contact.
    Type: Application
    Filed: January 16, 2024
    Publication date: May 9, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Feng CHANG, Po-Lin PENG, Jam-Wem LEE
  • Patent number: 11979738
    Abstract: A method of wireless communication locator station to be disposed at specific location includes: detecting rotation angle information of client-based portable device, carried or worn by user, according to specific wireless communication standard between wireless communication locator station and client-based portable device when client-based portable device is within signal range of wireless communication locator station; generating head pose direction estimation according to calculated rotation angle information; and when head pose direction estimation indicates that a user turns face towards wireless communication locator station, sending packet signal from wireless communication locator station to server-based portable device, successfully paired with and security-connected with client-based portable device, so that server-based portable device can transfer packet signal to client-based portable device after receiving packet signal.
    Type: Grant
    Filed: March 29, 2023
    Date of Patent: May 7, 2024
    Assignee: PixArt Imaging Inc.
    Inventors: Shih-Feng Chen, Yen-Min Chang
  • Publication number: 20240145321
    Abstract: A substrate integrated with passive devices and a manufacturing method thereof are provided.
    Type: Application
    Filed: April 23, 2021
    Publication date: May 2, 2024
    Inventors: Chuncheng CHE, Feng LIU, Yuelei XIAO, Yue LI, Guochen DU, Xue CAO, Yifan WU, Wenbo CHANG
  • Publication number: 20240145032
    Abstract: The present disclosure relates to systems and methods for providing individualized prognostic assessments of breast cancer recurrence (e.g., locoregional recurrence). The systems and methods involve measuring gene expression from a patient sample to create a gene expression signature which identifies subjects who are not likely to benefit from radiotherapy following breast cancer surgery.
    Type: Application
    Filed: March 1, 2022
    Publication date: May 2, 2024
    Inventors: S. Laura Chang, Lori J. Pierce, Corey Speers, Felix Feng, Per Malmström, Mårten Fernö, Erik Holmberg, Per O. Karlsson
  • Publication number: 20240144862
    Abstract: An electronic device with a first region and a second region located around the first region is disclosed. The electronic device includes a first gate driver and a second gate driver disposed in the second region, and a first transistor and a second transistor disposed in the first region. The first gate driver is used for outputting a first signal. The second gate driver is used for outputting a second signal. The first transistor is used for receiving the first signal from the first gate driver. The second transistor is used for receiving the second signal from the second gate driver. In a top view of the electronic device, the first region has a first side and a second side opposite to the first side, and the first gate driver and the second gate driver are located more adjacent to the first side and away from the second side.
    Type: Application
    Filed: January 3, 2024
    Publication date: May 2, 2024
    Applicant: InnoLux Corporation
    Inventors: Chun-Hsien LIN, Jui-Feng KO, Geng-Fu CHANG
  • Publication number: 20240147711
    Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: PERNG-FEI YUH, YIH WANG, MENG-SHENG CHANG, JUI-CHE TSAI, KU-FENG LIN, YU-WEI LIN, KEH-JENG CHANG, CHANSYUN DAVID YANG, SHAO-TING WU, SHAO-YU CHOU, PHILEX MING-YAN FAN, YOSHITAKA YAMAUCHI, TZU-HSIEN YANG
  • Publication number: 20240145597
    Abstract: A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming source/drain regions over the fin on opposing sides of the gate structure; forming a first dielectric layer and a second dielectric layer successively over the source/drain regions; performing a first etching process to form an opening in the first dielectric layer and in the second dielectric layer, where the opening exposes an underlying electrically conductive feature; after performing the first etching process, performing a second etching process to enlarge a lower portion of the opening proximate to the substrate; and forming a contact plug in the opening after the second etching process.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 2, 2024
    Inventors: Yu-Lien Huang, Guan-Ren Wang, Ching-Feng Fu, Yun-Min Chang
  • Patent number: 11972951
    Abstract: The present disclosure relates to a method for fabricating a semiconductor structure. The method includes providing a substrate with a gate structure, an insulating structure over the gate structure, and a S/D region; depositing a titanium silicide layer over the S/D region with a first chemical vapor deposition (CVD) process. The first CVD process includes a first hydrogen gas flow. The method also includes depositing a titanium nitride layer over the insulating structure with a second CVD process. The second CVD process includes a second hydrogen gas flow. The first and second CVD processes are performed in a single reaction chamber and a flow rate of the first hydrogen gas flow is higher than a flow rate of the second hydrogen gas flow.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Wei Chang, Kao-Feng Lin, Min-Hsiu Hung, Yi-Hsiang Chao, Huang-Yi Huang, Yu-Ting Lin
  • Patent number: 11974441
    Abstract: A 3D memory array in which epitaxial source/drain regions which are horizontally merged and vertically unmerged are used as source lines and bit lines and methods of forming the same are disclosed. In an embodiment, a memory array includes a first channel region over a semiconductor substrate; a first epitaxial region electrically coupled to the first channel region; a second epitaxial region directly over the first epitaxial region in a direction perpendicular to a major surface of the semiconductor substrate; a dielectric material between the first epitaxial region and the second epitaxial region, the second epitaxial region being isolated from the first epitaxial region by the dielectric material; a gate dielectric surrounding the first channel region; and a gate electrode surrounding the gate dielectric.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Bo-Feng Young, Sai-Hooi Yeong, Chih-Yu Chang, Chi On Chui, Yu-Ming Lin
  • Publication number: 20240127109
    Abstract: A federated learning method includes: providing importance parameters and performance parameters by client devices respectively to a central device, performing a training procedure by the central device, wherein the training procedure includes: selecting target devices from the client devices according to a priority order associated with the importance parameters, dividing the target devices into training groups according to a similarity of the performance parameters, notifying the target devices to perform iterations according to the training groups respectively to generate trained models, transmitting the trained models to the central device, and updating a global model based on the trained models, performing the training procedure again or outputting the global model to the client devices based on a convergence value of the global model and the number of times of performing the training procedure.
    Type: Application
    Filed: November 10, 2022
    Publication date: April 18, 2024
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Ping Feng WANG, Chiun Sheng HSU, Chi-Yuan CHOU, Fu-Chiang CHANG
  • Publication number: 20240128699
    Abstract: A power storage connector includes a socket, a sleeve and a plug. The socket includes a fixed plate, a connecting unit and a fixing component configured on the fixed plate, and a limiting structure configured around the outer side of the connecting unit. The sleeve includes a limited component and a fixing structure configured on the outer sidewall and the inner sidewall of the connecting portion respectively. When the sleeve sleeves on the connecting unit, the limited component is located in the limiting structure and configured to move along the limiting structure, so that the sleeve is capable of rotating on the connecting unit. The plug includes a plug case detachably coupled and linked with the sleeve. The plug case drives the sleeve to rotate to engage the fixing structure and the fixing component, so as to connect and fix the plug to the socket.
    Type: Application
    Filed: July 27, 2023
    Publication date: April 18, 2024
    Inventors: HSU-FENG CHANG, LIN HUANG
  • Publication number: 20240118071
    Abstract: A strain sensor may have a conductive elastic yarn including a first fiber having a predetermined length and a shape of a fiber yarn and a second fiber having electrical conductivity and a sheet shape. The strain sensor may have a pair of wiring members electrically connected to both ends of the conductive elastic yarn. The conductive elastic yarn, with the second fiber wrapped around the first fiber, is twisted in a coil shape.
    Type: Application
    Filed: February 1, 2023
    Publication date: April 11, 2024
    Inventors: Mi Yong Lee, Seong Hyun Son, Moon Young Jung, Jun Ho Song, Jong Seo Kim, Woo Chang Jeong, Gwan Mu Lee, Dong Seok Suh, Feng Wang
  • Publication number: 20240118073
    Abstract: Manufacturing of a shoe is enhanced by creating 3-D models of shoe parts. For example, a laser beam may be projected onto a shoe-part surface, such that a projected laser line appears on the shoe part. An image of the projected laser line may be analyzed to determine coordinate information, which may be converted into geometric coordinate values usable to create a 3-D model of the shoe part. Once a 3-D model is known and is converted to a coordinate system recognized by shoe-manufacturing tools, certain manufacturing steps may be automated.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 11, 2024
    Inventors: Patrick C. Regan, Chih-Chi Chang, Kuo-Hung Lee, Ming-Feng Jean
  • Patent number: 11952449
    Abstract: The invention is related to a class of hydrophilic poly(meth)acrylamide-based copolymers each comprising dangling (i.e., pendant) reactive chains each terminated with a carboxyl group groups and at least 50% by mole of (meth)acrylamide repeating units relative to all repeating units of the hydrophilic poly(meth)acrylamide-based copolymer. The hydrophilic copolymers have a relatively high affinity to a base coating of a polyanionic polymer on a medical device or contact lens and are highly reactive towards azetidinium groups of an azetidinium-containing polymer upon heating. They can find particular use in producing water-soluble highly-branched hydrophilic polymeric material and in producing water gradient contact lenses.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: April 9, 2024
    Assignee: Alcon Inc.
    Inventors: Frank Chang, Feng Jing, Troy Vernon Holland, Chung-Yuan Chiang, John Dallas Pruitt
  • Patent number: 11953877
    Abstract: Manufacturing of a shoe or a portion of a shoe is enhanced by executing various shoe-manufacturing processes in an automated fashion. For example, information describing a shoe part may be determined, such as an identification, an orientation, a color, a surface topography, an alignment, a size, etc. Based on the information describing the shoe part, automated shoe-manufacturing apparatuses may be instructed to apply various shoe-manufacturing processes to the shoe part, such as a pickup and placement of the shoe part with a pickup tool.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: April 9, 2024
    Assignee: NILE, Inc.
    Inventors: Dragan Jurkovic, Patrick Conall Regan, Chih-Chi Chang, Chang-chu Liao, Ming-Feng Jean, Kuo-Hung Lee, Yen-Hsi Liu, Hung-Yu Wu
  • Publication number: 20240113032
    Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.
    Type: Application
    Filed: April 25, 2023
    Publication date: April 4, 2024
    Inventors: Kai-Fung CHANG, Chin-Wei LIANG, Sheng-Feng WENG, Ming-Yu YEN, Cheyu LIU, Hung-Chih CHEN, Yi-Yang LEI, Ching-Hua HSIEH
  • Publication number: 20240113044
    Abstract: A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Inventor: Yi-Feng Chang
  • Publication number: 20240112688
    Abstract: The present disclosure provides an audio compression device, an audio compressing system and an audio compression method. The audio compression device comprises a first transceiver and a first processor. The first transceiver is connected to the first processor. The processor obtains an audio signal and an available bandwidth, and the processor performs an audio compression encoding on the audio signal to obtain a sample audio signal, and then compares with the audio signal and the sample audio signal to generate a residual signal, and the residual signal is transmitted according to the available bandwidth. The audio signal can be completely transmitted to an audio decompression device to reduce the distortion of the audio signal.
    Type: Application
    Filed: October 4, 2022
    Publication date: April 4, 2024
    Applicant: SAVITECH CORP.
    Inventors: Sing-Ban Robert TIEN, Wen-Wei KANG, Wu-Lin CHANG, Chi-Feng HUANG, Lee-Chang PANG