Abstract: The present invention discloses a head-mounted display device and a communication device including a communication circuit, an antenna assembly, and a transfer module. The antenna assembly includes at least one first antenna and a second antenna. The first antenna is electrically connected to the communication circuit, and the second antenna is disposed at a top headband of the head-mounted display device. The transfer module includes a connecting wire assembly, a transfer element, and a transfer wire assembly. The transfer wire assembly is electrically connected to the transfer element and the second antenna. Two ends of the connecting wire assembly are connected to the communication circuit and the transfer element, respectively. The connecting wire assembly includes two radio frequency (RF) signal wires and a power signal wire. A power loss of the two RF signal wires is less than a power loss of the transfer wire assembly.

Abstract: A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.

Abstract: Interconnect via metal-insulator-metal (MIM) fuse for integrated circuitry. Two electrode metallization features, which may be within a backend of an IC die, are coupled through a via comprising a fuse material layer. The fuse material layer passes a non-zero leakage current when a lower read voltage is applied across the electrode metallization features, and irreversibly forms an open circuit when a higher programming voltage is applied across the electrode metallization features. The fuse material layer may be a compound of a metal and oxygen and be sufficiently thin to ensure a significant leakage current at the read voltage. Joule heating of the fuse material layer may induce a void between the electrode metallization features as the leakage current through the fuse material layer increases under higher voltages, creating an open circuit.

Abstract: An operation method of a multi-bits read only memory includes a step of applying a gate voltage to a conductive gate, a first voltage to a first electrode, and a second voltage to a second electrode. The multi-bits read only memory of the present invention includes a substrate and a transistor structure with the conductive gate mounted between the first electrode and the second electrode, a first oxide located between the first electrode and the conductive gate, and a second oxide located between the second electrode and the conductive gate. The present invention creates an initial state wherein the transistor structure is not conducting, an intermediate state wherein the first oxide is punched through by the first voltage, and a fully opened state wherein both the first oxide and the second oxide are punched through. The aforementioned states allow storage of multiple bits on the read only memory.

Abstract: A method for making an integrated circuit (IC) includes inserting black boxes into a layout of the IC; connecting the black boxes with a connectivity network; and inserting first dummy patterns in areas of the layout outside of the black boxes and the connectivity network. After the inserting of the first dummy patterns, the method further includes replacing the black boxes with circuit macros that have one-to-one correspondence with the black boxes, wherein each of the circuit macros includes circuit patterns in a central area of the respective circuit macro and second dummy patterns surrounding the central area. In the method, at least one of the following operations is performed by an electronic design automation (EDA) tool: the inserting of the black boxes, the connecting of the black boxes, the inserting of the first dummy patterns, and the replacing of the black boxes with the circuit macros.

Abstract: A semiconductor structure includes a substrate having a first well of a first conductivity type and a second well of a second conductivity type. From a top view, the first well includes first and seconds edges extending along a first direction. The second edge has multiple turns, resulting in the first well having a protruding section and a recessed section. The semiconductor structure further includes a first source/drain feature over the protruding section and a second source/drain feature over a main body of the first well. The first source/drain feature is of the first conductivity type. The second source/drain feature is of the second conductivity type. The first and the second source/drain features are generally aligned along a second direction perpendicular to the first direction from the top view.

Abstract: A method for forming a semiconductor device structure includes forming a fin structure with alternating stacked first semiconductor layers and second semiconductor layers over a substrate. The method also includes forming a cladding layer over the fin structure. The method also includes forming a fin isolation structure beside the cladding layer. The method also includes forming a capping layer over the fin isolation structure. The method also includes forming a dummy gate structure across the capping layer. The method also includes patterning the dummy gate structure. The method also includes patterning the capping layer by using the dummy gate structure as a mask layer. The method also includes removing the dummy gate structure.

Abstract: An integrated circuit includes a semiconductor substrate, first tap regions, second tap regions, and first gate structures. The semiconductor substrate includes a first active region. The first and second tap regions in the semiconductor substrate and on opposite sides of the first active region. The first gate structures are over the first active region. A distance between the first tap region and a first one of the first gate structures adjacent the first tap region is greater than a distance between the second tap region and a second one of the first gate structures adjacent the second tap region.

Abstract: A multimedia socket connector includes an insulating component and a terminal set. The insulating component includes an insulating main body and a tongue portion. The tongue portion includes a plurality of first grooves and second grooves. The first grooves are configured on a first plane of the tongue portion, and the second grooves are configured on a second plane corresponding to the first plane of the tongue portion. The terminal set includes a plurality of terminals. Each of the terminals includes a main portion and a contact portion. The terminal set includes a plurality of first terminals and second terminals. The contact portions of the first terminals are configured in the first grooves respectively, the contact portions of the second terminals are configured in the second grooves respectively, and the main portions of the first terminals and the second terminals are horizontally arranged on the same plane.

Abstract: The present invention provides a display method and structure of an intelligent memory, which is a temperature detection method and structure, which is used in a memory device, of which the memory device includes a substrate, a thermal sensor, a plurality of memory chips, a micro-control unit, and a notification module. The steps include generating at least one temperature data according to the temperature of the plurality of memory chips sensed by the thermal sensor, transmitting the at least one temperature data to the micro-control unit, and the micro-control unit determining whether the at least one temperature data exceeds a first threshold, When at least one temperature data exceeds the first threshold, the micro-control unit transmits a first control signal to a notification module, which can further be used for the method and structure for displaying real-time information.

Abstract: A neuromodulation probe includes a body and at least one coil set. The body has a first axis and a length along the first axis. The at least one coil set includes at least one coil, and the at least one coil is formed by winding spirally a conductive wire plural times about a second axis inside the body or on an outer surface of the body. The second axis is parallel to the first axis. The at least one coil has two opposite wire ends for providing an electric current to flow in or out of the at least one coil.

Abstract: An integrated circuit includes a semiconductor substrate, devices, first tap regions, and second tap regions. The devices are over the semiconductor substrate. The first tap regions are over the semiconductor substrate along a first direction. The second tap regions are over the semiconductor substrate along the first direction. A first pitch between adjacent two of the first tap regions in the first direction is greater than a second pitch between adjacent two of the second tap regions in the first direction.

Abstract: An electrical connector includes a casing, and a first and a second circuit boards. The casing has a bottom shell and a cover. The bottom shell has an inner bottom surface and an open top. A first carrying platform and a second carrying platform protruded from the inner bottom surface. The cover has an inner top surface facing the inner bottom surface. A first and a second holder blocks are protruded from the inner top surface. The first circuit board is carried on the first carrying platform and clamped between the first carrying platform and the first holder block. The second circuit board is carried on the second carrying platform, stacked on the first circuit board, and clamped between the second carrying platform and the second holder block. The second circuit board has an opening for the first holder block to pass.

Abstract: A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The metallization layer is disposed above the substrate, and includes a pair of metal lines and a metal plate. The metal lines extend from an outer periphery of the active region into the active region and toward the second edge of the active region. The metal plate interconnects the metal lines and at least a portion of which is disposed at the outer periphery of the active region.

Abstract: The disclosure provides an electric connector, which includes a base, a cover, and an elastic member. The cover covers the base and is formed with a chamber. The cover is disposed with a key and a trough. The elastic member is disposed in the chamber and includes a lower plate, an upper plate, and a flexible arm. The lower plate is fixed on the base. The upper plate is formed above the lower plate. The flexible arm is connected between the lower plate and the upper plate. The upper plate is extended with a hook. The hook movably enters or leaves each trough. The upper plate is disposed with a pressed portion corresponding to the key in position. The pressed portion drives each hook to move out from each trough through pressing of the key so as to implement unlatching of the electric connector.

Abstract: A small form-factor pluggable transceiver is coupled to a cable connector and a network device. The small form-factor pluggable transceiver includes a first connection port, a conversion unit, a transceiver unit, and a second connection port. The conversion unit includes a bandwidth indication pin, and the transceiver unit includes a detection pin. The transceiver unit operates in a normal state based on providing a first voltage level by the detection pin, and operates in an abnormal state based on providing the second voltage level by the detection pin. The bandwidth indication pin indicates that a signal source received by the first connection port is a copper cable-type signal source, and indicates that a rate of the signal source is an invalid rate. The detection pin provides the first voltage level based on the invalid rated by being coupled to a ground point.

Abstract: A cable connector includes a shell, a protrusive structure, and an unlocking assembly. The shell has an inserting end and a connecting end. A side plane is formed between the inserting end and the connecting end. The side plane is provided with a sliding trough. The sliding trough has a first plane and a second plane. The protrusive structure is disposed in the sliding trough. The unlocking assembly includes a stem and a flexible arm. The flexible arm includes an arm body and an unlocking portion which contact the first plane and the second plane, respectively. The unlocking portion abuts against the protrusive structure to make the unlocking portion be outward pushed away from the second plane when the stem is being pulled toward an extending direction of the connecting end.

Abstract: A semiconductor structure includes a substrate having a first well of a first conductivity type and a second well of a second conductivity type. From a top view, the first well includes first and seconds edges extending along a first direction. The second edge has multiple turns, resulting in the first well having a protruding section and a recessed section. The semiconductor structure further includes a first source/drain feature over the protruding section and a second source/drain feature over a main body of the first well. The first source/drain feature is of the first conductivity type. The second source/drain feature is of the second conductivity type. The first and the second source/drain features are generally aligned along a second direction perpendicular to the first direction from the top view.

Abstract: A power plug device includes a first housing, a circuit board, a wire assembly and a second housing. The first housing includes an upper-housing body, a through hole and an inner cover. An accommodating portion is arranged in the upper-housing body, the through hole is formed on one side of the upper-housing body, the inner cover is installed in the accommodating portion, a receptive space is arranged in the inner cover, and the through hole interconnects with the receptive space. The wire assembly includes core wires, which passes through the through hole and the receptive space, so that the core wires are accommodated in the accommodating portion, and the receptive space is suitable for accommodating glue to secure the core wires and provides waterproof effect. In addition, dual-layered waterproof structure is used to make the first and second housing joining together having stronger waterproof effect.