Patents by Inventor Gen Sasaki
Gen Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7777791Abstract: First pixel data of a pixel of interest is output from a first shift register, while second and third pixel data of neighboring pixels indicative of the same color are output from second and third shift registers, respectively. Differential data between estimated pixel data calculated from the second and third pixel data and the first pixel data is input to a comparator. A threshold value stored in a register is modulated by the estimated pixel data, and is input to the comparator as modulated threshold data. When the comparator judges that the differential data is greater than the modulated threshold data, a selector outputs the estimated pixel data as corrected pixel data.Type: GrantFiled: June 20, 2007Date of Patent: August 17, 2010Assignee: Mega Chips CorporationInventor: Gen Sasaki
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Patent number: 7750954Abstract: A camera control circuit stores an image picked up by a CCD into an internal memory. A CPU of a main processor circuit gives an instruction of reading out image data stored in the internal memory of the camera control circuit through buses and a slave access controller. The main processor circuit displays the image data which is read out on an LCD and performs other processings. With the above construction, in the electronic equipment having an image pickup function of a camera, it is possible to reduce time for image transfer from the camera control circuit to the main processor circuit.Type: GrantFiled: October 8, 2004Date of Patent: July 6, 2010Assignee: MegaChips CorporationInventor: Gen Sasaki
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Patent number: 7720309Abstract: A similar-image detecting part detects similar image regions similar to one another in a plurality of frame images captured by rolling shutter type exposure. A displacement-vector detecting part detects a displacement vector of each of the similar image regions with respect to a reference position in each of the plurality of frame images. An average calculating part calculates an average of displacement vectors in the plurality of frame images. A correcting part shifts a similar image region in one of the plurality of frame images such that the displacement vector of the similar image region becomes the average calculated by the average calculating part.Type: GrantFiled: December 20, 2006Date of Patent: May 18, 2010Assignee: MegaChips CorporationInventors: Gen Sasaki, Yusuke Nara
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Patent number: 7598985Abstract: In image input devices such as digital still cameras, processing is speeded up and power consumption is reduced by arranging in a RPU (23) performing real time processing of a pixel data from a CCD (21), such that only special exceptional image processing not being prepared previously is subjected to a software program processing in a CPU (24) and, in post processing in which a general image processing is carried out, a pixel data temporarily stored in a main memory (29) is inputted again to the RPU (23) and then processed. This enables to sharply speed up processing, and minimize a prolonged processing in the CPU (24) to reduce power consumption, when compared to the case of executing by software problem processing.Type: GrantFiled: July 21, 2006Date of Patent: October 6, 2009Assignee: Mega Chips CorporationInventor: Gen Sasaki
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Publication number: 20090245683Abstract: First pixel data of a pixel of interest is output from a first shift register, while second and third pixel data of neighboring pixels indicative of the same color are output from second and third shift registers, respectively. Differential data between estimated pixel data calculated from the second and third pixel data and the first pixel data is input to a comparator. A threshold value stored in a register is modulated by the estimated pixel data, and is input to the comparator as modulated threshold data. When the comparator judges that the differential data is greater than the modulated threshold data, a selector outputs the estimated pixel data as corrected pixel data.Type: ApplicationFiled: June 9, 2009Publication date: October 1, 2009Applicant: MEGA CHIPS CORPORATIONInventor: Gen SASAKI
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Publication number: 20090173414Abstract: A rolled copper foil, according to the present invention, obtained after a final cold rolling step but before recrystallization annealing includes a group of crystal grains which exhibits four-fold symmetry in results obtained by X-ray diffraction (XRD) pole figure measurement with respect to a rolled surface. In the XRD pole figure measurement, at least four peaks of a {220}Cu plane diffraction of a copper crystal due to the group of crystal grains exhibiting the four-fold symmetry, which is obtained during ? axis scanning with an ? angle set to 45°, appear at intervals of 90°±5° along the ? angle.Type: ApplicationFiled: December 31, 2008Publication date: July 9, 2009Inventors: Takemi Muroga, Gen Sasaki, Yoshiki Yamamoto, Satoshi Seki
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Publication number: 20090080818Abstract: A spherical bearing with resin liner comprises an inner ring, an outer ring, an opening portion, a notched portion, and a resin liner portion. The inner ring has a convex spherical outer surface and a shape in which opposing end portions of a sphere are cut off, and the outer ring has a concave inner surface which faces the outer surface of the inner ring having a predetermined clearance therebetween. The opening portion is provided at the outer ring and has an inner diameter smaller than the outer diameter of the inner ring, and the opening portion communicates with a space surrounded by the inner surface of the outer ring. The notched portion is provided at an edge of the opening portion for inserting the inner ring into the outer ring, and the resin liner portion continuously fills the clearance and the notched portion.Type: ApplicationFiled: September 24, 2008Publication date: March 26, 2009Inventors: Gen Sasaki, Mitsunori Oura
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Publication number: 20090067015Abstract: Scanning image data and target image data are respectively stored in a first storage area and a second storage area. In one case, (J?M+1)×(K?N+1)×M×N pieces of pixel data are stored as comparison image data relating to all comparison areas, and M×N pieces of pixel data are stored as target image data. In contrast, the present invention requires the storage only of J×K pieces of pixel data as scanning image data, and M×N pieces of pixel data as target image data. This means the number of pieces of pixel data to be stored is reduced. In the case discussed above, one piece of target image data and (J?M+1)×(K?N+1) pieces of pixel data relating to all comparison areas and corresponding to this target image data are stored. As compared to this case, the number of times pixel data are retrieved is reduced to 1/(M×N), thereby shortening processing speed.Type: ApplicationFiled: September 5, 2008Publication date: March 12, 2009Applicant: MegaChips CorporationInventor: Gen SASAKI
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Patent number: 7457014Abstract: An SPU (image processor) includes: a plurality of defective pixel correction circuits each for correcting a color component signal associated with a defective pixel of an image sensor in accordance with a control signal; an input control circuit for receiving defect correction data transferred from a memory at a time of input of a plurality of color component signals; and a timing generator for generating the control signal based on the defect correction data. The defective pixel correction circuits correct color component signals associated with one and the same defective pixel in parallel, at the same time in accordance with the control signal.Type: GrantFiled: March 30, 2004Date of Patent: November 25, 2008Assignee: Mega Chips CorporationInventor: Gen Sasaki
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Patent number: 7408587Abstract: An image conversion device is provided with a first buffer area for storing either one of even field and odd field of inputted dot sequential data and a second buffer area for storing the other thereof. A data transfer control circuit controls in such a manner that, during a period in which one of the two fields is written in the first buffer area, the other field, stored in the second buffer area, is read out in a color field sequential format, and during a period in which the other field is written in the second buffer area, the other field, stored in the first buffer area, is read out in a color field sequential format. A pixel interpolating circuit carries out an insertion-interpolating process on the field read out from the image storing unit, and outputs the resulting data. Thus, it becomes possible to prevent color breaking at the time of displaying motion images on a color field sequential type display by using a buffer area having a capacity of one frame.Type: GrantFiled: September 15, 2005Date of Patent: August 5, 2008Assignee: Mega Chips CorporationInventors: Takashi Matsutani, Gen Sasaki
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Publication number: 20080127283Abstract: A broadcast program is contiguously stored to a real-time storage means in a program server. The stored program is read from the real-time storage means and sent to a receiver when the receiver sends a request to the program server to send the stored program to the receiver so that the receiver may show the stored program. Retrieval of the stored program is similar to replaying a program stored on a video tape recorder.Type: ApplicationFiled: October 30, 2007Publication date: May 29, 2008Inventor: Gen Sasaki
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Patent number: 7344785Abstract: A copper foil 1 comprises a roughened plating layer 2, a Ni—Co alloy plating layer 3, a zinc galvanized (underlying) layer 4, a chromate treatment layer 5, and a silane coupling treatment layer 6 on a surface to be bonded with a base material for a printed circuit board, and the chromate treatment layer 5 is formed by using a trivalent chromium conversion treatment solution containing 70 mg/L or more and less than 500 mg/L of trivalent chromium ions converted into metal chromium and having a pH-value of 3.0 to 4.5. According to the present invention, a copper foil for a printed circuit board, a method for fabricating the same, and a trivalent chromium conversion treatment solution used for fabricating the same, which have an excellent controllability in Zn film forming amount and chromate film forming amount can be obtained.Type: GrantFiled: October 14, 2005Date of Patent: March 18, 2008Assignee: Hitachi Cable, Ltd.Inventors: Muneo Kodaira, Shingo Watanabe, Gen Sasaki, Yasuyuki Ito, Katsumi Nomura
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Publication number: 20080046605Abstract: In a memory device, data can be transmitted from a first CPU to a second CPU via an individual register or a shared SRAM, for example. The data transmitted from the first CPU to the second CPU via the individual register also passes through a FIFO. When first data is transmitted via the shared SRAM and then second data is transmitted via the individual register, for example, and if the first data transmission is adjusted by a SRAM controller and put into a waiting state at the FIFO, the second data transmitted via the individual register also passes through the FIFO, preventing the second data transmission from being completed earlier than the first data transmission. The data transmissions can therefore be completed appropriately. This in turn increases reliability of the memory device.Type: ApplicationFiled: July 19, 2007Publication date: February 21, 2008Applicant: MegaChips CorporationInventors: Gen SASAKI, Masahiro MORIYAMA
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Publication number: 20080043133Abstract: The first frame of captured image data is stored as raw data in a main memory, and parameters for exposure control and white balance control are calculated from the stored image data and are set in the RPU. The second and subsequent frames of captured image data are processed in real time in the RPU without being stored in the main memory after being output from a CCD. The second and subsequent frames of captured image data are subjected to exposure control, white balance control, and JPEG compression, and then, are stored in the main memory. After operations for continuously capturing images are finished, the raw data corresponding to the first frame stored in the main memory is read by the RPU, where exposure control and white balance control are performed, and then, is stored as JPEG data in the main memory.Type: ApplicationFiled: July 31, 2007Publication date: February 21, 2008Applicant: MegaChips CorporationInventors: Gen SASAKI, Kenji Nakamura
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Publication number: 20080030602Abstract: OSD data YD includes a color designating signal As and a color changing signal Ex. When a color register number is designated by the color designating signal As, a color storage unit 41 outputs an appropriate color signal. A Y signal is branched from the outputted color signal and subjected to a modulating process by the color changing signal Ex. The Y changing signal obtained by the modulating process is merged with a Cb signal and a Cr signal so as to form new color signal. The OSD data YD with changed color is subjected to a synthesizing process with image data XD according to the predetermined mixture ratio.Type: ApplicationFiled: October 5, 2007Publication date: February 7, 2008Applicant: MEGA CHIPS CORPORATIONInventor: Gen SASAKI
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Publication number: 20080030600Abstract: First pixel data of a pixel of interest is output from a first shift register, while second and third pixel data of neighboring pixels indicative of the same color are output from second and third shift registers, respectively. Differential data between estimated pixel data calculated from the second and third pixel data and the first pixel data is input to a comparator. A threshold value stored in a register is modulated by the estimated pixel data, and is input to the comparator as modulated threshold data. When the comparator judges that the differential data is greater than the modulated threshold data, a selector outputs the estimated pixel data as corrected pixel data.Type: ApplicationFiled: June 20, 2007Publication date: February 7, 2008Applicant: MEGA CHIPS CORPORATIONInventor: Gen Sasaki
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Publication number: 20070247532Abstract: An image processing apparatus is provided which offers higher versatility than conventional image processing apparatuses. When an input signal to a spatial filtering block is a monochrome signal that contains Y component only, a selector selects its input terminal and a selector selects its input terminal. Then, a low-pass filter output signal of a programmable spatial filter is inputted to a spatial filter, and a low-pass filter output signal of the spatial filer is inputted to a spatial filter. That is, the programmable spatial filter and the spatial filters are connected in series (in cascade), and the cascade-connected three spatial filters perform filtering operation. In this example, low-pass filters with 5×5 taps are connected in cascade in three stages, which enables low-pass filtering with 13×13 taps.Type: ApplicationFiled: April 11, 2007Publication date: October 25, 2007Applicant: MegaChips CorporationInventor: Gen SASAKI
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Publication number: 20070242144Abstract: First pixel data of a pixel of interest is output from a first shift register, while second and third pixel data of neighboring pixels indicative of the same color are output from second and third shift registers, respectively. Differential data between estimated pixel data calculated from the second and third pixel data and the first pixel data is input to a comparator. A threshold value stored in a register is modulated by the estimated pixel data, and is input to the comparator as modulated threshold data. When the comparator judges that the differential data is greater than the modulated threshold data, a selector outputs the estimated pixel data as corrected pixel data.Type: ApplicationFiled: June 20, 2007Publication date: October 18, 2007Applicant: MEGA CHIPS CORPORATIONInventor: Gen SASAKI
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Publication number: 20070187776Abstract: A semiconductor device according to one embodiment of the present invention includes: a semiconductor substrate; a MOSFET formed on the semiconductor substrate and which has a silicided gate electrode; and a resistance element having a resistance region formed on the semiconductor substrate, and a wiring extraction region containing therein a silicide, the wiring extraction region being formed on a wiring extraction surface of the resistance region.Type: ApplicationFiled: February 6, 2007Publication date: August 16, 2007Inventor: Gen Sasaki
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Patent number: 7256826Abstract: In image input devices such as digital still cameras, processing is speeded up and power consumption is reduced by arranging in a RPU (23) performing real time processing of a pixel data from a CCD (21), such that only special exceptional image processing not being prepared previously is subjected to a software program processing in a CPU (24) and, in post processing in which a general image processing is carried out, a pixel data temporarily stored in a main memory (29) is inputted again to the RPU (23) and then processed. This enables to sharply speed up processing, and minimize a prolonged processing in the CPU (24) to reduce power consumption, when compared to the case of executing by software problem processing.Type: GrantFiled: October 29, 2003Date of Patent: August 14, 2007Assignee: Mega Chips CorporationInventor: Gen Sasaki