Abstract: A vertical bipolar transistor comprises P-type semiconductor substrate, N-type first well provided in the semiconductor substrate and operating as a collector, P-type second well provided on the first well and operating as a base, N-type third well provided on the first well and acting as a lead-out region of the collector, N-type emitter provided in the second well, an isolation structure provided on the second well to define the emitter, P-type base lead-out region provided in the second well to surround the isolation structure, a first insulating isolation layer provided in the second and third wells to define, along with the isolation structure, the base lead-out region, N-type collector lead-out region provided in the third well and adjoining the first insulating isolation layer, and a second insulating isolation layer provided in the third well to define the collector lead-out region.

Abstract: The material of the wall inside a hole in a housing is squeezed toward the center of the using a staking tool with a diameter larger than that of the hole. The material necessary for forming a locking section can be obtained from only a small part of the entire area of the wall of the hole. The amount of material necessary for the entire process is secured and the material is pressed so as to contact with an end face of the outer race using the staking tool, forming the locking section. Accordingly, the locking section provides sufficient strength. Also, since only the small part of the entire area of the wall is necessary as described above, there is no decrease in strength or deformation as to the thin housing.

Abstract: A noise elimination method of the present invention includes the steps of: detecting a zigzag signal in which a differential value between signal levels of two pixels which are adjacent to each other along a horizontal pixel direction or a vertical pixel direction alternately takes a positive value and a negative value (ST2); determining whether or not the zigzag signal forms a stripe pattern (ST3); regarding the zigzag signal as a normal image signal when the zigzag signal is determined as forming a stripe pattern (ST4); regarding the zigzag signal as a noise signal and extracting the same when the zigzag signal is determined as not forming a stripe pattern (ST5); and filtering this noise signal (ST6).

Abstract: RGB image data outputted from an ADC (3) is processed in an SPU (42) and an RPU (43) and then buffered into a memory (48) as YUV image data. The YUV image data is outputted from a YUV output unit (45), encoded by an image compression and expansion chip (5A) and transmitted to a main chip (4) by a DMAC (52). On the other hand, compressed moving image data stored in the memory (48) is transmitted to the image compression and expansion chip (5A) through the control by a DMAC (44), decoded therein, then converted into RGB image data in an RGB sampling unit (54) and inputted to the main chip (4) by the SPU (42) through a data line (14). With such a construction, it is possible to provide a circuit for compression and expansion, which allows connection with a main processing chip having no YUV input circuit without increasing circuit scale, maintaining general versatility of those circuits.

Abstract: A camera control circuit stores an image picked up by a CCD into an internal memory. A CPU of a main processor circuit gives an instruction of reading out image data stored in the internal memory of the camera control circuit through buses and a slave access controller. The main processor circuit displays the image data which is read out on an LCD and performs other processings. With the above construction, in the electronic equipment having an image pickup function of a camera, it is possible to reduce time for image transfer from the camera control circuit to the main processor circuit.

Abstract: Any complicates pulse waveform required depending on the type of CCD, can be generated with a simple circuit configuration. Specifically, any complicated pulse is obtainable by inputting an unlimited number of toggle timings, with no limitation imposed on the number of toggle timings inputted. This is achieved only by inputting different toggle timings sequentially from the exterior, because the toggle timing of toggle circuits (14 to 16) is regulated by shift registers (12a, 12b) of a loop structure and comparators (11a, 11b) connected to the rearmost stage of their respective shift registers (12a, 12b).

Abstract: The present invention provides a spherical bearing with good endurance and high resistance to scratching on the convex spherical body of the inner retaining piece even when in long-term sliding contact with a polytetrafluoroethylene-based liner. A spherical bearing comprising an outer retaining piece forming a sliding surface in the form of a concave spherical surface having a polytetrafluoroethylene-based liner on the race inner peripheral surface is disclosed. An inner retaining piece of the spherical bearing is held by the outer retaining piece and has an outer peripheral surface in the form of a convex spherical surface that is in sliding contact with the sliding surface of the outer retaining piece. The convex spherical surface of the inner retaining piece has a uniform thin-film layer of a TiAlN compound.

Abstract: Two local buffers are provided between an image processing unit and an image compression and expansion unit for compression into a predetermined format. Write and read control units serve to alternately use the two local buffers. As a result, process flow starting from the image processing unit to generate compressed image data by the image compression and expansion unit requires no main memory, whereby high-speed image processing is allowed with low power consumption.

Abstract: First pixel data of a pixel of interest is output from a first shift register, while second and third pixel data of neighboring pixels indicative of the same color are output from second and third shift registers, respectively. Differential data between estimated pixel data calculated from the second and third pixel data and the first pixel data is input to a comparator. A threshold value stored in a register is modulated by the estimated pixel data, and is input to the comparator as modulated threshold data. When the comparator judges that the differential data is greater than the modulated threshold data, a selector outputs the estimated pixel data as corrected pixel data.

Abstract: An image shooting camera is provided with a silver salt picture shooting section, a video signal recording section, an information provider, an information recording section and an index data recording section. The provider outputs an individual identification number and a frame number of a silver salt photosensitive medium used as a recording medium of the silver salt picture shooting section. The numbers outputted from the provider are recorded by the information recording section. The index data recording section records index data including the numbers through the video signal recording section.

Abstract: The material of the wall inside a hole in a housing is squeezed toward the center of the using a staking tool with a diameter larger than that of the hole. The material necessary for forming a locking section can be obtained from only a small part of the entire area of the wall of the hole. The amount of material necessary for the entire process is secured and the material is pressed so as to contact with an end face of the outer race using the staking tool, forming the locking section. Accordingly, the locking section provides sufficient strength. Also, since only the small part of the entire area of the wall is necessary as described above, there is no decrease in strength or deformation as to the thin housing.

Abstract: An SPU (image processor) 12 includes: a plurality of defective pixel correction circuits each for correcting a color component signal associated with a defective pixel of an image sensor in accordance with a control signal; an input control circuit for receiving defect correction data transferred from a memory at a time of input of a plurality of color component signals; and a timing generator for generating the control signal based on the defect correction data. The defective pixel correction circuits correct color component signals associated with one and the same defective pixel in parallel, at the same time in accordance with the control signal.

Abstract: The first driving shaft 2 is provided with the electric supply equipment 8 such as the metal brush. The second driving shaft 3 is as well too. Further, a nozzle 10 for supplying the conductive coolant is supplied to the grinding portion between the grinding surface 1a and the surface Wa to be ground is provided. When grinding is carried out, the conductive coolant is supplied from the nozzle 10 and by turning on the electricity to the first driving shaft 2 and the second driving shaft 3, a voltage is applied between the grinding surface 1a and the surface Wa to be ground of the work W. Due to electrolysis of that instance, the conductive material of the surface of the grindstone is dissolved in the conductive coolant, simultaneously the clogging of the grinding surface 1a is solved. Accordingly, a super ball finishing using a grindstone of the quite high grain size becomes possible.

Abstract: In image input devices such as digital still cameras, processing is speeded up and power consumption is reduced by arranging in a RPU (23) performing real time processing of a pixel data from a CCD (21), such that only special exceptional image processing not being prepared previously is subjected to a software program processing in a CPU (24) and, in post processing in which a general image processing is carried out, a pixel data temporarily stored in a main memory (29) is inputted again to the RPU (23) and then processed. This enables to sharply speed up processing, and minimize a prolonged processing in the CPU (24) to reduce power consumption, when compared to the case of executing by software problem processing.

Abstract: In image input devices such as digital still cameras, processing is speeded up and power consumption is reduced by arranging in a RPU (23) performing real time processing of a pixel data from a CCD (21), such that only special exceptional image processing not being prepared previously is subjected to a software program processing in a CPU (24) and, in post processing in which a general image processing is carried out, a pixel data temporarily stored in a main memory (29) is inputted again to the RPU (23) and then processed. This enables to sharply speed up processing, and minimize a prolonged processing in the CPU (24) to reduce power consumption, when compared to the case of executing by software problem processing.

Abstract: In image input devices such as digital still cameras, processing is speeded up and power consumption is reduced by arranging in a RPU (23) performing real time processing of a pixel data from a CCD (21), such that only special exceptional image processing not being prepared previously is subjected to a software program processing in a CPU (24) and, in post processing in which a general image processing is carried out, a pixel data temporarily stored in a main memory (29) is inputted again to the RPU (23) and then processed. This enables to sharply speed up processing, and minimize a prolonged processing in the CPU (24) to reduce power consumption, when compared to the case of executing by software problem processing.

Abstract: A memory control circuit includes a controller (1A) for controlling a RAM (13) conforming to the standard where source voltage is 2.5 V (SSTL2 standard), and a nonvolatile memory (14) conforming to the standard where source voltage is 3.3 V (LVTTL standard) via a control bus (10) and data buses (11, 12). The control bus (10) for transmitting an address signal and a control signal is shared by these memories (13, 14). The controller (1A) converts internal signals to signals conforming to the standard where source voltage is 2.5 V and outputs the converted signals to the control bus (10). The data buses (11, 12) are provided for the respective memories (13, 14) independently. The number of signal lines can be reduced, and it is possible to prevent signals at high voltage level outputted from the nonvolatile memory (14) from being applied to the RAM (13) driven at low voltages, to cause an occurrence of malfunction at the RAM (13).

Abstract: An image pickup apparatus has an image sensor having first-type, second-type, and third-type pixels each producing a signal corresponding to a first, a second, and a third color respectively. The pixels are arranged in a two-dimensional array consisting of first-type and second-type lines arranged alternately, with the first-type lines each composed of first-type and second-type pixels arranged alternately and the second-type lines each composed of first-type and third-type pixels arranged alternately. The image pickup apparatus also has a first subtracter for calculating the difference between the outputs of the first-type pixels and the outputs of the second-type pixels on the first-type lines, and a second subtracter for calculating the difference between the outputs of the first-type pixels and the output of the third-type pixels on the second-type lines.

Abstract: An object of the present invention is to reduce bit depth and word number of a LUT memory 12 as small as possible, while obtaining &ggr; conversion output data with accuracy superior to the bit depth. Outputting table output data Dout0 and Dout1 which are associated with first table input data RA0 addressed and inputted to the LUT memory 12 and second table input data RA1 obtained by adding “1” thereto, and interpolating them outside the LUT memory 12, thereby obtaining output data having a larger bit depth than the LUT memory 12. At this time, the speed of signal processing is improved by employing a dual port memory as the LUT memory 12 or using a register group for the single port memory. Also, when the second table input data RA1 overflows, a specific value is employed as an alternative.

Abstract: Balls are supported between the spherical inner race 5 and the outer race 6 which surrounds one potion of the inner race 6 through the resiliently transformable shell-like retainer 7. By making the inner race 5 and outer race 7, which influence the bearing precision greatly, to be formed in a unit respectively, the bearing precision is increased. For reference, although the retainer is divided, the retainer 7 bears merely the ball holding function and its transformation and the position relation in assembling state do not influence the bearing precision.