Abstract: A switching device includes a plurality of ports and a switching core, which is coupled to transfer data packets between ingress and egress ports. Switching logic maintains a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, and responsively to the respective descriptors, instructs the switching core to transfer the queued data packets between the ports. Port logic, which is associated with each port, is configured, upon receipt of a data packet from the network at the port, to signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue and, upon identifying the data packet as meeting a predefined criterion, to convey a request to the switching logic, bypassing the descriptor queue, to instruct the switching core to transfer the data packet immediately to an egress port.

Abstract: Communication apparatus includes a plurality of interfaces for receiving and transmitting data packets from and to a network and a memory, which receives and stores context data with respect to multicast groups. Packet processing circuitry establishes reliable connections over the network with the receiving nodes in the multicast groups, and upon receiving from a packet source on the network an incoming unicast packet containing multicast data and containing multicast metadata that identifies a multicast group, sends an acknowledgment of the incoming unicast packet to the packet source, reads the context data from the memory with respect to the identified multicast group, and transmits multiple outgoing unicast packets containing the multicast data via respective egress interfaces to the receiving nodes in the multicast group over the reliable connections.

Abstract: Communication apparatus includes multiple ports configured to serve as ingress ports and egress ports for connection to a packet data network. A memory is coupled to the ports and configured to contain both respective input buffers allocated to the ingress ports and a shared buffer holding data packets for transmission in multiple queues via the egress ports. Control logic is configured to monitor an overall occupancy level of the memory, and when a data packet is received through an ingress port having an input buffer that is fully occupied while the overall occupancy level of the memory is below a specified maximum, to allocate additional space in the memory to the input buffer and to accept the received data packet into the additional space.

Abstract: Communication apparatus includes multiple interfaces configured to be connected to a packet data network for receiving and forwarding of data packets of multiple types. A memory is coupled to the interfaces and configured as a buffer to contain packets received through the ingress interfaces while awaiting transmission to the network via the egress interfaces. Packet processing logic is configured to maintain multiple transmit queues, which are associated with respective ones of the egress interfaces, and to place both first and second queue entries, corresponding to first and second data packets of the first and second types, respectively, in a common transmit queue for transmission through a given egress interface, while allocating respective spaces in the buffer to store the first and second data packets against separate, first and second buffer allocations, which are respectively assigned to the first and second types of the data packets.

Abstract: A network element includes multiple interfaces and circuitry. The interfaces are configured to connect to a communication system. The circuitry is configured to receive via an ingress interface a packet that includes an Error Detection Code (EDC) field including an input EDC value, to determine an input timestamp indicative of a time-of-arrival of the received packet at the network element, and overwrite at least part of the input EDC value in the EDC field of the packet with the input timestamp, to estimate for the packet a traversal latency between reception at the ingress interface and transmission via a selected egress interface, based at least on the input timestamp, and to produce a deliverable version of the packet by writing an output EDC value to the EDC field, and send the deliverable version of the packet via the selected egress interface.

Abstract: A network switch includes circuitry and multiple ports, including multiple input ports and at least one output port, configured to connect to a communication network. The circuitry includes multiple distinct-flow counters, which are each associated with a respective input port and with the output port, and which are configured to estimate respective distinct-flow counts of distinct data flows received via the respective input ports and destined to the output port. The circuitry is configured to store packets that are destined to the output port and were received via the multiple input ports in multiple queues, to determine a transmission schedule for the packets stored in the queues, based on the estimated distinct-flow counts, and to transmit the packets via the output port in accordance with the determined transmission schedule.

Abstract: Communication apparatus includes a memory, which is configured to hold data packets, having respective packet sizes, for transmission over a data link, and a transmitter, which is configured to transmit the data packets over the data link at a bit rate determined by a wire speed of the data link. A shaper is coupled to throttle transmission of the data packets by the transmitter responsively to the respective packet sizes, whereby some of the data packets are transmitted over the data link at a transmission rate that is less than the bit rate.

Abstract: Communication apparatus includes multiple interfaces connected to a packet data network, and a memory coupled to the interfaces and configured as a buffer to contain packets received through ingress interfaces while awaiting transmission to the network via respective egress interfaces. Packet processing logic is configured, upon receipt of a test packet through an ingress interface of the apparatus, to allocate a space in the buffer for storage of a single copy of the test packet, to replicate and transmit sequentially multiple copies of the stored copy of the test packet through a designated egress interface, to receive an indication of a number of copies of the test packet that are to be transmitted, and responsively to the indication, to terminate replication of the test packet and release the allocated space in the buffer.

Abstract: Communication apparatus includes a plurality of interfaces for receiving and transmitting data packets from and to a network and a memory, which receives and stores context data with respect to multicast groups. Packet processing circuitry establishes reliable connections over the network with the receiving nodes in the multicast groups, and upon receiving from a packet source on the network an incoming unicast packet containing multicast data and containing multicast metadata that identifies a multicast group, sends an acknowledgment of the incoming unicast packet to the packet source, reads the context data from the memory with respect to the identified multicast group, and transmits multiple outgoing unicast packets containing the multicast data via respective egress interfaces to the receiving nodes in the multicast group over the reliable connections.

Abstract: A network switch includes circuitry and multiple ports, including multiple input ports and at least one output port, configured to connect to a communication network. The circuitry includes multiple distinct-flow counters, which are each associated with a respective input port and with the output port, and which are configured to estimate respective distinct-flow counts of distinct data flows received via the respective input ports and destined to the output port. The circuitry is configured to store packets that are destined to the output port and were received via the multiple input ports in multiple queues, to determine a transmission schedule for the packets stored in the queues, based on the estimated distinct-flow counts, and to transmit the packets via the output port in accordance with the determined transmission schedule.

Abstract: Communication apparatus includes multiple ports configured to serve as ingress ports and egress ports for connection to a packet data network. A single memory array is coupled to the ports and configured to contain both a respective headroom allocation for each ingress port and a shared buffer holding data packets for transmission in multiple queues via the egress ports. Control logic is configured to adjustably allocate to each ingress port a respective volume of memory within the single memory array to serve as the respective headroom allocation, and to queue the data packets in the multiple queues in the single memory array for transmission through the egress ports.

Abstract: A method for communication includes receiving and forwarding packets in multiple flows to respective egress interfaces of a switching element for transmission to a network. For each of one or more of the egress interfaces, in each of a succession of arbitration cycles, a respective number of the packets in each of the plurality of the flows that are queued for transmission through the egress interface is assessed, and the flows for which the respective number is less than a selected threshold to a first group, while assigning the flows for which the respective number is equal to or greater than the selected threshold are assigned to a second group. The received packets that have been forwarded to the egress interface and belong to the flows in the first group are transmitted with a higher priority than the flows in the second group.

Abstract: Communication apparatus includes multiple interfaces connected to a packet data network. A memory is coupled to the interfaces and configured as a buffer to contain packets received through ingress interfaces while awaiting transmission to the network via respective egress interfaces. Packet processing logic is configured, upon receipt of a multicast packet through an ingress interface, to identify a number of the egress interfaces through which respective copies of the multicast packet are to be transmitted, to allocate a space in the buffer for storage of a single copy of the multicast packet, to replicate and transmit multiple copies of the stored copy of the multicast packet through the egress interfaces, to maintain a count of the replicated copies that have been transmitted, and when the count reaches the identified number, to release the allocated space in the buffer.

Abstract: A method for packet generation includes designating a group of one or more ports, from among multiple ports of one or more network elements, to perform the packet generation. A circular packet path, which traverses one or more buffers of the ports in the group, is configured. A burst of one or more packets is provided to the group, so as to cause the burst of packets to repeatedly traverse the circular packet path. A packet stream, including the repeated burst of packets, is transmitted from one of the ports.

Abstract: A network element includes multiple interfaces and circuitry. The interfaces are configured to connect to a communication system. The circuitry is configured to receive via an ingress interface a packet that includes an Error Detection Code (EDC) field including an input EDC value, to determine an input timestamp indicative of a time-of-arrival of the received packet at the network element, and overwrite at least part of the input EDC value in the EDC field of the packet with the input timestamp, to estimate for the packet a traversal latency between reception at the ingress interface and transmission via a selected egress interface, based at least on the input timestamp, and to produce a deliverable version of the packet by writing an output EDC value to the EDC field, and send the deliverable version of the packet via the selected egress interface.

Abstract: A method for communication includes receiving and forwarding packets in multiple flows to respective egress interfaces of a switching element for transmission to a network. For each of one or more of the egress interfaces, in each of a succession of arbitration cycles, a respective number of the packets in each of the plurality of the flows that are queued for transmission through the egress interface is assessed, and the flows for which the respective number is zero are assigned to a first group, while the flows for which the respective number is non-zero are assigned to a second group. The received packets that have been forwarded to the egress interface and belong to the flows in the first group are transmitted with a higher priority than the flows in the second group.

Abstract: Communication apparatus includes multiple interfaces connected to a packet data network and at least one memory configured as a buffer to contain packets received through the ingress interfaces while awaiting transmission to the network via respective egress interfaces. Processing circuitry is configured to identify data flows to which the data packets that are received through the ingress interfaces belong, to assess respective bandwidth characteristics of the data flows, and to select one or more of the data flows as candidate flows for mirroring responsively to the respective bandwidth characteristics. The processing circuitry selects, responsively to one or more predefined mirroring criteria, one or more of the data packets in the candidate flows for analysis by a network manager, and sends the selected data packets to the network manager over the network via one of the egress interfaces.

Abstract: A method for communication includes receiving and forwarding packets in multiple flows to respective egress interfaces of a switching element for transmission to a network. For each of one or more of the egress interfaces, in each of a succession of arbitration cycles, a respective number of the packets in each of the plurality of the flows that are queued for transmission through the egress interface is assessed, and the flows for which the respective number is zero are assigned to a first group, while the flows for which the respective number is non-zero are assigned to a second group. The received packets that have been forwarded to the egress interface and belong to the flows in the first group are transmitted with a higher priority than the flows in the second group.

Abstract: Communication apparatus includes multiple interfaces connected to a packet data network, and a memory coupled to the interfaces and configured as a buffer to contain packets received through ingress interfaces while awaiting transmission to the network via respective egress interfaces. Packet processing logic is configured, upon receipt of a test packet through an ingress interface of the apparatus, to allocate a space in the buffer for storage of a single copy of the test packet, to replicate and transmit sequentially multiple copies of the stored copy of the test packet through a designated egress interface, to receive an indication of a number of copies of the test packet that are to be transmitted, and responsively to the indication, to terminate replication of the test packet and release the allocated space in the buffer.

Abstract: Communication apparatus includes multiple ports configured to serve as ingress ports and egress ports for connection to a packet data network. A memory is coupled to the ports and configured to contain both respective input buffers allocated to the ingress ports and a shared buffer holding data packets for transmission in multiple queues via the egress ports. Control logic is configured to monitor an overall occupancy level of the memory, and when a data packet is received through an ingress port having an input buffer that is fully occupied while the overall occupancy level of the memory is below a specified maximum, to allocate additional space in the memory to the input buffer and to accept the received data packet into the additional space.