Patents by Inventor George Elias

George Elias has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170279741
    Abstract: Communication apparatus includes a memory, which is configured to hold data packets, having respective packet sizes, for transmission over a data link, and a transmitter, which is configured to transmit the data packets over the data link at a bit rate determined by a wire speed of the data link. A shaper is coupled to throttle transmission of the data packets by the transmitter responsively to the respective packet sizes, whereby some of the data packets are transmitted over the data link at a transmission rate that is less than the bit rate.
    Type: Application
    Filed: March 28, 2016
    Publication date: September 28, 2017
    Inventors: George Elias, Barak Gafni, Ran Ravid, Ido Bukspan, Zachy Haramaty
  • Publication number: 20170264571
    Abstract: Communication apparatus includes multiple interfaces configured to be connected to a packet data network for receiving and forwarding of data packets of multiple types. A memory is coupled to the interfaces and configured as a buffer to contain packets received through the ingress interfaces while awaiting transmission to the network via the egress interfaces. Packet processing logic is configured to maintain multiple transmit queues, which are associated with respective ones of the egress interfaces, and to place both first and second queue entries, corresponding to first and second data packets of the first and second types, respectively, in a common transmit queue for transmission through a given egress interface, while allocating respective spaces in the buffer to store the first and second data packets against separate, first and second buffer allocations, which are respectively assigned to the first and second types of the data packets.
    Type: Application
    Filed: March 8, 2016
    Publication date: September 14, 2017
    Inventors: Niv Aibester, Amir Roitshtein, Barak Gafni, George Elias, Itamar Rabenstein
  • Patent number: 9762491
    Abstract: Communication apparatus includes multiple interfaces configured for connection to a packet data network. A memory, coupled to the interfaces, is configured as a shared buffer to contain packets in multiple sets of queues for transmission to the network. Each set of queues receives in the shared buffer a respective allocation having an allocation size that varies over time in response to an amount of space in the shared buffer that is unused at any given time. A controller is configured to apply congestion control to a respective fraction of the packets that are queued for transmission from each set of queues in the shared buffer to the network, such that the respective fraction is set for each set of queues at any given time in response to a relation between a length of the queues in the set and the allocation size of the respective allocation at the given time.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: September 12, 2017
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Barak Gafni, Benny Koren, George Elias
  • Publication number: 20170201469
    Abstract: Communication apparatus includes multiple ports configured to serve as ingress ports and egress ports for connection to a packet data network. A single memory array is coupled to the ports and configured to contain both a respective headroom allocation for each ingress port and a shared buffer holding data packets for transmission in multiple queues via the egress ports. Control logic is configured to adjustably allocate to each ingress port a respective volume of memory within the single memory array to serve as the respective headroom allocation, and to queue the data packets in the multiple queues in the single memory array for transmission through the egress ports.
    Type: Application
    Filed: January 13, 2016
    Publication date: July 13, 2017
    Inventors: George Elias, Barak Gafni, Shachar Bar Tikva, Roy Kriss, Eran Rubinstein
  • Publication number: 20170201468
    Abstract: A switching device includes a plurality of ports and a switching core, which is coupled to transfer data packets between ingress and egress ports. Switching logic maintains a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, and responsively to the respective descriptors, instructs the switching core to transfer the queued data packets between the ports. Port logic, which is associated with each port, is configured, upon receipt of a data packet from the network at the port, to signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue and, upon identifying the data packet as meeting a predefined criterion, to convey a request to the switching logic, bypassing the descriptor queue, to instruct the switching core to transfer the data packet immediately to an egress port.
    Type: Application
    Filed: March 28, 2017
    Publication date: July 13, 2017
    Inventors: Freddy Gabbay, Ido Bukshpan, Alon Webman, Miriam Menes, George Elias, Noam Katz Abramovich
  • Patent number: 9699095
    Abstract: Communication apparatus includes multiple ports for connection to a packet data network. A memory contains, for each port, a respective first, fixed headroom allocation to hold packets received from the network through the port and to contain a shared headroom buffer, which is available to be shared among a plurality of the ports. Flow-control logic allocates to each of the ports, within the shared headroom buffer, a respective second, variable headroom allocation, which varies responsively to fill levels of the respective first headroom allocation and of the shared headroom buffer, thereby defining, for each of the ports, a respective total headroom allocation comprising the respective first and second headroom allocations. The logic is configured to apply flow-control operations in response to the packets received from the network through each port responsively to a total fill level of the respective total headroom allocation of the port.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: July 4, 2017
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: George Elias, Ido Bukspan, Noam Katz Abramovich, Barak Gafni
  • Publication number: 20170163567
    Abstract: Communication apparatus includes multiple interfaces connected to a packet data network. A memory is coupled to the interfaces and configured as a buffer to contain packets received through ingress interfaces while awaiting transmission to the network via respective egress interfaces. Packet processing logic is configured, upon receipt of a multicast packet through an ingress interface, to identify a number of the egress interfaces through which respective copies of the multicast packet are to be transmitted, to allocate a space in the buffer for storage of a single copy of the multicast packet, to replicate and transmit multiple copies of the stored copy of the multicast packet through the egress interfaces, to maintain a count of the replicated copies that have been transmitted, and when the count reaches the identified number, to release the allocated space in the buffer.
    Type: Application
    Filed: December 8, 2015
    Publication date: June 8, 2017
    Inventors: Amir Roitshtein, Niv Aibester, Barak Gafni, George Elias
  • Patent number: 9641465
    Abstract: A switching device includes a plurality of ports and a switching core, which is coupled to transfer data packets between ingress and egress ports. Switching logic maintains a descriptor queue containing respective descriptors corresponding to the data packets that have been received and queued by the ports, and responsively to the respective descriptors, instructs the switching core to transfer the queued data packets between the ports. Port logic, which is associated with each port, is configured, upon receipt of a data packet from the network at the port, to signal the switching logic to place a descriptor corresponding to the data packet in the descriptor queue and, upon identifying the data packet as meeting a predefined criterion, to convey a request to the switching logic, bypassing the descriptor queue, to instruct the switching core to transfer the data packet immediately to an egress port.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: May 2, 2017
    Assignee: Mellanox Technologies, Ltd
    Inventors: Freddy Gabbay, Ido Bukshpan, Alon Webman, Miriam Menes, George Elias, Noam Katz Abramovich
  • Patent number: 9584429
    Abstract: A method for communication includes storing packets received from a sending node over a communication link in a receive buffer of a receiving node. The receive buffer includes one or more blocks having a first block size. A first credit count, corresponding to a number of available blocks in the receive buffer, is derived. The first credit count is converted to a second credit count so as to represent an available space in the receive buffer in accordance with a second block size, which is different from the first block size. A transmission rate of the sending node is controlled by publishing the second credit count to the sending node over the communication link.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: February 28, 2017
    Assignee: MELLANOX TECHNOLOGIES LTD.
    Inventors: Zachy Haramaty, Roy Kriss, Noam Katz Abramovich, George Elias, Ran Ravid
  • Publication number: 20160344636
    Abstract: Communication apparatus includes multiple ports for connection to a packet data network. A memory contains, for each port, a respective first, fixed headroom allocation to hold packets received from the network through the port and to contain a shared headroom buffer, which is available to be shared among a plurality of the ports. Flow-control logic allocates to each of the ports, within the shared headroom buffer, a respective second, variable headroom allocation, which varies responsively to fill levels of the respective first headroom allocation and of the shared headroom buffer, thereby defining, for each of the ports, a respective total headroom allocation comprising the respective first and second headroom allocations. The logic is configured to apply flow-control operations in response to the packets received from the network through each port responsively to a total fill level of the respective total headroom allocation of the port.
    Type: Application
    Filed: May 21, 2015
    Publication date: November 24, 2016
    Inventors: George Elias, Ido Bukspan, Noam Katz Abramovich, Barak Gafni
  • Publication number: 20160294696
    Abstract: Communication apparatus includes multiple interfaces configured for connection to a packet data network. A memory, coupled to the interfaces, is configured as a shared buffer to contain packets in multiple sets of queues for transmission to the network. Each set of queues receives in the shared buffer a respective allocation having an allocation size that varies over time in response to an amount of space in the shared buffer that is unused at any given time. A controller is configured to apply congestion control to a respective fraction of the packets that are queued for transmission from each set of queues in the shared buffer to the network, such that the respective fraction is set for each set of queues at any given time in response to a relation between a length of the queues in the set and the allocation size of the respective allocation at the given time.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 6, 2016
    Inventors: Barak Gafni, Benny Koren, George Elias
  • Patent number: 9325641
    Abstract: A switching apparatus includes multiple ports, each including a respective buffer, and a switch controller. The switch controller is configured to concatenate the buffers of at least an input port and an output port selected from among the multiple ports for buffering traffic of a long-haul link, which is connected to the input port and whose delay exceeds buffering capacity of the buffer of the input port alone, and to carry out end-to-end flow control for the long haul link between the output port and the input port.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: April 26, 2016
    Assignee: MELLANOX TECHNOLOGIES LTD.
    Inventors: Zachy Haramaty, Noam Katz Abramovich, George Elias, Ido Bukspan, Benny Koren, Gil Bloch
  • Publication number: 20160021016
    Abstract: A method for communication includes storing packets received from a sending node over a communication link in a receive buffer of a receiving node. The receive buffer includes one or more blocks having a first block size. A first credit count, corresponding to a number of available blocks in the receive buffer, is derived. The first credit count is converted to a second credit count so as to represent an available space in the receive buffer in accordance with a second block size, which is different from the first block size. A transmission rate of the sending node is controlled by publishing the second credit count to the sending node over the communication link.
    Type: Application
    Filed: July 21, 2014
    Publication date: January 21, 2016
    Inventors: Zachy Haramaty, Roy Kriss, Noam Katz Abramovich, George Elias, Ran Ravid
  • Publication number: 20150263994
    Abstract: A switching apparatus includes multiple ports, each including a respective buffer, and a switch controller. The switch controller is configured to concatenate the buffers of at least an input port and an output port selected from among the multiple ports for buffering traffic of a long-haul link, which is connected to the input port and whose delay exceeds buffering capacity of the buffer of the input port alone, and to carry out end-to-end flow control for the long haul link between the output port and the input port.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 17, 2015
    Applicant: Mellanox Technologies Ltd.
    Inventors: Zachy Haramaty, Noam Katz Abramovich, George Elias, Ido Bukspan, Benny Koren, Gil Bloch
  • Publication number: 20150103667
    Abstract: A method in a communication network includes defining a root congestion condition for a network switch if the switch creates congestion in the network while switches downstream are congestion free, and a victim congestion condition if the switch creates the congestion as a result of one or more other congested switches downstream. A buffer fill level in a first switch, created by network traffic, is monitored. A binary notification is received from a second switch, which is connected to the first switch. A decision whether the first switch or the second switch is in a root or a victim congestion condition is made, based on both the buffer fill level and the binary notification. A network congestion control procedure is applied based on the decided congestion condition.
    Type: Application
    Filed: October 13, 2013
    Publication date: April 16, 2015
    Applicant: Mellanox Technologies Ltd.
    Inventors: George Elias, Eyal Srebro, Ido Bukspan, Itamar Rabenstein, Ran Ravid, Barak Gafni, Anna Saksonov
  • Patent number: 8784980
    Abstract: Provided is a film having a thickness of less than 500 ?m comprising a polymer and a plurality of surface-modified hexagonal boron nitride particles dispersed therewithin. The polymers can be polyimide or epoxy. A process for preparing the film by casting is provided.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: July 22, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: Pui-Yan Lin, Govindasamy Paramasivam Rajendran, George Elias Zahr
  • Patent number: 8699491
    Abstract: A method for communication, in a network element that includes multiple ports, includes buffering data packets entering the network element via the ports in input buffers that are respectively associated with the ports. Storage of the data packets is shared among the input buffers by evaluating a condition related to the ports, and, when the condition is met, moving at least one data packet from a first input buffer of a first port to a second input buffer of a second port, different from the first port. Respective output ports, via which the buffered data packets are to exit the network element, are selected from among the ports. The buffered data packets are forwarded to the selected output ports.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: April 15, 2014
    Assignee: Mellanox Technologies Ltd.
    Inventors: Benny Koren, Oded Wertheim, Ido Bukspan, Noam Katz, George Elias, Itamar Rabenstein
  • Publication number: 20140072800
    Abstract: The present invention deals with a novel coated article comprising a substrate and a curable adhesive bonding layer in adhering contact with said substrate wherein said substrate is a polymeric sheet or film and said curable adhesive bonding layer comprises a curable composition comprising a bis-benzoxazine and an amino-functionalized triazine composition. The coated article hereof is useful in the manufacture of encapsulated printed wiring boards, especially flexible printed wiring boards.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 13, 2014
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventor: GEORGE ELIAS ZAHR
  • Publication number: 20140069693
    Abstract: The present invention deals with a novel multi-layer article useful for preparing flexible printed wiring boards, the multi-layer article comprising discrete conductive pathways contacting a novel curable composition comprising bis-benzoxazine and an amino-functionalized triazine, especially a di-isoimide, and the preparation of encapsulated printed wiring boards, especially flexible printed wiring boards, therefrom. The multi-layer article hereof allows the benefits of bis-benzoxazine as a crosslinkable encapsulant for flexible printed wiring boards to be realized at cure temperatures compatible with existing commercial processes.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 13, 2014
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventor: GEORGE ELIAS ZAHR
  • Publication number: 20140073736
    Abstract: The present invention deals with a novel curable composition comprising bis-benzoxazine and an amine-functionalized triazine, especially a di-isoimide, and the use thereof in the preparation of encapsulated printed wiring boards, especially flexible printed wiring boards. The curable composition hereof beneficially effects crosslinking of bis-benzoxazine at a lower temperature than has heretofore been provided in the art.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 13, 2014
    Applicant: E I DU PONT NEMOURS AND COMPANY
    Inventor: GEORGE ELIAS ZAHR