Abstract: A system including an inter-track interference detection module and a position error signal generation module. The inter-track interference detection module determines a first inter-track interference value based on a first signal from a first sensor positioned over a first track of a rotating storage medium. The first inter-track interference value indicates energy contributed by tracks adjacent to the first track compared to energy contributed by the first track. The inter-track interference detection module determines a second inter-track interference value based on a second signal from a second sensor positioned over a second track of the rotating storage medium. The second inter-track interference value indicates energy contributed by tracks adjacent to the second track compared to energy contributed by the second track. The position error signal generation module generates a position error signal based on the first inter-track interference value and the second inter-track interference value.

Abstract: Systems and methods are provided for using a product code having a first dimension and a second dimension to encode data, decode data, or both. An encoding method includes receiving a portion of user data to be written in the first dimension, and computing first parity symbols with respect to the first dimension for the portion of user data. Partial parity symbols with respect to the second dimension are computed for the portion of user data and are used to obtain second parity symbols for the portion of user data. A decoding method includes decoding a first codeword in the first dimension. When the decoding the first codeword in the first dimension is successful, a target syndrome of a second codeword in the second dimension is computed based on a result of the decoding of the first codeword, wherein the first codeword partially overlaps with the second codeword.

Abstract: Systems and techniques relating to fault tolerant data storage in storage devices, such as storage devices that employ Shingled Magnetic Recording (SMR) and/or storage devices that employ solid state memory, include a method, in some implementations, including: receiving, at a storage controller, a data request for a storage device; reading, in response to the data request, data from discrete units of storage in the storage device, the data comprising stored data read from two or more of the discrete units of storage and parity data read from at least one of the discrete units of storage; detecting an error in the stored data from the reading; and recovering stored data for at least one of the discrete units of storage using the parity data and the stored data read from one or more remaining ones of the two or more of the discrete units of storage.

Abstract: A read/write channel module for writing data to and reading data from a storage medium. A servo channel module is configured to recover a servo field from the storage medium in accordance with a read signal read from the storage medium and a first clock signal. A locator module is configured to determine, based on a location of the servo field recovered from the storage medium, a location of a predetermined bit pattern that is located subsequent to the servo field on the storage medium. A phase error calculator module is configured to estimate a phase error of a second clock signal based on the location of the predetermined bit pattern, wherein a phase and a frequency of the second clock signal are different than a phase and a frequency of the first clock signal, and adjust the phase of the second clock signal based on the estimated phase error.

Abstract: Monitors, architectures, systems and methods for determining one or more quality characteristics of a storage channel. The monitor generally includes an iterative decoder configured to decode data from the storage channel and generate information relating to a quality metric of the storage channel and/or the iterative decoder, a memory configured to store a threshold value for the quality metric, and a comparator configured to compare the threshold value with a measured value of the quality metric. The monitor enables accurate determination of storage channel quality without use of conventional Reed-Solomon metrics.

Abstract: A read module reads memory cells along a first word line by applying a plurality of threshold voltages to the first word line; generates first information about a first memory cell located along the first word line and a first bit line indicating a location of a threshold voltage distribution of the first memory cell relative to the plurality of threshold voltages; reads a second memory cell located along the first word line, a second word line near the first word line, or a second bit line near the first bit line; and generates second information about the second memory cell indicating a state of the second memory cell causing interference to the first memory cell. A compensation module compensates for the interference by assigning one or more of a log-likelihood ratio and a hard decision to the first memory cells based on the first information and the second information.

Abstract: Systems and methods are provided for enhancing the performance and throughput of a low-density parity check (LDPC) decoder. In some embodiments, the enhanced performance and throughput may be achieved by detecting and correcting near-codewords before the decoder iterates up to a predetermined number of iterations. In some embodiments, a corrector runs concurrently with the decoder to correct a near-codeword when the near-codeword is detected. In alternate embodiments, the corrector is active while the decoder is not active. Both embodiments allow for on-the-fly codeword error corrections that improve the performance (e.g., reducing the number of errors) without decreasing the throughput of the decoder.

Abstract: Systems and methods are provided for decoding data stored on a storage device. A decoding method is described for retrieving data from the storage device, wherein the retrieved data are encoded using a product code having a first dimension and a second dimension. The decoding method includes processing at least one codeword from the first dimension to form detector soft information, decoding the at least one codeword from the first dimension based on the detector soft information to form a first decoder soft information, and decoding at least one codeword from the second dimension based on the first decoder soft information to form a second decoder soft information.

Abstract: An apparatus includes, in at least one aspect, a memory interface configured to connect with a plurality of multi-level memory cells and a circuitry coupled with the memory interface. The plurality of multi-level memory cells include a first page and a second page. The first page is associated with bits of a first significance. The second page is associated with bits of a second significance. The circuitry is configured to map a first portion of an encoded data sector to the first page and map a second portion of the encoded data sector to the second page. The first portion excludes the second portion and the second portion excludes the first portion such that each of the first page and the second page contains different data from the encoded data sector.

Abstract: Systems and methods are provided to generate soft information related to the threshold voltage of a memory cell. A range of threshold voltages for the memory cell is divided into subregions of threshold voltage values herein referred to as bins. An output of the memory cell in response to an applied reference signal is measured. The applied reference signal includes a voltage value and position information. A single bin is identified based on the position information of the reference signal. The identified bin is split into more than one bin based on the output of the memory cell and the voltage value of the reference signal. The newly split bins and all the other bins that were not split are assigned new bin indices.

Abstract: A hard disk drive circuit includes first and second inter-track interference detection modules. The first inter-track interference detection module is configured to generate a first measured inter-track interference value based on a first read signal from a first read sensor positioned over a magnetic medium. The second inter-track interference detection module is configured to generate a second measured inter-track interference value based on a second read signal from a second read sensor positioned over the magnetic medium. A position error signal generation module is configured to generate a position error signal based on the first measured inter-track interference value and the second measured inter-track interference value. An arm control module is configured to control rotation of an arm in response to the position error signal. The first read sensor and the second read sensor are located at a distal end of the arm.

Abstract: Adaptive memory read and write systems and methods are provided that may compute estimated means and variances of multi-level memory cells to facilitate writing and reading of data to and from the multi-level memory cells are described herein. The systems may include an apparatus comprising multi-level memory cells, and an estimation block configured to compute estimated means and variances of level distributions of the multi-level memory cells by processing signal samples provided by at least a subset of the multi-level memory cells, the estimated means and variances to be used to facilitate writing and/or reading of data to and/or from at least selected ones of the multi-level memory cells, the multi-level memory cells having M-levels where M is an integer greater than 1, and each of the level distributions is associated with a corresponding level of the M-levels.

Abstract: In one embodiment, a method comprises determining an adaptation for a reference voltage used in a flash memory device as a function of a first count of items read from the flash memory device and a second count of items read from the flash memory device; and shifting the reference voltage at least in part by the adaptation.

Abstract: Reproduction of encoded data which includes a split-mark. FIR data corresponding to split-mark and FIR data affected by the split-mark due to inter-symbol-interference are identified. FIR data corresponding to the split-mark is removed from the received FIR data. Recovered data is created by removing incorrect inter-symbol-interference from the FIR data due to the split-mark, and adding correct inter-symbol-interference from codeword bits. The recovered data is stitched together with data unaffected by split-mark data.

Abstract: Systems, methods, and other embodiments associated with LDPC decoder architectures are described. According to one embodiment, a method includes decoding codeword bits with a high throughput LDPC decoder and when the decoding of the codeword bits with the high throughput LDPC decoder is unsuccessful, decoding the codeword bits with a low throughput LDPC decoder.

Abstract: A system including a first first-in first-out (FIFO) module, a control module, and a second FIFO module. The first FIFO module is configured to receive, from a host, (i) a first block and (ii) a first logical block address corresponding to the first block, where the first block includes first data. The control module is configured to generate a second block, where the second block includes (i) the first data and (ii) the first logical block address. The second FIFO module is configured to receive a third block from the first FIFO module, where the third block includes a second logical block address, and to determine whether the third block is different than the first block depending on whether the second logical block address included in the third block is different than the first logical block address included in the second block.

Abstract: Determining the radial position of a first read head of a storage device includes reading servo data from a storage media platter surface using the first read head, deriving from that servo data a first positron error signal representing a first estimate of the radial position of the first read head, reading the servo data from the storage media platter surface using a different read head, deriving from that servo data a second position error signal representing an estimate of the radial position of the different read head, and combining the first estimate of the radial position of the first read head and the estimate of the radial position of the different read head to obtain a revised estimate of the radial position of the first read head. The combining could include taking account of a known positional offset between the first read head and the different read head.

Abstract: Systems, methods, and other embodiments associated with processing a read signal from a storage medium that includes continuous embedded position information are described. According to one embodiment, an apparatus includes read logic configured to control a storage device to generate the read signal by reading a first layer and a second layer of the storage medium. The first layer defines data and the second layer defines embedded position information. The apparatus includes data detection logic configured to process the read signal to recover the embedded position information. The read logic is configured to control the storage device based, at least in part, on the embedded position information.

Abstract: A QC-LDPC decoding system employing a trapping set look-up table is provided. The QC-LDPC decoding system includes an iterative decoder that utilizes a message-passing algorithm to decode a received codeword. If the iterative decoder fails to produce a valid codeword, additional processing is performed to decode the received codeword. The additional processing includes the steps of computing the syndrome pattern of the received codeword, searching the look-up table for a trapping set class that is responsible for the iterative decoder's failure, retrieving from the look-up table a syndrome pattern and an error pattern of a member of the responsible trapping set class, and calculating the error pattern of the received codeword based on its syndrome pattern and the information retrieved from the look-up table. The received codeword is then corrected based on its error pattern.

Abstract: Embodiments provide a method comprising estimating a first set of log-likelihood ratio (LLR) values for a plurality of memory cells of a memory; based on the first set of LLR values, performing a first error correcting code (ECC) decoding operation; in response to determining a failure of the first ECC decoding operation, generating, by adjusting the first set of LLR values, a second set of LLR values for the plurality of memory cells; and based on the second set of LLR values, performing a second ECC decoding operation.