Patents by Inventor Hao Yu

Hao Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153297
    Abstract: A method for extracting entities comprises obtaining a document that includes a series of textual fields that includes a plurality of entities. Each entity represents information associated with a predefined category. The method includes generating, using the document, a series of tokens representing the series of textual fields. The method includes generating an entity prompt that includes the series of tokens and one of the plurality of entities and generating a schema prompt that includes a schema associated with the document. The method includes generating a model query that includes the entity prompt and the schema prompt and determining, using an entity extraction model and the model query, a location of the one of the plurality of entities among the series of tokens. The method includes extracting, from the document, the one of the plurality of entities using the location of the one of the plurality of entities.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Applicant: Google LLC
    Inventors: Zizhao Zhang, Zifeng Wang, Vincent Perot, Jacob Devlin, Chen-Yu Lee, Guolong Su, Hao Zhang, Tomas Jon Pfister
  • Patent number: 11978802
    Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Wei Hsu, Chih-Hao Wang, Huan-Chieh Su, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu
  • Patent number: 11978714
    Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Chiang Ting, Chi-Hsi Wu, Shang-Yun Hou, Tu-Hao Yu, Chia-Hao Hsu, Ting-Yu Yeh
  • Patent number: 11978773
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Shih-Chuan Chiu, Cheng-Chi Chuang, Chih-Hao Wang
  • Patent number: 11974595
    Abstract: A method for testing burning performance of a dark-colored cigarette using a dark-colored cigarette paper is provided. The dark-colored cigarette paper has a grayscale less than 255. The method includes: simulating, by a robotic arm, a cigarette smoking process and environment; acquiring, by a full-vision camera system, an image of a burn line and ash column region of the dark-colored cigarette; and analyzing a burning performance indicator of the dark-colored cigarette according to coordinate information of the burn line and ash column region. The method is based on a surface reflection characteristic of the dark-colored cigarette paper and a principle of optical reflection to light and highlight an edge of the dark-colored cigarette sample by a light source at a certain angle from a side. In this way, the method forms a chromatic aberration to localize the dark-colored cigarette sample, thereby testing the burning performance of the dark-colored cigarette sample.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: May 7, 2024
    Assignee: CHINA TOBACCO YUNNAN INDUSTRIAL CO., LTD
    Inventors: Han Zheng, Jianbo Zhan, Hao Wang, Zhenhua Yu, Jiao Xie, Xu Wang, Ying Zhang, Tao Wang, Baoshan Yue, Tingting Yu, Jiang Yu, Liwei Li, Jing Zhang
  • Publication number: 20240140957
    Abstract: Provided herein are Bridged Compounds having the following structures: wherein R1a, R1b, R1c, R1d, R2a, R2b, R2c, R2d, R3a, R3b, R3c, R3d, R4, R5, R6, R7, R8, m1, m2, m3, n2, n3, n4, q, X1, X2, Y1, Y2, L1 and ring A are as defined herein, compositions comprising an effective amount of a Bridged Compound, and methods for treating or preventing various diseases, e.g., pancreatic cancer, or a condition treatable or preventable by inhibition of the function of KRAS protein. In another aspect, a Bridged Compound is useful for treating or preventing a condition treatable or preventable by inhibition of the function of KRAS protein with G12D mutation. In another aspect, a Bridged Compound is useful for treating or preventing a condition treatable or preventable by inhibition of a RAS/MAPK pathway.
    Type: Application
    Filed: January 7, 2022
    Publication date: May 2, 2024
    Inventors: Qi JI, Chao YU, Ce WANG, Hanzi sun, Hao YUAN, Zhiwei WANG
  • Publication number: 20240142732
    Abstract: A method includes forming a first waveguide over a substrate; forming a first layer of low-dimensional material on the first waveguide; forming a first layer of dielectric material over the first layer of low-dimensional material; forming a second layer of low dimensional material on the first layer of dielectric material; and forming a first conductive contact that electrically contacts the first layer of low-dimensional material and a second conductive contact that electrically contacts the second layer of low-dimensional material.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 2, 2024
    Inventors: Chih-Hsin Lu, Chin-Her Chien, Chung-Hao Tsai, Chuei-Tang Wang, Chen-Hua Yu
  • Publication number: 20240145470
    Abstract: A method for processing an integrated circuit includes forming first and second gate all around transistors. The method forms a dipole oxide in the first gate all around transistor without forming the dipole oxide in the second gate all around transistor. This is accomplished by entirely removing an interfacial dielectric layer and a dipole-inducing layer from semiconductor nanosheets of the second gate all around transistor before redepositing the interfacial dielectric layer on the semiconductor nanosheets of the second gate all around transistor.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Lung-Kun CHU, Mao-Lin HUANG, Chung-Wei HSU, Jia-Ni YU, Kuo-Cheng CHIANG, Kuan-Lun CHENG, Chih-Hao WANG
  • Publication number: 20240145257
    Abstract: A method includes placing a plurality of package components over a carrier, encapsulating the plurality of package components in an encapsulant, forming a light-sensitive dielectric layer over the plurality of package components and the encapsulant, exposing the light-sensitive dielectric layer using a lithography mask, and developing the light-sensitive dielectric layer to form a plurality of openings. Conductive features of the plurality of package components are exposed through the plurality of openings. The method further includes forming redistribution lines extending into the openings. One of the redistribution lines has a length greater than about 26 mm. The redistribution lines, the plurality of package components, the encapsulant in combination form a reconstructed wafer.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Inventors: Chen-Hua Yu, Tin-Hao Kuo
  • Publication number: 20240142590
    Abstract: A computer-implemented method for aligning a sensor to a vehicle includes receiving a first frame of measurement from the sensor which includes a first point cloud. One or more clusters Ci representing one or more objects or the ground are segmented. A first set of feature vectors fi is computed for each cluster Ci. Based on the first set of feature vectors fi a second set of feature vectors fi? is predicted respectively using an initial transformation. A third set of feature vectors fj is computed for a second frame with a second point cloud with clusters Cj. A pair of matching clusters is identified from Ci and Cj. A feature distance between the matching clusters is computed. An alignment transformation is computed by updating the initial transformation based on the feature distance. The method further includes aligning the sensor and the vehicle based on the alignment transformation.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Inventors: Yao Hu, Xinyu Du, Binbin Li, Hao Yu
  • Publication number: 20240145562
    Abstract: The present disclosure describes a method to form a backside power rail (BPR) semiconductor device with an air gap. The method includes forming a fin structure on a first side of a substrate, forming a source/drain (S/D) region adjacent to the fin structure, forming a first S/D contact structure on the first side of the substrate and in contact with the S/D region, and forming a capping structure on the first S/D contact structure. The method further includes removing a portion of the first S/D contact structure through the capping structure to form an air gap and forming a second S/D contact structure on a second side of the substrate and in contact with the S/D region. The second side is opposite to the first side.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Zhen YU, Lin-Yu HUANG, Cheng-Chi CHUANG, Chih-Hao WANG, Huan-Chieh SU
  • Patent number: 11969815
    Abstract: An automatic material changing and welding system for stamping materials includes a welding transfer sliding table and a welding platform. The automatic material changing device further includes a feeding system. The feeding system includes a double-head uncoiling machine, an automatic feeding machine and a flattening machine. The automatic material changing device is used for automatic feeding for a stamping machine. The system triggers a material changing signal through a sensor to control and integrate the welding transfer sliding table and the welding platform to act to execute a welding procedure, so that the stamping materials are in welding connection with new and old coiled materials through a welding connection plate to realize continuous production operation of an automated stamping production line.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: April 30, 2024
    Assignee: NATIONAL KAOHSIUNG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Chun-Chih Kuo, Hao-Lun Huang, Bor-Tsuen Lin, Cheng-Yu Yang
  • Patent number: 11973338
    Abstract: A chip-level software and hardware cooperative relay protection device is provided. The device includes: a control chip, wherein a first control unit, a second control unit, and multiple logic circuits are integrated on the control chip; and the logic circuits perform microsecond-level rapid calculation on electrical signals of a protected electrical device, obtain fault feature parameters of the protected electrical device are and transmit same to the first control unit, then perform millisecond-level real-time protection logic determination according to the fault feature parameters of the protected electrical device to obtain relay protection results of the protected electrical device, and protect the protected electrical device by controlling an external relay according to the relay protection results.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: April 30, 2024
    Assignee: DIGITAL GRID RES. INST., CHINA SOUTHERN PWR. GRID
    Inventors: Peng Li, Wei Xi, Xiaobo Li, Hao Yao, Yang Yu, Tiantian Cai, Junjian Chen
  • Publication number: 20240135299
    Abstract: Methods, apparatus, and processor-readable storage media for automatically determining work environment-related ergonomic data are provided herein. An example computer-implemented method includes obtaining ergonomic-related data pertaining to one or more of an individual within a work environment and the work environment; determining one or more ergonomic parameter values by processing at least a portion of the obtained ergonomic-related data using one or more models; generating and outputting, to the individual via one or more automated systems, at least one notification based at least in part on the one or more ergonomic parameter values; and performing one or more automated actions based at least in part on one or more of the one or more ergonomic values and the at least one notification.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 25, 2024
    Inventors: Feng Cheng Lee, Hao Yu Feng, Udara Liyanage, Wee Young Chua
  • Publication number: 20240136298
    Abstract: A method includes dispensing sacrificial region over a carrier, and forming a metal post over the carrier. The metal post overlaps at least a portion of the sacrificial region. The method further includes encapsulating the metal post and the sacrificial region in an encapsulating material, demounting the metal post, the sacrificial region, and the encapsulating material from the carrier, and removing at least a portion of the sacrificial region to form a recess extending from a surface level of the encapsulating material into the encapsulating material.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Jing-Cheng Lin, Chen-Hua Yu, Po-Hao Tsai
  • Patent number: 11966246
    Abstract: An electronic circuit includes a first transistor coupled between a first node and a supply voltage and controlled by a first node, a second transistor coupled between a second node and the supply voltage and controlled by the first node, a third transistor coupled between a third node and the supply voltage and controlled by a fourth node, a fourth transistor coupled between the fourth node and the supply voltage and controlled by the fourth node, a fifth transistor coupled between the first node and the fifth node and controlled by a reference voltage, a sixth transistor coupled between the second node and a ground and controlled by the third node, a seventh transistor coupled between the fourth node and the ground and controlled by the second node, a first resistor coupled the fourth node to the ground, and a second resistor coupled to the fifth node.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: April 23, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chia-Tseng Chiang, Hao-Yu Li
  • Publication number: 20240122229
    Abstract: A method for comprehensively analyzing and/or evaluating cigarette burning quality index is disclosed. The steps include collecting cigarette burning quality index data, filtering the cigarette burning quality index data, standardizing cigarette data, and measuring cigarette burning quality. The importance of the cigarette burning quality indicators can also be evaluated. The method for comprehensively analyzing and/or evaluating cigarette burning quality indicators can reflect general laws more accurately by maintaining the sample distribution through a singularity detection method, and analyzing correlations of each index with cigarette performance from multiple perspectives, to fuse them into a comprehensive measurement value. The importance ranking and weight of indicators can be obtained more completely and stably.
    Type: Application
    Filed: November 8, 2023
    Publication date: April 18, 2024
    Inventors: Han ZHENG, Jianbo ZHAN, Hao WANG, Zhenhua YU, Xu WANG, Jiao XIE, Ying ZHANG, Tao WANG, Tingting YU, Baoshan YUE
  • Publication number: 20240128232
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
  • Publication number: 20240125916
    Abstract: An indoor positioning method includes scanning for registered Wi-Fi nodes with known coordinates to generate a list of the registered Wi-Fi nodes. The method also includes performing a ranging operation by (i) selecting nodes to range with from the list of the registered Wi-Fi nodes, and (ii) processing ranging responses from the selected nodes to generate a series of distance measurements. The method further includes obtaining a series of sensor readings generated by one or more inertial measurement units (IMUs) of a device. The method also includes estimating a position of the device based on the series of distance measurements and the series of sensor readings using first and second filtering operations that are performed in parallel.
    Type: Application
    Filed: June 27, 2023
    Publication date: April 18, 2024
    Inventors: Rebal Al Jurdi, Hao Chen, Jianyuan Yu, Boon Loong Ng, Kyu-Hui Han, Jianzhong Zhang
  • Patent number: 11963300
    Abstract: A panel device including a substrate, a conductor pad, a turning wire, and a circuit board is provided. The substrate has a first surface and a second surface connected to the first surface while a normal direction of the second surface is different from a normal direction of the first surface. The conductor pad is disposed on the first surface of the substrate. The turning wire is disposed on the substrate and extends from the first surface to the second surface. The turning wire includes a wiring layer in contact with the conductor pad and a wire covering layer covering the wiring layer. The circuit board is bonded to and electrically connected to the wire covering layer. A manufacturing method of a panel device is also provided herein.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: April 16, 2024
    Assignee: Au Optronics Corporation
    Inventors: Chun-Yueh Hou, Hao-An Chuang, Fan-Yu Chen, Hsi-Hung Chen, Yun Cheng, Wen-Chang Hsieh, Chih-Wen Lu