Abstract: A semiconductor device includes a vertical drift region over a drain contact region, abutted on opposite sides by RESURF trenches. A split gate is disposed over the vertical drift region. A first portion of the split gate is a gate of an MOS transistor and is located over a body of the MOS transistor over a first side of the vertical drift region. A second portion of the split gate is a gate of a channel diode and is located over a body of the channel diode over a second, opposite, side of the vertical drift region. A source electrode is electrically coupled to a source region of the channel diode and a source region of the MOS transistor.

Abstract: There is provided a water-based resin composition that contains a polymer (A) containing, as essential raw materials, a hydrogenated polybutadiene (a1) with an iodine value in the range of 5 to 25, a monomer (a2) with an acid group, and a monomer (a3) with a hydroxy group, a basic compound (B), and an aqueous medium (C), wherein the hydrogenated polybutadiene (a1) constitutes 4% to 38% by mass of the raw materials of the polymer (A), and the polymer (A) has an acid value in the range of 10 to 65 mgKOH/g. A water-based resin composition of the present invention has high storage stability and forms a coating film with good physical properties, such as high adhesiveness to various substrates and high blocking resistance, and is therefore suitably used in a water-based paint.

Abstract: There is provided a water-based resin composition that contains a polymer (A) containing, as essential raw materials, a hydrogenated polybutadiene (a1) with an iodine value in the range of 5 to 25, a monomer (a2) with an acid group, and a monomer (a3) with a hydroxy group, a basic compound (B), and an aqueous medium (C), wherein the hydrogenated polybutadiene (a1) constitutes 4% to 38% by mass of the raw materials of the polymer (A), and the polymer (A) has an acid value in the range of 10 to 65 mgKOH/g. A water-based resin composition of the present invention has high storage stability and forms a coating film with good physical properties, such as high adhesiveness to various substrates and high blocking resistance, and is therefore suitably used in a water-based paint.

Abstract: Embodiments of a deep trench capacitor are disclosed. In one example a plurality of deep trenches is located in a first region of a semiconductor wafer, the first region having a first conductivity type. A corresponding dielectric layer is located on a surface of each of the plurality of deep trenches, and a corresponding doped polysilicon filler is located within each of the dielectric layers. Dielectric-filled trenches are located between each of the dielectric layers and the surface of the semiconductor wafer.

Abstract: A semiconductor device includes a vertical drift region over a drain contact region, abutted on opposite sides by RESURF trenches. A split gate is disposed over the vertical drift region. A first portion of the split gate is a gate of an MOS transistor and is located over a body of the MOS transistor over a first side of the vertical drift region. A second portion of the split gate is a gate of a channel diode and is located over a body of the channel diode over a second, opposite, side of the vertical drift region. A source electrode is electrically coupled to a source region of the channel diode and a source region of the MOS transistor.

Abstract: A semiconductor device includes a medium voltage MOSFET having a vertical drain drift region between RESURF trenches containing field plates which are electrically coupled to a source electrode of the MOSFET. A split gate with a central opening is disposed above the drain drift region between the RESURF trenches. A two-level LDD region is disposed below the central opening in the split gate. A contact metal stack makes contact with a source region at lateral sides of the triple contact structure, and with a body contact region and the field plates in the RESURF trenches at a bottom surface of the triple contact structure. A perimeter RESURF trench surrounds the MOSFET. A field plate in the perimeter RESURF trench is electrically coupled to the source electrode of the MOSFET. An integrated snubber may be formed in trenches formed concurrently with the RESURF trenches.

Abstract: A semiconductor device includes a vertical drift region over a drain contact region, abutted on opposite sides by RESURF trenches. A split gate is disposed over the vertical drift region. A first portion of the split gate is a gate of an MOS transistor and is located over a body of the MOS transistor over a first side of the vertical drift region. A second portion of the split gate is a gate of a channel diode and is located over a body of the channel diode over a second, opposite, side of the vertical drift region. A source electrode is electrically coupled to a source region of the channel diode and a source region of the MOS transistor.

Abstract: A device includes a transistor formed on a substrate. The transistor includes an n-type drain contact layer, an n-type drain layer, an oxide layer, a p-type body region, a p-type terminal region, body trenches, and terminal trenches. The n-type drain contact layer is near a bottom surface of the substrate. The n-type drain layer is positioned on the n-type drain contact layer. The oxide layer circumscribes a transistor region. The p-type body region is positioned within the transistor region. The p-type terminal region extends from under the oxide layer to an edge of the transistor region, thereby forming a contiguous junction with the p-type body region. The body trenches is within the transistor region and interleaves with the p-type body region, whereas the terminal trenches is outside the transistor region and interleaves with the p-type terminal region.

Abstract: A friction transmission belt has a rubber layer forming a pulley contacting portion. The rubber layer is made of a rubber composition containing a crosslinked rubber component and crosslinked polyolefin particles. Examples of the crosslinked polyolefin particles can contain ultrahigh molecular weight polyolefin particles having an average molecular weight of 500,000 or more.

Abstract: A photodetector cell includes a substrate having a semiconductor surface layer, and a trench in the semiconductor surface layer. The trench has tilted sidewalls including a first tilted sidewall and a second tilted sidewall. A pn junction, a PIN structure, or a phototransistor includes an active p-region and an active n-region that forms a junction including a first junction along the first tilted sidewall to provide a first photodetector element and a second junction spaced apart from the first junction along the second tilted sidewall to provide a second photodetector element. At least a p-type anode contact and at least an n-type cathode contact contacts the active p-region and active n-region of the first photodetector element and second photodetector element. The tilted sidewalls provide an outer exposed or optically transparent surface for passing incident light to the first and second photodetector elements for detection of incident light.

Abstract: An integrated trench capacitor and method for making the trench capacitor is disclosed. The method includes forming a trench in a silicon layer, forming a first dielectric on the exposed surface of the trench, performing an anisotropic etch of the first dielectric to expose silicon at the bottom of the trench, implanting a dopant into exposed silicon at the bottom of the trench, forming a first polysilicon layer over the first dielectric, forming a second dielectric over the first polysilicon layer, and forming a second polysilicon layer over the second dielectric to fill the trench.

Abstract: A vertical, high-voltage MOS transistor, which has a source region, a body contact region, and a number of trenches structures with field plates, and a method of forming the MOS transistor increase the on-state resistance of the MOS transistor by reducing the trench pitch. Trench pitch can be reduced with metal contacts that simultaneously touch the source regions, the body contact regions, and the field plates. Trench pitch can also be reduced with a gate that increases the size of the LDD region.

Abstract: A semiconductor device includes a medium voltage MOSFET having a vertical drain drift region between RESURF trenches containing field plates which are electrically coupled to a source electrode of the MOSFET. A split gate with a central opening is disposed above the drain drift region between the RESURF trenches. A two-level LDD region is disposed below the central opening in the split gate. A contact metal stack makes contact with a source region at lateral sides of the triple contact structure, and with a body contact region and the field plates in the RESURF trenches at a bottom surface of the triple contact structure. A perimeter RESURF trench surrounds the MOSFET. A field plate in the perimeter RESURF trench is electrically coupled to the source electrode of the MOSFET. An integrated snubber may be formed in trenches formed concurrently with the RESURF trenches.

Abstract: A production method of a V-belt uses a belt mold having a plurality of compression layer-shape grooves arranged adjacent to one another in a groove width direction. A shaped structure having a plurality of ridges on an outer peripheral surface is crosslinked and combined with a fabric material to form a belt slab, while the compression layer-forming portions, which are the ridges covered with the fabric material, being fitted in the respective compression layer-shape grooves of the belt mold. The belt slab is cut into ring-shaped pieces such that one ring-shaped piece corresponds to one compression layer-forming portion.

Abstract: A production method of a raw edge V-belt uses a belt mold having a plurality of compressed rubber layer-shape grooves arranged adjacent to one another. A shaped structure having a plurality of compressed rubber layer-forming portions on an outer peripheral surface is crosslinked to form a belt slab, while the compressed rubber layer-forming portions fitted in the respective compressed rubber layer-shape grooves of the belt mold. The belt slab is cut into ring-shaped pieces such that one ring-shaped piece corresponds to one compressed rubber layer-forming portion.

Abstract: A semiconductor device contains a vertical MOS transistor having a trench gate in trenches extending through a vertical drift region to a drain region. The trenches have field plates under the gate; the field plates are adjacent to the drift region and have a plurality of segments. A dielectric liner in the trenches separating the field plates from the drift region has a thickness great than a gate dielectric layer between the gate and the body. The dielectric liner is thicker on a lower segment of the field plate, at a bottom of the trenches, than an upper segment, immediately under the gate. The trench gate may be electrically isolated from the field plates, or may be connected to the upper segment. The segments of the field plates may be electrically isolated from each other or may be connected to each other in the trenches.

Abstract: A shaped structure and a fabric material are set in a belt mold such that the shaped structure and the fabric material are respectively positioned inside and outside with respect to each other. While each of compression layer-forming portions comprised of ridges of the shaped structure covered with the fabric material is fitted in an associated one of compression layer-shaping grooves of the belt mold, the shaped structure is pressed toward the belt mold and heated to be crosslinked, and integrated with the fabric material, thereby molding a cylindrical belt slab. The belt slab is cut into ring-shaped pieces having two or more of the compression layer-forming portions.

Abstract: Provided are a curing agent for epoxy resins, which is a curing agent capable of curing an epoxy resin at room temperature, and which can form a cured product (cured coating film) having excellent adhesion even to a substrate which is not in an environment completely dried, and an epoxy resin composition obtained using the same. A curing agent for epoxy resins, containing (a1) an aromatic amine, (a2) an aliphatic amine having an aromatic ring or a cycloalkane ring, and (a3) a curing accelerator, and an epoxy resin composition containing the curing agent and an epoxy resin.

Abstract: A device includes a transistor formed on a substrate. The transistor includes an n-type drain contact layer, an n-type drain layer, an oxide layer, a p-type body region, a p-type terminal region, body trenches, and terminal trenches. The n-type drain contact layer is near a bottom surface of the substrate. The n-type drain layer is positioned on the n-type drain contact layer. The oxide layer circumscribes a transistor region. The p-type body region is positioned within the transistor region. The p-type terminal region extends from under the oxide layer to an edge of the transistor region, thereby forming a contiguous junction with the p-type body region. The body trenches is within the transistor region and interleaves with the p-type body region, whereas the terminal trenches is outside the transistor region and interleaves with the p-type terminal region.

Abstract: An integrated trench capacitor and method for making the trench capacitor is disclosed. The method includes forming a trench in a silicon layer, forming a first dielectric on the exposed surface of the trench, performing an anisotropic etch of the first dielectric to expose silicon at the bottom of the trench, implanting a dopant into exposed silicon at the bottom of the trench, forming a first polysilicon layer over the first dielectric, forming a second dielectric over the first polysilicon layer, and forming a second polysilicon layer over the second dielectric to fill the trench.