Patents by Inventor Hideaki Kawahara

Hideaki Kawahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160010722
    Abstract: A friction transmission belt includes a belt body, formed of a rubber composition, looped over a pulley, and transmitting power. The friction transmission belt includes a reinforcing fabric wrapping at least a surface, of the belt body, in contact with the pulley. The reinforcing fabric is a knitted fabric, and on the surface of the belt body in contact with the pulley, a wale direction of the reinforcing fabric is a direction in which the friction transmission belt travels.
    Type: Application
    Filed: September 18, 2015
    Publication date: January 14, 2016
    Inventors: Sungjin KIM, Hideaki KAWAHARA, Osamu TAKAHASHI
  • Patent number: 9230851
    Abstract: A method of fabricating a semiconductor device includes forming at least one trench from a top side of a semiconductor layer, wherein the trench is lined with a trench dielectric liner and filled by a first polysilicon layer. The surface of the trench dielectric liner is etched, wherein dips in the trench dielectric liner are formed relative to a top surface of the first polysilicon layer which results in forming a protrusion including the first polysilicon layer. The first polysilicon layer is etched to remove at least a portion of the protrusion. A second dielectric layer is formed over at least the trench after etching the first polysilicon layer. A second polysilicon layer is deposited. The second polysilicon layer is etched to remove it over the trench and provide a patterned second polysilicon layer on the top side of the semiconductor layer.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: January 5, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Simon John Molloy, Christopher Boguslaw Kocon, John Manning Savidge Neilson, Hong Yang, Seetharaman Sridhar, Hideaki Kawahara
  • Publication number: 20150357461
    Abstract: A semiconductor device includes a vertical MOS transistor with a plurality of parallel RESURF drain trenches separated by a constant spacing in a vertical drain drift region. The vertical MOS transistor has chamfered corners; each chamfered corner extends across at least five of the drain trenches. A RESURF termination trench surrounds the drain trenches, separated from sides and ends of the drain trenches by distances which are functions of the drain trench spacing. At the chamfered corners, the termination trench includes external corners which extend around an end of a drain trench which extends past an adjacent drain trench, and includes internal corners which extend past an end of a drain trench which is recessed from an adjacent drain trench. The termination trench is separated from the drain trenches at the chamfered corners by distances which are also functions of the drain trench spacing.
    Type: Application
    Filed: June 9, 2014
    Publication date: December 10, 2015
    Inventors: Hideaki KAWAHARA, Christopher Boguslaw KOCON, Simon John MOLLOY, Jayhoon CHUNG, John Manning Savidge NEILSON
  • Publication number: 20150357459
    Abstract: A semiconductor device includes a vertical drift region over a drain contact region, abutted on opposite sides by RESURF trenches. A split gate is disposed over the vertical drift region. A first portion of the split gate is a gate of an MOS transistor and is located over a body of the MOS transistor over a first side of the vertical drift region. A second portion of the split gate is a gate of a channel diode and is located over a body of the channel diode over a second, opposite, side of the vertical drift region. A source electrode is electrically coupled to a source region of the channel diode and a source region of the MOS transistor.
    Type: Application
    Filed: June 9, 2014
    Publication date: December 10, 2015
    Inventors: Christopher Boguslaw Kocon, Simon John Molloy, John Manning Savidge Neilson, Hideaki Kawahara
  • Patent number: 9136381
    Abstract: Semiconductor device includes MOSFET having planar cells on an epitaxial semiconductor surface of a first type providing a drain drift region. A first and second epitaxial column formed in the semiconductor surface are doped a second type. A split gate includes planar gates between the epitaxial columns including a MOS gate electrode (MOS gate) and a diode gate electrode (diode gate). A body region of the second type in the drift region abuts the epitaxial columns. A source of the first type in the body region includes a first source portion proximate to the MOS gate and a second source portion proximate to the diode gate. A vertical drift region uses the drift region below the body region to provide a drain. A connector shorts the diode gate to the second source portion to provide an integrated channel diode. The MOS gate is electrically isolated from the first source portion.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: September 15, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Christopher Boguslaw Kocon, John Manning Savidge Neilson, Simon John Molloy, Hideaki Kawahara
  • Patent number: 9009936
    Abstract: A belt attachment jig includes a jig body positioned such that a side surface faces a side surface of a pulley, and a belt guide portion located at one end of the side surface of the jig body and protruding along a circumference of the pulley, and having, in a surface on a base side, a holding surface for holding a belt. The belt guide portion being configured to guide the belt onto the holding surface and lead the belt out to a lateral side of the pulley, when fitted in a pulley groove of the pulley. The holding surface has a top at a portion on a side closer to the jig body, and is tilted obliquely downward in radial directions from the top and is curved in an inverted U shape along a lead-out direction of the belt so that an inner circumferential surface of the belt faces the jig body.
    Type: Grant
    Filed: March 22, 2014
    Date of Patent: April 21, 2015
    Assignee: Bando Chemical Industries, Ltd.
    Inventors: Takashi Kunisada, Hideaki Kawahara
  • Patent number: 8878330
    Abstract: An integrated circuit containing a voltage divider having an upper resistor of unsilicided gate material over field oxide around a central opening and a drift layer under the upper resistor, an input terminal coupled to an input node of the upper resistor adjacent to the central opening in the field oxide and coupled to the drift layer through the central opening, a sense terminal coupled to a sense node on the upper resistor opposite from the input node, a lower resistor with a sense node coupled to the sense terminal and a reference node, and a reference terminal coupled to the reference node. A process of forming the integrated circuit containing the voltage divider.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: November 4, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Hideaki Kawahara, Marie Denison, Sameer Pendharkar, Philip L. Hower, John Lin, Robert A. Neidorff
  • Patent number: 8872273
    Abstract: An integrated circuit containing a gate controlled voltage divider having an upper resistor on field oxide in series with a transistor switch in series with a lower resistor. A resistor drift layer is disposed under the upper resistor, and the transistor switch includes a switch drift layer adjacent to the resistor drift layer, separated by a region which prevents breakdown between the drift layers. The switch drift layer provides an extended drain or collector for the transistor switch. A sense terminal of the voltage divider is coupled to a source or emitter node of the transistor and to the lower resistor. An input terminal is coupled to the upper resistor and the resistor drift layer. A process of forming the integrated circuit containing the gate controlled voltage divider.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: October 28, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Hideaki Kawahara, Marie Denison, Sameer Pendharkar, Philip L. Hower, John Lin, Robert A. Neidorff
  • Publication number: 20140274509
    Abstract: A belt attachment jig includes a jig body positioned such that a side surface faces a side surface of a pulley, and a belt guide portion located at one end of the side surface of the jig body and protruding along a circumference of the pulley, and having, in a surface on a base side, a holding surface for holding a belt. The belt guide portion being configured to guide the belt onto the holding surface and lead the belt out to a lateral side of the pulley, when fitted in a pulley groove of the pulley. The holding surface has a top at a portion on a side closer to the jig body, and is tilted obliquely downward in radial directions from the top and is curved in an inverted U shape along a lead-out direction of the belt so that an inner circumferential surface of the belt faces the jig body.
    Type: Application
    Filed: March 22, 2014
    Publication date: September 18, 2014
    Applicant: BANDO CHEMICAL INDUSTRIES, LTD.
    Inventors: Takashi KUNISADA, Hideaki KAWAHARA
  • Publication number: 20140235391
    Abstract: When the rotational speed of an engine 11 is equal to or higher than 4000 rpm, the rotational fluctuation ratio of a crank shaft pulley 13 at an outer circumferential surface thereof is sometimes equal to or greater than 6%. Moreover, in the layout in which a V-ribbed belt 20 is wound on a plurality of pulleys 14, 15, at least one of span lengths is equal to or longer than 220 mm. The V-ribbed belt 20 includes a back reinforcement fabric.
    Type: Application
    Filed: December 23, 2013
    Publication date: August 21, 2014
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, BANDO CHEMICAL INDUSTRIES, LTD.
    Inventors: Hideaki Kawahara, Takeshi Nishigaki, Hideyuki Kato, Kosuke Sogawa, Kazunori Ueno, Kenji Yamanari, Shin Satsumabayashi
  • Publication number: 20140217497
    Abstract: A metal oxide semiconductor field effect transistor (MOSFET) in and on a semiconductor surface provides a drift region of a first conductivity type. A plurality of active area trenches in the drift region, and first and second termination trenches are each parallel to and together sandwiching the active area trenches. The active area trenches and termination trenches include a trench dielectric liner and electrically conductive filler material filled field plates. A gate is over the drain drift region between active area trenches. A body region of a second conductivity abuts the active region trenches. A source of the first conductivity type is in the body region on opposing sides of the gate. A vertical drain drift region uses the drift region below the body region. A first and second curved trench feature couples the field plate of the first and second termination trench to field plates of active area trenches.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 7, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: HIDEAKI KAWAHARA, CHRISTOPHER BOGUSLAW KOCON, SIMON JOHN MOLLOY, JOHN MANNING SAVIDGE NEILSON
  • Publication number: 20140220761
    Abstract: A method of fabricating a semiconductor device includes forming at least one trench from a top side of a semiconductor layer, wherein the trench is lined with a trench dielectric liner and filled by a first polysilicon layer. The surface of the trench dielectric liner is etched, wherein dips in the trench dielectric liner are formed relative to a top surface of the first polysilicon layer which results in forming a protrusion including the first polysilicon layer. The first polysilicon layer is etched to remove at least a portion of the protrusion. A second dielectric layer is formed over at least the trench after etching the first polysilicon layer. A second polysilicon layer is deposited. The second polysilicon layer is etched to remove it over the trench and provide a patterned second polysilicon layer on the top side of the semiconductor layer.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 7, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: SIMON JOHN MOLLOY, CHRISTOPHER BOGUSLAW KOCON, JOHN MANNING SAVIDGE NEILSON, HONG YANG, SEETHARAMAN SRIDHAR, HIDEAKI KAWAHARA
  • Patent number: 8748976
    Abstract: A semiconductor device contains a vertical MOS transistor with instances of a vertical RESURF trench on opposite sides of a vertical drift region. The vertical RESURF trench contains a dielectric trench liner on sidewalls, and a lower field plate and an upper field plate above the lower field plate. The dielectric trench liner between the lower field plate and the vertical drift region is thicker than between the upper field plate and the vertical drift region. A gate is disposed over the vertical drift region and is separate from the upper field plate. The upper field plate and the lower field plate are electrically coupled to a source electrode of the vertical MOS transistor.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: June 10, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Christopher Boguslaw Kocon, John Manning Savidge Neilson, Simon John Molloy, Hideaki Kawahara, Hong Yang, Seetharaman Sridhar, Hao Wu, Boling Wen
  • Publication number: 20130090413
    Abstract: An object of the present invention is to provide a water-soluble epoxy resin that has high water-solubility, maintains emulsion stability for epoxy resin, and is capable of forming a cured product that has excellent coating film strength corrosion resistance and water resistance. The present invention provides a water-soluble epoxy resin obtained by causing an epoxy resin (B) having two or more epoxy groups in a molecule to react with a carboxy-group-containing compound (A) obtained by reacting a polyethylene glycol monoalkyl ether (A-1) having a number-average molecular weight of 400 to 10000 and an acid anhydride (A-2) derived from a polyvalent carboxylic acid; a water-soluble epoxy resin composition containing the water-soluble epoxy resin and an epoxy resin having two or more epoxy groups in a molecule; and a water-based epoxy resin composition in which the water-soluble epoxy resin composition is dispersed in an water-based solvent.
    Type: Application
    Filed: September 21, 2011
    Publication date: April 11, 2013
    Applicant: DIC CORPORATION
    Inventors: Hideaki Kawahara, Tetsuya Yamazaki
  • Publication number: 20130032922
    Abstract: An integrated circuit containing a voltage divider having an upper resistor of unsilicided gate material over field oxide around a central opening and a drift layer under the upper resistor, an input terminal coupled to an input node of the upper resistor adjacent to the central opening in the field oxide and coupled to the drift layer through the central opening, a sense terminal coupled to a sense node on the upper resistor opposite from the input node, a lower resistor with a sense node coupled to the sense terminal and a reference node, and a reference terminal coupled to the reference node. A process of forming the integrated circuit containing the voltage divider.
    Type: Application
    Filed: August 6, 2012
    Publication date: February 7, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hideaki Kawahara, Marie Denison, Sameer Pendharkar, Philip L. Hower, John Lin, Robert A. Neidorff
  • Publication number: 20130032863
    Abstract: An integrated circuit containing a gate controlled voltage divider having an upper resistor on field oxide in series with a transistor switch in series with a lower resistor. A resistor drift layer is disposed under the upper resistor, and the transistor switch includes a switch drift layer adjacent to the resistor drift layer, separated by a region which prevents breakdown between the drift layers. The switch drift layer provides an extended drain or collector for the transistor switch. A sense terminal of the voltage divider is coupled to a source or emitter node of the transistor and to the lower resistor. An input terminal is coupled to the upper resistor and the resistor drift layer. A process of forming the integrated circuit containing the gate controlled voltage divider.
    Type: Application
    Filed: August 6, 2012
    Publication date: February 7, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hideaki Kawahara, Marie Denison, Sameer Pendharkar, Philip L. Hower, John Lin, Robert A. Neidorff
  • Patent number: 8278683
    Abstract: Current density in an insulated gate bipolar transistor (L-IGBT) may be increased by adding a second gate, and the corresponding MOS transistors, to the source area, which increases the base current compared to a L-IGBT with a single MOS gate. The current density may be further increased by extending the base of the bipolar transistor in the L-IGBT vertically to the bottom surface of the silicon on insulator (SOI) film in which the L-IGBT is fabricated. Adding a buffer diffused region around the sinks in the source improves the base current spatial uniformity, which improves the safe operating area (SOA) of the L-IGBT. A L-IGBT of either polarity may be formed with the inventive configurations. A method of forming the inventive L-IGBT is also disclosed.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: October 2, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Hideaki Kawahara, Philip Leland Hower
  • Patent number: 8138521
    Abstract: The objective of this invention is to provide a semiconductor device having a thyristor that can shorten the turn-off time. A first electroconductive type first semiconductor region 20 is formed on a substrate, and a second electroconductive type second semiconductor region 22, a second electroconductive type third semiconductor region 23, designated as an anode, and a first electroconductive type fourth semiconductor region 24, designated as an anode gate, are formed on the surface layer part of the first semiconductor region. Also, a first electroconductive type fifth semiconductor region 26, designated as a cathode, and a second electroconductive type sixth semiconductor region 25, designated as a cathode gate, are formed on the surface layer part of the second semiconductor region.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: March 20, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Hideaki Kawahara
  • Patent number: 8093622
    Abstract: A semiconductor device having a thyristor SCR with reduced turn-off time. A third semiconductor region of the second conductivity type (anode AN) and a fourth semiconductor region of the first conductivity type (anode gate AG) are formed in the top layer of a first semiconductor region; fifth semiconductor region of the first conductivity type (cathode CA) and sixth semiconductor region of the second conductivity type (cathode gate CG) are formed in the top layer of a second semiconductor region; a gate insulating film and gate electrode MG are formed on the second semiconductor region. When the thyristor is turned off from the on state, a higher potential than that on the anode is applied to the anode gate, and a diode made up of the anode and the anode gate inside the thyristor is made to conduct so as to control the potential of the anode during driving.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: January 10, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Hideaki Kawahara, Toshimi Satoh, Toshiyuki Tani
  • Publication number: 20110160014
    Abstract: In a belt transmission system A, a drive pulley 1 and at least one driven pulley 2-4 are flat pulleys, and power transmission between the pulleys is performed through a substantially flat transmission surface b1 of the power transmission belt B. This can improve transmission efficiency and durability of the power transmission belt to be comparable to those of a flat belt, while significantly reducing the cost of the system. A plurality of protrusions 82a extending in the longitudinal direction of the belt are provided on an outer surface of the belt, and are allowed to engage with circumferential grooves 5a of a restriction pulley 5, 6, thereby restricting movement of the power transmission belt in the lateral direction of the belt. This can keep the belt running stably even when rainwater etc. is adhered to the belt or the pulley.
    Type: Application
    Filed: August 26, 2009
    Publication date: June 30, 2011
    Applicant: BANDO CHEMICAL INDUSTRIES, LTD.
    Inventor: Hideaki Kawahara