Patents by Inventor Hideyuki Noda

Hideyuki Noda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7879290
    Abstract: An apparatus includes a system for guiding chemiluminescence and a system for preventing a variation in dark currents. The apparatus includes a first light shielding BOX having a sample container holder and a shutter unit therein, the shutter unit including a top plate which is partly formed by a movement of a plate member and a second light shielding BOX having a photodetector therein. While a measurement is not implemented, the shutter unit is closed to block entrance of stray light to the photodetector, and while a measurement is implemented, the plate member is moved to open the shutter unit, and the tip of the photodetector is inserted into a through hole formed in the top plate, so that the distance between the bottom of the sample container and a sensitive area of the photodetector is reduced to several millimeters or less.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: February 1, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Hideyuki Noda, Satoshi Ozawa, Masahiro Okanojo, Kenko Uchida
  • Publication number: 20100308858
    Abstract: A memory cell mat is divided into a plurality of entries, and an arithmetic logic unit is arranged corresponding to each entry. Between the entries and the corresponding arithmetic logic units, arithmetic/logic operation is executed in bit-serial and entry-parallel manner. Where parallel operation is not very effective, data is transferred in entry-serial and bit-parallel manner to a group of processors provided at a lower portion of the memory mat. In this manner, a large amount of data can be processed at high speed regardless of the contents of operation or data bit width.
    Type: Application
    Filed: August 16, 2010
    Publication date: December 9, 2010
    Applicant: Renesas Technology Corp.
    Inventors: Hideyuki NODA, Kazunori Saitoh, Kazutami Ariomoto, Katsumi Dosaka
  • Patent number: 7820112
    Abstract: A bead array chip manufacturing process for manufacturing a bead array chip having plural kinds of beads arrayed in a predetermined order in, in a container having a plurality of first channels disposed substantially in parallel with each other and a second channel crossing the plurality of first channels, each of the first channels. The process including lowering a capillary inserted in the second channel and sucking and retaining one bead in one end of the capillary, lifting the capillary to position the beads retained in the one end of the capillary in a desired channel of the plurality of first channels, terminating the suction of the capillary, and generating a uniflow of a fluid in the second channel.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: October 26, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Hideyuki Noda, Yoshinobu Kohara
  • Patent number: 7791962
    Abstract: A memory cell mat is divided into a plurality of entries, and an arithmetic logic unit is arranged corresponding to each entry. Between the entries and the corresponding arithmetic logic units, arithmetic/logic operation is executed in bit-serial and entry-parallel manner. Where parallel operation is not very effective, data is transferred in entry-serial and bit-parallel manner to a group of processors provided at a lower portion of the memory mat. In this manner, a large amount of data can be processed at high speed regardless of the contents of operation or data bit width.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: September 7, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Hideyuki Noda, Kazunori Saitoh, Kazutami Ariomoto, Katsumi Dosaka
  • Publication number: 20100216183
    Abstract: The sample container has a two-layer membrane filter comprising a first layer as an upper layer serving as a hydrophilic membrane filter and a hydrophobic membrane filter as an underlying second layer capable of filtering an aqueous solution without the use of a wetting agent and by means of a formed negative pressure. Using this sample container, a large amount of an aqueous sample solution is filtered by means of a negative pressure formed by a suction portion to capture microbes in the aqueous sample solution by the hydrophilic membrane filter. Then, the negative pressure is restored to normal pressure, and a microbial dissolution solution is then added to the membrane filter to retain the microbial dissolution solution for a given time on the hydrophobic membrane filter. Then, the microbial dissolution solution is dispensed to a reaction container containing a luminescent reagent, and luminescence is detected to detect the microbes.
    Type: Application
    Filed: February 26, 2010
    Publication date: August 26, 2010
    Applicant: HITACHI PLANT TECHNOLOGIES, LTD.
    Inventors: Masahiro Okanojo, Hideyuki Noda, Noe Miyashita
  • Publication number: 20100184237
    Abstract: A chemical reaction device is provided for a chemical reaction between molecules immobilized on a solid phase and molecules in a solution, and a chemical analysis device is also provided to capture molecules in the solution by molecules immobilized on the solid phase through a chemical reaction and subsequent measurement of the captured molecules. Reaction efficiency as well as sample throughput are thereby improved. The chemical reaction device and the chemical analysis device use a channel of a microfluidic device for a reaction vessel, and at least a particular molecule is immobilized on an interior surface and a fixed structure or a non-fixed obstacle against a flow is provided in the channel.
    Type: Application
    Filed: December 30, 2009
    Publication date: July 22, 2010
    Inventors: Yoshinobu Kohara, Kazunori Okano, Hideyuki Noda
  • Publication number: 20100179976
    Abstract: A semiconductor device includes a decoder receiving first multiplier data of 3 bits indicating a multiplier to output a shift flag, an inversion flag, and an operation flag in accordance with Booth's algorithm, and a first partial product calculation unit receiving first multiplicand data of 2 bits indicating a multiplicand, a shift flag, an inversion flag, and an operation flag to select one of the higher order bit and lower order bit of the first multiplicand data based on the shift flag, invert or non-invert the selected bit based on the inversion flag, select one of the inverted or non-inverted data and data of a predetermined logic level based on the operation flag, and output the selected data as partial product data indicating the partial product of the first multiplier data and the first multiplicand data.
    Type: Application
    Filed: January 14, 2010
    Publication date: July 15, 2010
    Inventors: Masakatsu ISHIZAKI, Takeshi Kumaki, Masaharu Tagami, Yuta Imai, Tetsushi Koide, Hans Jürgen Mattausch, Takayuki Gyoten, Hideyuki Noda, Yoshihiro Okuno, Kazutami Arimoto
  • Patent number: 7666662
    Abstract: A chemical reaction device is provided for a chemical reaction between molecules immobilized on a solid phase and molecules in a solution, and a chemical analysis device is also provided to capture molecules in the solution by molecules immobilized on the solid phase through a chemical reaction and subsequent measurement of the captured molecules. Reaction efficiency as well as sample throughput are thereby improved. The chemical reaction device and the chemical analysis device use a channel of a microfluidic device for a reaction vessel, and at least a particular molecule is immobilized on an interior surface and a fixed structure or a non-fixed obstacle against a flow is provided in the channel.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: February 23, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinobu Kohara, Kazunori Okano, Hideyuki Noda
  • Publication number: 20090298094
    Abstract: A method of highly sensitive and quantitative luminescent analysis with the use of a detection device using a micro-channel and carrying a molecule which is capable of capturing a substance to be detected and bonded to a solid phase. A biochemical to be detected is captured in a channel-type device having a probe bonded to a solid phase. After labeling for luminescence, a luminescent reagent is flown thereto and the luminescence in the vicinity of the probe is optically detected.
    Type: Application
    Filed: February 10, 2006
    Publication date: December 3, 2009
    Inventors: Yoshinobu Kohara, Hideyuki Noda, Teruyuki Kobayashi, Kunihiro Suto
  • Publication number: 20090298717
    Abstract: There is provided means for analyzing organism-related molecules, dealing with multi item analysis, that are captured according to probe species, and for collecting according to the probe species. A magnetic micro-particle array is fixed with magnets that are configured with magnetic micro-particles in a capillary and with an array of glass beads to which DNA probes of different types from each other are immobilized. A syringe pump and a cross valve are operated to circulate a sample solution in the magnetic micro-particle array, which is reacted with probe DNAs on a glass bead with a probe. Subsequently, a washing solution is introduced to wash inside of the capillary. Next, respective beads are measured for fluorescence intensities. Furthermore a particular bead is collected based on results of fluorescence measurement. Target molecules captured on a surface of the collected bead may be separated by heat-denaturation, which then may be subjected to next analysis.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 3, 2009
    Inventors: Yoshinobu KOHARA, Kazunori OKANO, Hideyuki NODA
  • Patent number: 7562198
    Abstract: A memory cell mat is divided into a plurality of entries, and an arithmetic logic unit is arranged corresponding to each entry. Between the entries and the corresponding arithmetic logic units, arithmetic/logic operation is executed in bit-serial and entry-parallel manner. Where parallel operation is not very effective, data is transferred in entry-serial and bit-parallel manner to a group of processors provided at a lower portion of the memory mat. In this manner, a large amount of data can be processed at high speed regardless of the contents of operation or data bit width.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: July 14, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Hideyuki Noda, Kazunori Saitoh, Kazutami Ariomoto, Katsumi Dosaka
  • Publication number: 20090149350
    Abstract: A bead array chip manufacturing process for manufacturing a bead array chip having plural kinds of beads arrived in a predetermined order in, in a container having a plurality of first channels disposed substantially in parallel with each other and a second channel crossing the plurality of first channels, each of the first channels. The process including lowering a capillary inserted in the second channel and sucking and retaining one bead in one end of the capillary, lifting the capillary to position the beads retained in the one end of the capillary in a desired channel of the plurality of first channels, terminating the suction of the capillary, and generating a uniflow of a fluid in the second channel.
    Type: Application
    Filed: October 17, 2008
    Publication date: June 11, 2009
    Inventors: Hideyuki Noda, Yoshinobu Kohara
  • Publication number: 20090142785
    Abstract: In order to make a process of capturing and testing air-borne microorganisms more convenient and quick, a capturing device which comprises the capturing carrier comprising a polymer which is in a gel phase at the time of capturing the microorganisms but undergoes a phase transition under heating to a sol phase at the temperature at or less than 40° C. (especially in the temperature range between 15° C. and 37° C.), and a vessel to contain the capturing carrier is used. Further, by comprising a test reagent in the polymer, the test reagent can be eluted upon said phase transition from a gel phase to a sol phase. By heating the capturing carrier, a phase transition to a sol phase can occur at or less than 40° C. As such, since recovery of microorganisms and addition of a test reagent to the microorganisms can be carried out simultaneously, the process can be simplified and the process time can be shortened.
    Type: Application
    Filed: November 21, 2008
    Publication date: June 4, 2009
    Applicant: HITACHI PLANT TECHNOLOGIES, LTD.
    Inventors: Noe Osato, Ryusuke Gotoda, Satoshi Ozawa, Hideyuki Noda, Masahiro Okanojo
  • Patent number: 7505352
    Abstract: In a parallel operational processing device having an operational processing unit arranged between memory blocks each having a plurality of memory cells arranged in rows and columns, the respective columns of each memory block are alternately connected to the operational processing units on the opposite sides of the memory block. By selecting one word line in one memory block, data can be transferred to two operational processing units. The number of the word lines selected per one operational processing unit is reduced, and power consumption is reduced. The bit operation units and sense amplifiers/write drivers of the operational processing units have arrangement pitch conditions mitigated and are reduced in number, and an isolation region between the memory blocks is not required and the layout area is reduced. Thus, the parallel operational processing device with a layout area and the power consumption reduced, can achieve a fast operation.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: March 17, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Takayuki Gyoten, Katsumi Dosaka, Hideyuki Noda, Tetsushi Tanizaki
  • Publication number: 20090070525
    Abstract: A CAM (Content Addressable Memory) cell includes first and second data storage portions storing data, horizontal port write gates for storing data applied through a match line pair in the data storage portions in a data write through a horizontal port, and search/read gates for driving the match lines of the match line pair in accordance with the data stored in the data storage portions in a search operation and in a data read through the horizontal port. The match lines are used as horizontal bit line pair, or signal lines for accessing the horizontal port. As the first and second data storage portions are used, it becomes possible to store ternary data, and accordingly, a write mask function of inhibiting a data write at a destination of data transfer is realized. Further, as the CAM cell is used, an arithmetic/logic operation following a search process can be executed selectively, and high speed data writing/reading becomes possible.
    Type: Application
    Filed: November 10, 2008
    Publication date: March 12, 2009
    Applicant: Renesas Technology Corp.
    Inventors: Katsumi DOSAKA, Kazutami Arimoto, Kazunori Saito, Hideyuki Noda
  • Publication number: 20090027978
    Abstract: A memory cell mat is divided into a plurality of entries, and an arithmetic logic unit is arranged corresponding to each entry. Between the entries and the corresponding arithmetic logic units, arithmetic/logic operation is executed in bit-serial and entry-parallel manner. Where parallel operation is not very effective, data is transferred in entry-serial and bit-parallel manner to a group of processors provided at a lower portion of the memory mat. In this manner, a large amount of data can be processed at high speed regardless of the contents of operation or data bit width.
    Type: Application
    Filed: June 16, 2008
    Publication date: January 29, 2009
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Hideyuki Noda, Kazunori Saitoh, Kazutami Ariomoto, Katsumi Dosaka
  • Publication number: 20090020555
    Abstract: The present invention provides an apparatus for efficiently transporting or dispensing transport objects including not only particles but also liquid samples. A liquid in a first liquid transport pipe (3) is fed at a liquid feed velocity (V1), and a liquid droplet is formed toward an open end of a second liquid transport pipe (4) disposed with an air gap (11) in between. The particle is released into the liquid droplet, so that the particle is enclosed in the liquid droplet. Suction with a liquid feed velocity (V2) is applied to the inside of the second liquid transport pipe. Since the relationship between V1 and V2 is V1<V2, the liquid droplet, after reaching the open end (10) of the second liquid transport pipe, is sheared off by suction, thereby forming a liquid section in the second liquid transport pipe.
    Type: Application
    Filed: March 7, 2006
    Publication date: January 22, 2009
    Inventors: Hideyuki Noda, Yoshinobu Kohara, Kenko Uchida
  • Patent number: 7463501
    Abstract: A CAM (Content Addressable Memory) cell includes first and second data storage portions storing data, horizontal port write gates for storing data applied through a match line pair in the data storage portions in a data write through a horizontal port, and search/read gates for driving the match lines of the match line pair in accordance with the data stored in the data storage portions in a search operation and in a data read through the horizontal port. The match lines are used as horizontal bit line pair, or signal lines for accessing the horizontal port. As the first and second data storage portions are used, it becomes possible to store ternary data, and accordingly, a write mask function of inhibiting a data write at a destination of data transfer is realized. Further, as the CAM cell is used, an arithmetic/logic operation following a search process can be executed selectively, and high speed data writing/reading becomes possible.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: December 9, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito, Hideyuki Noda
  • Patent number: 7445755
    Abstract: Provided is a convenient process of manufacturing a two-dimensional bead array on a chip by disposing a plurality of beads immobilized with a biomolecular probe in a bead array container in a predetermined order. The bead array chip is manufactured by repeating the following operations: a container having a plurality of first channels disposed in parallel with each other and a second channel crossing therewith is retained in a container retaining portion and a capillary is moved through the second channel of the container vertically. The capillary is moved downward to suck and retain, in an end thereof, one bead stored in a storing portion of a bead storing plate and then, moved upward to the position of a desired first channel. Under this state, pure water is fed to the first passage from a water feed system and a water stream is generated by sucking the pure water by a suction pump.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: November 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hideyuki Noda, Yoshinobu Kohara
  • Publication number: 20080261294
    Abstract: An apparatus includes a system for guiding chemiluminescence and a system for preventing a variation in dark currents. The apparatus includes a first light shielding BOX having a sample container holder and a shutter unit therein, the shutter unit including a top plate which is partly formed by a movement of a plate member and a second light shielding BOX having a photodetector therein. While a measurement is not implemented, the shutter unit is closed to block entrance of stray light to the photodetector, and while a measurement is implemented, the plate member is moved to open the shutter unit and the tip of the photodetector is inserted into a through hole formed in the top plate, so that the distance between the bottom of the sample container and a sensitive area of the photodetector is reduced to several millimeters or less.
    Type: Application
    Filed: February 21, 2008
    Publication date: October 23, 2008
    Inventors: Hideyuki Noda, Satoshi Ozawa, Masahiro Okanojo, Kenko Uchida