Abstract: There is provided a negative electrode for a lithium-ion secondary battery, including a conductive substrate, a negative electrode active material layer containing a negative electrode active material capable of absorbing and desorbing lithium ions and a conductive member having a lower elastic modulus than that of the conductive substrate, wherein at least part of the negative electrode active material is connected to the conductive substrate via the conductive member. There is also provided a lithium-ion secondary battery with such a negative electrode.

Abstract: A magnetic memory device is provided in which, even when a recording layer having an asymmetric shape and a local via are formed over a strap wiring with a sufficient distance allowed therebetween, increase in the size of the magnetic memory device can be suppressed. The magnetic memory device includes the strap wiring, the local via, and a magnetic recording element (TMR element). The TMR element includes a fixed layer and the recording layer. The planar shape of the recording layer is asymmetric with respect to the direction of the easy magnetization axis of the recording layer and is symmetric with respect to the axis of symmetry perpendicular to the easy magnetization axis. The contoured portion of the recording layer on the side closer to the center of area of the recording layer is opposed to the local via formation side.

Abstract: The invention provides a negative electrode material for use with a lithium-ion capacitor, which is high in energy density, output density and excellent in durability. When graphite of which an average distance between 002 lattice planes thereof is within a range from 0.335 nm to 0.337 nm is used for an active material of a negative electrode of a lithium-ion capacitor, the energy density of the capacitor is increased. The output characteristic and the cycle durability can be improved when D10, D50 and D90 are set within predetermined ranges.

Abstract: The present invention provides a semiconductor device having a nonvolatile memory function capable of shortening an erase time and executing data access efficiently. When, under the control of a command register/control circuit, an erase voltage is applied to an embedded erase gate wiring disposed in a memory cell boundary region, and an electrical charge is transferred between a floating gate and an embedded erase gate to thereby perform an erase operation, a read selection voltage is applied to a memory gate line and an assist gate line during the application of the erase voltage to thereby carry out the reading of data.

Abstract: A magnetic memory device is provided in which, even when a recording layer having an asymmetric shape and a local via are formed over a strap wiring with a sufficient distance allowed therebetween, increase in the size of the magnetic memory device can be suppressed. The magnetic memory device includes the strap wiring, the local via, and a magnetic recording element (TMR element). The TMR element includes a fixed layer and the recording layer. The planar shape of the recording layer is asymmetric with respect to the direction of the easy magnetization axis of the recording layer and is symmetric with respect to the axis of symmetry perpendicular to the easy magnetization axis. The contoured portion of the recording layer on the side closer to the center of area of the recording layer is opposed to the local via formation side.

Abstract: A path routing from a write current source supplying a write current through an internal data line, a bit line and a source line to a reference potential except a memory cell is configured to have a constant resistance independent of a memory cell position selected in a memory array, and each of the resistance value of the current path between the memory cell and the write current source and the resistance value of the current path between the selected memory cell and the reference potential node is set to 500? or lower. A nonvolatile semiconductor memory device having improved reliability of data read/write is achieved.

Abstract: Source lines for a spin injection magnetic memory cell are arranged parallel to word lines for executing writing/reading of data multiple bits at a time. In a write operation, a source line potential changes in a predetermined sequence such that the source line commonly connected to a plurality of selected memory cells is set to pass a current only in one direction in each stage of the operation sequence. For the data write sequence, a current is caused to flow through memory cells according to write data sequentially, or the memory cell has a resistance state set to an initial resistance state before writing, and then changed to a state according to the write data Fast writing can be achieved in the magnetic memory without increasing a memory cell layout area.

Abstract: A path routing from a write current source supplying a write current through an internal data line, a bit line and a source line to a reference potential except a memory cell is configured to have a constant resistance independent of a memory cell position selected in a memory array, and each of the resistance value of the current path between the memory cell and the write current source and the resistance value of the current path between the selected memory cell and the reference potential node is set to 500? or lower. A nonvolatile semiconductor memory device having improved reliability of data read/write is achieved.

Abstract: A tunneling magneto-resistance element is arranged on an upper layer side of a digit line. The tunneling magneto-resistance element is electrically coupled to a source/drain region of an access transistor through a strap and a contact hole. A bit line is electrically coupled to the tunneling magneto-resistance element, and arranged on the upper layer side of the tunneling magneto-resistance element. A plurality of tunneling magneto-resistance elements share one access transistor, so that a non-volatile memory device achieving low area penalty and higher integration can be implemented.

Abstract: The invention provides a negative electrode material for use with a lithium-ion capacitor, which is high in energy density, output density and excellent in durability. When graphite of which an average distance between 002 lattice planes thereof is within a range from 0.335 nm to 0.337 nm is used for an active material of a negative electrode of a lithium-ion capacitor, the energy density of the capacitor is increased. The output characteristic and the cycle durability can be improved when D10, D50 and D90 are set within predetermined ranges.

Abstract: Provided is a battery with a higher capacity and superior charge-discharge cycle characteristics. A cathode contained in a package can and an anode contained in a package cup are laminated with a separator in between. The separator is impregnated with an electrolyte solution formed by dissolving lithium salt in a solvent. The anode comprises a tin-containing material including metallic tin and an intermetallic compound including tin in the same particle. A higher capacity and superior charge-discharge cycles can be obtained by the tin-containing material.

Abstract: During data reading, a sense enable signal is activated to start charging of a data line prior to formation of a current path including the data line and a selected memory cell in accordance with row and column selecting operations. Charging of the data line is completed early so that it is possible to reduce a time required from start of the data reading to such a state that a passing current difference between the data lines reaches a level corresponding to storage data of the selected memory cell, and the data reading can be performed fast.

Abstract: Source lines for a spin injection magnetic memory cell are arranged parallel to word lines for executing writing/reading of data multiple bits at a time. In a write operation, a source line potential changes in a predetermined sequence such that the source line commonly connected to a plurality of selected memory cells is set to pass a current only in one direction in each stage of the operation sequence. For the data write sequence, a current is caused to flow through memory cells according to write data sequentially, or the memory cell has a resistance state set to an initial resistance state before writing, and then changed to a state according to the write data Fast writing can be achieved in the magnetic memory without increasing a memory cell layout area.

Abstract: Normal memory cells and dummy cells are arranged continuously in a memory array. In a data read operation, first and second data lines are connected to the selected memory cell and the dummy cell, respectively, and are supplied with operation currents of a differential amplifier. An offset corresponding to a voltage difference between first and second offset control voltages applied from voltage generating circuits are provided between passing currents of the first and second data lines, and a reference current passing through the dummy cell is set to a level intermediate between two kinds of levels corresponding to storage data of a data read current passing through the selected memory cell.

Abstract: A non-aqueous electrolyte battery includes an cathode having an cathode mixture layer containing an cathode active material; an anode having an anode mixture layer containing an anode active material which includes a first active material and/or a second active material, where the first active material includes a metal, alloy or compound capable of react with lithium, and the second active material includes a carbonaceous material; and a non-aqueous electrolytic solution. By allowing the anode to contain the first active material in a predetermined amount, and by controlling the packing ratio of the anode mixture layer, the anode is successfully prevented from being degraded due to expansion-and-shrinkage of the anode active material in response to the charge/discharge cycle, and thus degradation of the charge/discharge characteristics of the battery is suppressed.

Abstract: A tunneling magneto-resistance element is arranged on an upper layer side of a digit line. The tunneling magneto-resistance element is electrically coupled to a source/drain region of an access transistor through a strap and a contact hole. A bit line is electrically coupled to the tunneling magneto-resistance element, and arranged on the upper layer side of the tunneling magneto-resistance element. A plurality of tunneling magneto-resistance elements share one access transistor, so that a non-volatile memory device achieving low area penalty and higher integration can be implemented.

Abstract: A path routing from a write current source supplying a write current through an internal data line, a bit line and a source line to a reference potential except a memory cell is configured to have a constant resistance independent of a memory cell position selected in a memory array, and each of the resistance value of the current path between the memory cell and the write current source and the resistance value of the current path between the selected memory cell and the reference potential node is set to 500? or lower. A nonvolatile semiconductor memory device having improved reliability of data read/write is achieved.

Abstract: During data reading, a sense enable signal is activated to start charging of a data line prior to formation of a current path including the data line and a selected memory cell in accordance with row and column selecting operations. Charging of the data line is completed early so that it is possible to reduce a time required from start of the data reading to such a state that a passing current difference between the data lines reaches a level corresponding to storage data of the selected memory cell, and the data reading can be performed fast.

Abstract: A programming circuit includes an LT fuse read circuit programming a defective address during a wafer-processing, an electrical fuse circuit electrically programming a defective address, an electrical fuse circuit storing therein whether the electrical fuse circuit is used, a select circuit receiving data programmed by the LT fuse and that programmed by the electrical fuse for switch and output, an electrical fuse circuit designating a switching of the select circuit, and a repair decision circuit comparing an output received from the select circuit and an input address received from the address buffer.

Abstract: Disclosed is a non-aqueous electrolyte secondary battery having an excellent preservation characteristic at a high temperature and charging/discharging cycle characteristic. A rolled body in which a strip-shape positive electrode and negative electrode are rolled with a separator in-between is provided inside a battery can. The positive electrode contains LixMn2?yMayO4 (where, Ma is at least one element selected from the group consisting of metal elements other than Mn, and B) and LiNi1?zMbzO2 (where, Mb is at least one element selected from the group consisting of metal elements other than Ni, and B). By replacing part of Mn and Ni with other elements, the crystal structure can be stabilized. Thereby, the capacity retention ratio after preservation at a high temperature, and a heavy load discharging power under a high electric potential cutoff can be improved.