Patents by Inventor Hiroshi Tanabe

Hiroshi Tanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110001141
    Abstract: A manufacturing method for a semiconductor device, the method including forming a thin film transistor by forming a polysilicon thin film on an insulating substrate, forming a gate electrode via a gate insulating film, and forming source/drain regions and a channel region by ion implantation in the polysilicon thin film by using the gate electrode as a mask, forming an interconnection layer on an interlayer dielectric film covering this thin film transistor and forming a first contact to be connected to the thin film transistor through the interlayer dielectric film, forming a silicon hydronitride film on the interlayer dielectric film so as to cover the interconnection layer, forming a lower electrode on this silicon hydronitride film and forming a second contact to be connected to the interconnection layer through the silicon hydronitride film, and forming a ferroelectric layer on the lower electrode.
    Type: Application
    Filed: September 13, 2010
    Publication date: January 6, 2011
    Applicant: NEC Corporation
    Inventor: Hiroshi Tanabe
  • Patent number: 7833634
    Abstract: Provided a novel 1,8-naphthyridine compound represented by the following general formula [I]: wherein R1 to R6 each represent a hydrogen atom; an alkyl group, a halogen atom; a trifluoromethyl group; and a cyano group, and may be the same as or different from one another, and that at least two of R1 to R6 each represent an aralkyl group, an aryl group, a heterocyclic group, a condensed polycyclic aromatic group, a condensed polycyclic heterocyclic group and an aryloxy group which may be substituted; and a substituted amino group. The 1,8-naphthyridine is employed in an organic compound layer provided between a pair of electrodes in an organic light-emitting device.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: November 16, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichi Suzuki, Hiroshi Tanabe, Chika Negishi, Taiki Watanabe, Akihiro Senoo, Kazunori Ueno
  • Patent number: 7816716
    Abstract: Source/drain diffusion layers and a channel region are formed in a polysilicon thin film formed on a substrate made of glass or the like, and furthermore, a gate electrode 6 is formed via a gate insulating film. A silicon hydronitride film is formed on the interlayer dielectric film, whereby the hydrogen concentration in an active element region including a switching thin film transistor can be maintained at a high level, and Si—H bonds in the silicon thin film become stable. In addition, by providing a ferroelectric film on the silicon hydronitride film via a lower electrode formed of a conductive oxide film, whereby the oxygen concentration of the ferroelectric capacitive element layer can be maintained at a high level, and generation of oxygen deficiency in the ferroelectric film is prevented.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: October 19, 2010
    Assignee: NEC Corporation
    Inventor: Hiroshi Tanabe
  • Patent number: 7794857
    Abstract: The present invention has an object to provide an organic light emitting device array whose power source voltage is not raised. The difference in ionization potential between a host material and a hole transport layer and the difference in electron affinity between a host material and of an electron transport layer are set in a favorable range for all organic light emitting devices which emit light of different colors.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: September 14, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Tanabe, Akihiro Senoo, Akihito Saitoh
  • Publication number: 20100208187
    Abstract: A liquid crystal display device of IPS mode includes an array of pixels arranged in a matrix pattern by crossing a plurality of video signal lines and a plurality of scanning signal lines each other. Each of the pixels is provided with at least a switching element. A transparent insulating film is provided on both signal lines, and a plurality of pixel electrodes, common electrodes and common lines are provided on the transparent insulating film. The common lines are formed in a grid-shaped pattern such that a first group of the common lines is made of a first conductor having lower reflectivity against optical light than that of metal while a second group of the common lines is made of a second conductor including a metal layer such that the first group and the second group are crossing each other along the video signal lines and the scanning signal lines.
    Type: Application
    Filed: February 16, 2010
    Publication date: August 19, 2010
    Applicant: NEC LCD Technologies, Ltd.
    Inventors: Soichi Saito, Shinya Niioka, Masayuki Jumonji, Hiroshi Tanabe, Masamichi Shimoda
  • Publication number: 20100202041
    Abstract: When a semiconductor device 11 is observed, first, when it is detected that a solid immersion lens 6 comes into contact with the semiconductor device 11, the solid immersion lens 6 is caused to vibrate by a vibration generator unit. Next, a reflected light image from the solid immersion lens 6 is input to calculate a reflected light quantity m of the reflected light image, and it is judged whether a ratio (m/n) of the reflected light quantity m to an incident light quantity n is not greater than a threshold value A. When the ratio (m/n) is greater than the threshold value A, it is judged that optical close contact between the solid immersion lens 6 and the semiconductor device 11 is not achieved, and the solid immersion lens 6 is again caused to vibrate. When the ratio (m/n) is not greater than the threshold value A, it is judged that optical close contact between the solid immersion lens 6 and the semiconductor device 11 is achieved, and an observed image of the semiconductor device 11 is acquired.
    Type: Application
    Filed: June 13, 2008
    Publication date: August 12, 2010
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Hirotoshi Terada, Hiroshi Tanabe
  • Publication number: 20100172035
    Abstract: A solid immersion lens holder 200 includes a holder main body 8 having a lens holding unit 60 that holds a solid immersion lens 6, and an objective lens socket 9 for attaching the holder main body 8 to a front end of an objective lens 21. The solid immersion lens 6 is held in a state of being unfixed to be free with respect to the lens holding unit 60. A vibration generator unit 120 that causes the holder main body 8 to vibrate is attached to the objective lens socket 9. The vibration generator unit 120 has a vibrating motor 140 held by a motor holding member 130, and a weight 142 structured to be eccentric by weight is attached to an output shaft 141 of the vibrating motor 140. A vibration generated in the vibration generator unit 120 is transmitted to the solid immersion lens 6 via the objective lens socket 9 and the holder main body 8. Thereby, achieving the solid immersion lens holder capable of improving the close contact between the solid immersion lens and an observation object.
    Type: Application
    Filed: June 13, 2008
    Publication date: July 8, 2010
    Applicant: Hamamatsu Photonics K.K.
    Inventors: Hirotoshi Terada, Hiroshi Tanabe
  • Patent number: 7691491
    Abstract: Novel monoaminofluorene compounds are provided, and organic light-emitting devices which exhibit good luminescence hue of extremely high purity and have optical output with high luminescence efficiency, high luminance and longer operating life are provided using the compounds.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: April 6, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akihito Saitoh, Mizuho Hiraoka, Koichi Suzuki, Akihiro Senoo, Hiroshi Tanabe, Naoki Yamada, Chika Negishi
  • Publication number: 20100043702
    Abstract: A method for manufacturing a semiconductor thin film is provided which can form its crystal grains having a uniform direction of crystal growth and being large in size and a manufacturing equipment using the above method, and a method for manufacturing a thin film transistor. In the above method, by applying an energy beam partially intercepted by a light shielding element, melt and re-crystallization occur with a light-shielded region as a starting point. The irradiation of the beam gives energy to the light-shielded region of the silicon thin film so that melt and re-crystallization occur with the light-shielded region as the starting point and so that a local temperature gradient in the light-shielded region is made to be 1200° C./?m or more. In the manufacturing method, a resolution of an optical system used to apply the energy beam is preferably 4 ?m or less.
    Type: Application
    Filed: October 30, 2009
    Publication date: February 25, 2010
    Inventor: Hiroshi Tanabe
  • Publication number: 20100006776
    Abstract: A thin film processing method for processing the thin film by irradiating the optical beam to the thin film, wherein one set of irradiation includes the first optical pulse irradiation to the thin film and the second optical pulse irradiation to the thin film which substantially starts with a delay to the first optical pulse irradiation, the one set of irradiation being repetitively carried out for processing the thin film, and the relationship between the first and the second pulse satisfies (the pulse width of the first optical pulse)>(the pulse width of the second optical pulse). Preferably, the relationship between the first and the second pulse satisfies (the irradiation intensity of the first optical pulse)?(the irradiation intensity of the second optical pulse). A silicon thin film with a small trap state density is thus manufactured by the optical irradiation.
    Type: Application
    Filed: July 8, 2009
    Publication date: January 14, 2010
    Applicants: NEC CORPORATION
    Inventors: Hiroshi Tanabe, Akihiko Taneda
  • Patent number: 7637990
    Abstract: An air vent apparatus for a water tube, comprising: an air separator pipe installed to have an axial direction along a vertical direction, and connected to a portion, where an air reservoir tends to occur, of the water tube for passage of water; and air vent means for venting air accumulating in the air separator pipe.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: December 29, 2009
    Assignee: Mitsubishi Heavy Industries
    Inventors: Hiroshi Tanabe, Yasuhiro Hashimoto
  • Publication number: 20090314001
    Abstract: An object of the present invention is to provide a method of starting and stopping a gas turbine and a start-and-stop control device, which are capable of solving a problem of a failure in normally igniting a fuel gas due to a purge gas (nitrogen gas) remaining in a fuel gas pipe and thereby igniting the fuel gas stably.
    Type: Application
    Filed: September 19, 2007
    Publication date: December 24, 2009
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Satoshi Tanaka, Hiroshi Tanabe, Yasuhiro Hashimoto
  • Patent number: 7635894
    Abstract: A method for manufacturing a semiconductor thin film is provided which can form its crystal grains having a uniform direction of crystal growth and being large in size and a manufacturing equipment using the above method, and a method for manufacturing a thin film transistor. In the above method, by applying an energy beam partially intercepted by a light shielding element, melt and re-crystallization occur with a light-shielded region as a starting point. The irradiation of the beam gives energy to the light-shielded region of the silicon thin film so that melt and re-crystallization occur with the light-shielded region as the starting point and so that a local temperature gradient in the light-shielded region is made to be 1200° C./?m or more. In the manufacturing method, a resolution of an optical system used to apply the energy beam is preferably 4 ?m or less.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: December 22, 2009
    Assignee: NEC Corporation
    Inventor: Hiroshi Tanabe
  • Patent number: 7632577
    Abstract: To provide an organic light-emitting device that exhibits the hue of light emission having extremely high purity and has a light output having high luminance and long life with a high degree of efficiency. The organic light-emitting device comprises at least a pair of electrodes consisting of an anode and a cathode and one or more organic compound-containing layers sandwiched between the pair of electrodes, wherein at least one of the above described organic compound-containing layers contains at least one compound selected from the group consisting of the compounds represented by the following general formula [1] and at least one compound selected from the group consisting of the compounds represented by the following general formula [2].
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: December 15, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akihito Saitoh, Mizuho Hiraoka, Koichi Suzuki, Akihiro Senoo, Hiroshi Tanabe, Naoki Yamada, Chika Negishi
  • Patent number: 7633571
    Abstract: Recognizing the phenomenon that the film thickness of a semiconductor layer causes shift in the OFF-leak current characteristic that corresponds to back-gate voltage of a thin-film transistor, the average film thickness of a semiconductor layer is prescribed such that the shift of the OFF-leak current characteristic is reduced. Alternatively, the film thickness distribution (the ratio of the occurrence of each region having different film thickness) in the direction of the channel width of the semiconductor layer is prescribed.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: December 15, 2009
    Assignee: NEC Corporation
    Inventors: Takahiro Korenari, Hiroshi Tanabe, Nobuya Seko
  • Patent number: 7626648
    Abstract: A pixel circuit substrate includes a first interlayer insulating film which is made of an inorganic material at least in a source and drain regions of a thin film transistor. A contact hole is formed in an area above the source and drain regions of a thin film transistor in the first interlayer insulating film. A wiring layer is formed on the first interlayer insulating film, extends to an inner wall and a bottom surface of the contact hole. On a top surface of the wiring layer is formed a recess reflecting the shape of a contact hole. A second interlayer insulating film is formed on the wiring layer, embedded in the recess and has a flat top surface in an area above the thin film transistor. A storage capacitor on the second interlayer insulating film is disposed in the area above the thin film transistor.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: December 1, 2009
    Assignee: NEC Corporation
    Inventors: Kunihiro Shiota, Hiroshi Tanabe
  • Publication number: 20090286374
    Abstract: A base layer is formed on an insulating substrate, and a semiconductor layer is formed in localized fashion thereon. A gate insulating film is then formed so as to cover the semiconductor layer, and a gate electrode is formed on a portion of the gate insulating film. An impurity is then implanted into the semiconductor layer via the gate insulating film, and a source region, a drain region, and an LDD region are formed. The gate insulating film is etched with dilute hydrofluoric acid. An electrode-protecting insulating film is then formed so as to cover the gate electrode, and the entire surface of the surface layer portion of the electrode-protecting insulating film is etched away using dilute hydrofluoric acid. Carrier traps introduced into the electrode-protecting insulating film and the gate insulating film are thereby removed.
    Type: Application
    Filed: July 24, 2009
    Publication date: November 19, 2009
    Applicants: NEC CORPORATION, NEC LCD TECHNOLOGIES, LTD
    Inventors: Shigeru MORI, Takahiro KORENARI, Tadahiro MATSUZAKI, Hiroshi TANABE
  • Publication number: 20090286341
    Abstract: A pixel circuit substrate includes a first interlayer insulating film which is made of an inorganic material at least in a source and drain regions of a thin film transistor. A contact hole is formed in an area above the source and drain regions of a thin film transistor in the first interlayer insulating film. A wiring layer is formed on the first interlayer insulating film, extends to an inner wall and a bottom surface of the contact hole. On a top surface of the wiring layer is formed a recess reflecting the shape of a contact hole. A second interlayer insulating film is formed on the wiring layer, embedded in the recess and has a flat top surface in an area above the thin film transistor. A storage capacitor on the second interlayer insulating film is disposed in the area above the thin film transistor.
    Type: Application
    Filed: July 28, 2009
    Publication date: November 19, 2009
    Applicant: NEC Corporation
    Inventors: Kunihiro Shiota, Hiroshi Tanabe
  • Patent number: 7585708
    Abstract: A thin-film transistor is formed on a transparent substrate and has a gate electrode film layer and a source and drain regions, and further has an alignment mark made of one and the same constituent material as a constituent material of at least one of the gate electrode film layer and source and drain regions and formed at one and the same position as the gate electrode film layer or source and drain region.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: September 8, 2009
    Assignee: NEC Corporation
    Inventors: Yoshinobu Satou, Katsuhisa Yuda, Hiroshi Tanabe
  • Patent number: 7582933
    Abstract: A base layer is formed on an insulating substrate, and a semiconductor layer is formed in localized fashion thereon. A gate insulating film is then formed so as to cover the semiconductor layer, and a gate electrode is formed on a portion of the gate insulating film. An impurity is then implanted into the semiconductor layer via the gate insulating film, and a source region, a drain region, and an LDD region are formed. The gate insulating film is etched with dilute hydrofluoric acid. An electrode-protecting insulating film is then formed so as to cover the gate electrode, and the entire surface of the surface layer portion of the electrode-protecting insulating film is etched away using dilute hydrofluoric acid. Carrier traps introduced into the electrode-protecting insulating film and the gate insulating film are thereby removed.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: September 1, 2009
    Assignees: NEC Corporation, NEC LCD Technologies, Ltd
    Inventors: Shigeru Mori, Takahiro Korenari, Tadahiro Matsuzaki, Hiroshi Tanabe