Abstract: A negative feedback inductor and a gate inductor are formed in different wiring layers of a substrate so as to be at least partially overlapped with each other in a plan view. When the lower wiring layer is thinner and the upper wiring layer is thicker, the negative feedback inductor Lc is formed in the lower wiring layer that is thinner.

Abstract: A chain guide and tensioning apparatus is disclosed that is configured for engagement (contact) with a driven chain (e.g., in an automotive engine). The chain guide and tensioning apparatus includes a guide body and a guide face overlying the guide body. The guide face defines an inner surface and an opposite outer surface that is configured to guide and tension the driven chain. The guide face includes a plurality of spacers that extend therefrom into engagement (contact) with the guide body so as to define at least one channel that is configured to facilitate air and/or lubricant circulation between the guide body and the guide face to reduce heat and friction generated by engagement of the driven chain with the guide face.

Abstract: A digital signal process unit includes a first cancel signal generation unit and a second cancel signal generation unit. The first cancel signal generation unit generates, as a first cancel signal component, a cancel signal component corresponding to an image signal included in an analog signal output from a mixer. The second cancel signal generation unit generates, as a second cancel signal component, a cancel signal component corresponding to a leakage signal generated between an input and output of the mixer. The digital signal process unit includes subtractors for subtracting the first cancel signal component and the second cancel signal component from a signal component corresponding to a frequency band divided from an input signal to obtain a digital signal.

Abstract: Provided is a track-and-hold circuit capable of reducing the power consumption of a differential amplifier circuit while preserving the broadband nature (without narrowing the bandwidth). In the track-and-hold circuit 1 including a differential amplifier circuit 10, a switch circuit 20, and a hold capacitor C21, the differential amplifier circuit 10 includes a first resistor R11 having one end connected to a collector electrode of a first transistor Q11 constituting a differential pair, a second resistor R12 having one end connected to the collector electrode of a second transistor Q12 constituting the differential pair, and a third resistor R13 to which the other end of the first resistor R11 and the other end of the second resistor R12 are connected and which is connected between the other ends and a power supply VCC.

Abstract: An amplifier output from an amplifier to an SR latch is used as a feedback signal through a buffer. An adder having a combination of an addition unit and an xh block is provided within the amplifier and transmits a feedback signal (analog signal) generated from the feedback signal FBD (digital signal) by the xh block to the addition unit and adds it to an output from a latch block. In the amplifier, the operation for adding the output from the latch block and the feedback signal occurs during a latch operation in the latch block.

Abstract: An embodiment target time comparison circuit corresponding to a target approximate voltage range among 2K time comparison circuits in a second comparison circuit compares a comparison operation time difference included in voltage comparison results regarding two adjacent approximate voltage ranges that are vertically adjacent to the target approximate voltage range with 2L reference times corresponding to 2L specific voltage ranges and generates a target binary code of L bits indicating a target specific voltage range including the held voltage from the obtained time comparison results.

Abstract: A negative feedback inductor and a gate inductor are formed in different wiring layers of a substrate so as to be at least partially overlapped with each other in a plan view. When the lower wiring layer is thinner and the upper wiring layer is thicker, the negative feedback inductor Lc is formed in the lower wiring layer that is thinner.

Abstract: An embodiment target time comparison circuit corresponding to a target approximate voltage range among 2K time comparison circuits in a second comparison circuit compares a comparison operation time difference included in voltage comparison results regarding two adjacent approximate voltage ranges that are vertically adjacent to the target approximate voltage range with 2L reference times corresponding to 2L specific voltage ranges and generates a target binary code of L bits indicating a target specific voltage range including the held voltage from the obtained time comparison results.

Abstract: An amplifier output from an amplifier to an SR latch is used as a feedback signal through a buffer. An adder having a combination of an addition unit and an xh block is provided within the amplifier and transmits a feedback signal (analog signal) generated from the feedback signal FBD (digital signal) by the xh block to the addition unit and adds it to an output from a latch block. In the amplifier, the operation for adding the output from the latch block and the feedback signal occurs during a latch operation in the latch block.

Abstract: A chain guide and tensioning apparatus is disclosed that is configured for engagement (contact) with a driven chain (e.g., in an automotive engine). The chain guide and tensioning apparatus includes a guide body and a guide face overlying the guide body. The guide face defines an inner surface and an opposite outer surface that is configured to guide and tension the driven chain. The guide face includes a plurality of spacers that extend therefrom into engagement (contact) with the guide body so as to define at least one channel that is configured to facilitate air and/or lubricant circulation between the guide body and the guide face to reduce heat and friction generated by engagement of the driven chain with the guide face.

Abstract: A track-and-hold circuit with a high sampling rate and reduced power consumption is provided. A track-and-hold circuit performing switching between a track mode in which a data signal that is equivalent to an input data signal is output and a hold mode in which a data signal which is input at a time of switching from the track mode to the hold mode is held and output, by using a clock signal, such that only the data signal in the hold mode is output, the track-and-hold circuit including: two sampling circuits configured to be connected in parallel to an input of the data signal and receive an in-phase data signal; a clock circuit configured to input a clock signal, which has a phase opposite to a phase of a clock signal input to one of the two sampling circuits, to the other of the two sampling circuits; and a multiplexer circuit configured to select and output a data output of either one of the two sampling circuits that is in the hold mode, by using the clock signal.

Abstract: A digital signal process unit includes a first cancel signal generation unit and a second cancel signal generation unit. The first cancel signal generation unit generates, as a first cancel signal component, a cancel signal component corresponding to an image signal included in an analog signal output from a mixer. The second cancel signal generation unit generates, as a second cancel signal component, a cancel signal component corresponding to a leakage signal generated between an input and output of the mixer. The digital signal process unit includes subtractors for subtracting the first cancel signal component and the second cancel signal component from a signal component corresponding to a frequency band divided from an input signal to obtain a digital signal.

Abstract: Provided is a track-and-hold circuit capable of reducing the power consumption of a differential amplifier circuit while preserving the broadband nature (without narrowing the bandwidth). In the track-and-hold circuit 1 including a differential amplifier circuit 10, a switch circuit 20, and a hold capacitor C21, the differential amplifier circuit 10 includes a first resistor R11 having one end connected to a collector electrode of a first transistor Q11 constituting a differential pair, a second resistor R12 having one end connected to the collector electrode of a second transistor Q12 constituting the differential pair, and a third resistor R13 to which the other end of the first resistor R11 and the other end of the second resistor R12 are connected and which is connected between the other ends and a power supply VCC.

Abstract: A track-and-hold circuit with a high sampling rate and reduced power consumption is provided. A track-and-hold circuit performing switching between a track mode in which a data signal that is equivalent to an input data signal is output and a hold mode in which a data signal which is input at a time of switching from the track mode to the hold mode is held and output, by using a clock signal, such that only the data signal in the hold mode is output, the track-and-hold circuit including: two sampling circuits configured to be connected in parallel to an input of the data signal and receive an in-phase data signal; a clock circuit configured to input a clock signal, which has a phase opposite to a phase of a clock signal input to one of the two sampling circuits, to the other of the two sampling circuits; and a multiplexer circuit configured to select and output a data output of either one of the two sampling circuits that is in the hold mode, by using the clock signal.

Abstract: To simplify a structure and reduce costs. A shoe for a chain guide or for a chain tensioner arm is constructed. Here, a shoe (3) has a chain sliding surface (30) on which a chain slides. A locking protrusion such as a clip, a tab or a hook for locking the shoe (3) to a tensioner arm main body (2) of a chain tensioner arm (1) is not provided on an end surface of the shoe (3) or on a surface on the rear side of the chain sliding surface (30). Furthermore, the shoe (3) has a uniform cross-sectional shape over the whole length and extends linearly in the longitudinal direction.

Abstract: A target injector valve opening period is calculated based on a target fuel injection amount, and an injector (2) is controlled by a current supply control unit (51) in accordance with an injector drive period acquired based on the target injector valve opening period. An actual valve closing delay period is calculated based on a drive waveform of the injector (2) at this time, and a difference between an actual valve closing delay period and a valve closing delay period calculated from a target injector valve opening period is learned. Then, the injector drive period is corrected by feedback control using a result of this learning.

Abstract: A microcomputer is configured to: calculate, the drive period of a previous injection, an injection interval, and an uncorrected target drive period for a current injection; obtain a correction period by increasing an internal variable from zero in proportion to the drive period of the previous injection during this drive period, attenuating the internal variable at a first-order delay during the injection interval, dividing the internal variable by a coefficient of the proportion at a start time point of the present current supply, and setting a result of the division as the correction period; and set a period obtained by subtracting the correction period from the uncorrected target drive period as a current drive period, to thereby supply a signal indicating the current drive period to the injector via a driver.

Abstract: An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.

Abstract: A microcomputer is configured to: calculate, the drive period of a previous injection, an injection interval, and an uncorrected target drive period for a current injection; obtain a correction period by increasing an internal variable from zero in proportion to the drive period of the previous injection during this drive period, attenuating the internal variable at a first-order delay during the injection interval, dividing the internal variable by a coefficient of the proportion at a start time point of the present current supply, and setting a result of the division as the correction period; and set a period obtained by subtracting the correction period from the uncorrected target drive period as a current drive period, to thereby supply a signal indicating the current drive period to the injector via a driver.

Abstract: A target injector valve opening period is calculated based on a target fuel injection amount, and an injector (2) is controlled by a current supply control unit (51) in accordance with an injector drive period acquired based on the target injector valve opening period. An actual valve closing delay period is calculated based on a drive waveform of the injector (2) at this time, and a difference between an actual valve closing delay period and a valve closing delay period calculated from a target injector valve opening period is learned. Then, the injector drive period is corrected by feedback control using a result of this learning.