Patents by Inventor Hiroyuki Fukuyama
Hiroyuki Fukuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9879763Abstract: A chain guide includes a curved guide base extending along the direction in which a torque transmitting chain moves. The guide base includes, on its surface opposed to the chain, a rolling guide portion including a plurality of roller element bearings which are rotatable and configured to guide the chain while kept in rolling contact with the chain, and a sliding guide portion in the form of a curved surface. The rolling guide portion reduces a loss in torque transmission, while the sliding guide portion reduces flapping of the chain, thus reducing noise and vibrations of the chain.Type: GrantFiled: March 27, 2015Date of Patent: January 30, 2018Assignees: NTN CORPORATION, BORGWARNER MORSE SYSTEMS JAPAN K.K.Inventors: Akio Kato, Takahiro Yamashita, Hisataka Hasegawa, Shinji Tsuruta, Hiroyuki Fukuyama, Nobuhiro Mizuno
-
Publication number: 20170350474Abstract: To simplify a structure and reduce costs. A shoe for a chain guide or for a chain tensioner arm is constructed. Here, a shoe (3) has a chain sliding surface (30) on which a chain slides. A locking protrusion such as a clip, a tab or a hook for locking the shoe (3) to a tensioner arm main body (2) of a chain tensioner arm (1) is not provided on an end surface of the shoe (3) or on a surface on the rear side of the chain sliding surface (30). Furthermore, the shoe (3) has a uniform cross-sectional shape over the whole length and extends linearly in the longitudinal direction.Type: ApplicationFiled: October 20, 2015Publication date: December 7, 2017Inventor: Hiroyuki FUKUYAMA
-
Publication number: 20170248205Abstract: A chain guide and tensioning apparatus (10) for reducing friction and heat generated by said chain guide and tensioning apparatus (10) engaging a driven chain (16). A guide body (12) has an engagement surface (26) and a first aperture (54) extending through the guide body (12) and opening into the engagement surface (26). A guide face (14) at least partially overlays the engagement surface (26) and has a contact surface (44) configured to guide and tension the driven chain (16). A first recessed groove (46) is formed on the contact surface (44) and is in communication with at least one second aperture (48) extending through the guide face (14). The first aperture (54) is adaptable to receive and communicate oil from an oil source to the second aperture (48) and the first recessed groove (46) for reducing friction and heat from guiding and tensioning the driven chain (16).Type: ApplicationFiled: August 27, 2015Publication date: August 31, 2017Inventors: Alan L. MOSTER, Hiroyuki FUKUYAMA, Timothy K. WHITE
-
Publication number: 20170152922Abstract: A chain guide includes a curved guide base extending along the direction in which a torque transmitting chain moves. The guide base includes, on its surface opposed to the chain, a rolling guide portion including a plurality of roller element bearings which are rotatable and configured to guide the chain while kept in rolling contact with the chain, and a sliding guide portion in the form of a curved surface. The rolling guide portion reduces a loss in torque transmission, while the sliding guide portion reduces flapping of the chain, thus reducing noise and vibrations of the chain.Type: ApplicationFiled: March 27, 2015Publication date: June 1, 2017Inventors: Akio KATO, Takahiro YAMASHITA, Hisataka HASEGAWA, Shinji TSURUTA, Hiroyuki FUKUYAMA, Nobuhiro MIZUNO
-
Patent number: 9614124Abstract: A substrate having an annealed AlN layer includes a substrate made of a material selected from among a group including sapphire, silicon carbide (SiC), and aluminum nitride (AlN), and an aluminum nitride (AlN) layer formed on the substrate and having a thickness of 100 nm or greater. The aluminum nitride layer is annealed at a prescribed annealing temperature and in a nitrogen/carbon monoxide (N2/CO) mixed gas atmosphere, and the nitrogen/carbon monoxide (N2/CO) mixed gas has a mixture ratio of N2 gas/CO gas in a range of 0.95/0.05 to 0.4/0.6.Type: GrantFiled: February 27, 2015Date of Patent: April 4, 2017Assignees: TOHOKU UNIVERSITY, MIE UNIVERSITYInventors: Hiroyuki Fukuyama, Hideto Miyake
-
Publication number: 20160254411Abstract: A substrate having an annealed AlN layer includes a substrate made of a material selected from among a group including sapphire, silicon carbide (SiC), and aluminum nitride (AlN), and an aluminum nitride (AlN) layer formed on the substrate and having a thickness of 100 nm or greater. The aluminum nitride layer is annealed at a prescribed annealing temperature and in a nitrogen/carbon monoxide (N2/CO) mixed gas atmosphere, and the nitrogen/carbon monoxide (N2/CO) mixed gas has a mixture ratio of N2 gas/CO gas in a range of 0.95/0.05 to 0.4/0.6.Type: ApplicationFiled: February 27, 2015Publication date: September 1, 2016Applicants: TOHOKU UNIVERSITY, MIE UNIVERSITYInventors: Hiroyuki FUKUYAMA, Hideto MIYAKE
-
Publication number: 20160087727Abstract: An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.Type: ApplicationFiled: May 9, 2014Publication date: March 24, 2016Inventors: Munehiko Nagatani, Hideyuki Nosaka, Toshihiro Itoh, Koichi Murata, Hiroyuki Fukuyama, Takashi Saida, Shin Kamei, Hiroshi Yamazaki, Nobuhiro Kikuchi, Hiroshi Koizumi, Masafumi Nogawa, Hiroaki Katsurai, Hiroyuki Uzawa, Tomoyoshi Kataoka, Naoki Fujiwara, Hiroto Kawakami, Kengo Horikoshi, Yves Bouvier, Mikio Yoneyama, Shigeki Aisawa, Masahiro Suzuki
-
Patent number: 9143110Abstract: An automatic gain control circuit (5a) includes a peak detector circuit (10) that detects the peak voltage of the output signal from a variable gain amplifier (3), an average value detection and output amplitude setting circuit (11) that detects the average voltage of the output signals from the variable gain amplifier (3) and adds a voltage ½ the desired output amplitude of the variable gain amplifier (3) to the average voltage, and a high gain amplifier (12) that amplifies the difference between the output voltage of the peak detector circuit (10) and the output voltage of the average value detection and output amplitude setting circuit (11) and controls the gain of the variable gain amplifier (3) using the amplification result as a gain control signal. The peak detector circuit (10) includes transistors (Q1, Q2, Q3), a current source (I1), and a filter circuit. The filter circuit includes a series connection of a resistor (Ra) and a capacitor (C1).Type: GrantFiled: June 29, 2012Date of Patent: September 22, 2015Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Kimikazu Sano, Hiroyuki Fukuyama, Makoto Nakamura, Hideyuki Nosaka, Miwa Mutoh, Koichi Murata
-
Patent number: 8735905Abstract: Provided is a method for producing inexpensive and high-quality aluminum nitride crystals. Gas containing N atoms is introduced into a melt of a Ga—Al alloy, whereby aluminum nitride crystals are made to epitaxially grow on a seed crystal substrate in the melt of the Ga—Al alloy. A growth temperature of aluminum nitride crystals is set at not less than 1000 degrees C. and not more than 1500 degrees C., thereby allowing GaN to be decomposed into Ga metal and nitrogen gas.Type: GrantFiled: July 14, 2011Date of Patent: May 27, 2014Assignees: Sumitomo Metal Mining Co., Ltd., Tohoku UniversityInventors: Hiroyuki Fukuyama, Masayoshi Adachi, Akikazu Tanaka, Kazuo Maeda
-
Publication number: 20140097901Abstract: An automatic gain control circuit (5a) includes a peak detector circuit (10) that detects the peak voltage of the output signal from a variable gain amplifier (3), an average value detection and output amplitude setting circuit (11) that detects the average voltage of the output signals from the variable gain amplifier (3) and adds a voltage ½ the desired output amplitude of the variable gain amplifier (3) to the average voltage, and a high gain amplifier (12) that amplifies the difference between the output voltage of the peak detector circuit (10) and the output voltage of the average value detection and output amplitude setting circuit (11) and controls the gain of the variable gain amplifier (3) using the amplification result as a gain control signal. The peak detector circuit (10) includes transistors (Q1, Q2, Q3), a current source (I1), and a filter circuit. The filter circuit includes a series connection of a resistor (Ra) and a capacitor (C1).Type: ApplicationFiled: June 29, 2012Publication date: April 10, 2014Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Kimikazu Sano, Hiroyuki Fukuyama, Makoto Nakamura, Hideyuki Nosaka, Miwa Mutoh, Koichi Murata
-
Patent number: 8593201Abstract: In a signal output circuit, an input buffer externally receives a single-phase switching instruction signal to switch a state of the output circuit a shutdown disable state or a shutdown enable state, and converts and outputs the single-phase switching instruction signal into a differential switching instruction signal. A generation control circuit outputs a generation control signal for controlling generation of a control voltage in the control voltage generation circuit based on the differential switching instruction signal. A control voltage generation circuit outputs the control voltage upon changing a value of the control voltage in accordance with a logic of the single-phase switching instruction signal. An output circuit externally receives a differential input signal, outputs a differential output signal upon impedance-converting the differential input signal, and switches between the shutdown disable state and the shutdown enable state of the differential input signal.Type: GrantFiled: June 19, 2012Date of Patent: November 26, 2013Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Kimikazu Sano, Hiroyuki Fukuyama, Hideyuki Nosaka, Makoto Nakamura, Koichi Murata, Masatoshi Tobayashi, Eisuke Tsuchiya
-
Patent number: 8593223Abstract: In an automatic gain control circuit, a peak detection circuit detects and outputs the peak voltage of an output signal from a variable gain circuit. An average value detection/output amplitude setting circuit detects the average value voltage of an output signal from the variable gain circuit, and outputs a calculated voltage. An amplification circuit controls the gain of the variable gain circuit by amplifying the difference between the output voltages of the peak detection circuit and average value detection/output amplitude setting circuit. The number of base-emitter junctions of transistors on a path in the peak detection circuit from input ports which receive output signals from the variable gain circuit to an output port which outputs a voltage to the amplification circuit is equal to the number of base-emitter junctions of transistors on a path in the average value detection/output amplitude setting circuit.Type: GrantFiled: June 19, 2012Date of Patent: November 26, 2013Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Kimikazu Sano, Hiroyuki Fukuyama, Hideyuki Nosaka, Makoto Nakamura, Koichi Murata, Masatoshi Tobayashi, Yasunobu Inabe, Eisuke Tsuchiya
-
Publication number: 20130275702Abstract: Unique output control is carried out in allowing or prohibiting an output unit to deliver data to outside from a memory unit, when the data at a designated address is read out of the memory unit in response to an address signal designating that address. The memory unit has an output enable/disable flag stored at a predetermined address. This flag is indicative of whether to permit the data to be delivered to outside. After power is turned on, the output unit prohibits the delivery of the data to outside until the output enable/disable flag indicates permission for data delivery to outside and the address signal designating the predetermined address is continuously supplied over N times the clock period of a clock signal. N is an integer equal to or greater than two.Type: ApplicationFiled: April 12, 2013Publication date: October 17, 2013Applicant: LAPIS SEMICONDUCTOR CO., LTD.Inventors: Satoshi MIYAZAKI, Hiroyuki FUKUYAMA
-
Publication number: 20130187170Abstract: Provided is a method for producing inexpensive and high-quality aluminum nitride crystals. Gas containing N atoms is introduced into a melt of a Ga—Al alloy, whereby aluminum nitride crystals are made to epitaxially grow on a seed crystal substrate in the melt of the Ga—Al alloy. A growth temperature of aluminum nitride crystals is set at not less than 1000 degrees C. and not more than 1500 degrees C., thereby allowing GaN to be decomposed into Ga metal and nitrogen gas.Type: ApplicationFiled: July 14, 2011Publication date: July 25, 2013Applicants: TOHOKU UNIVERSITY, SUMITOMO METAL MINING CO., LTD.Inventors: Hiroyuki Fukuyama, Masayoshi Adachi, Akikazu Tanaka, Kazuo Maeda
-
Patent number: 8397132Abstract: An exemplary memory device has at least one memory chip that stores data and error correcting information. An error detecting circuit in the memory chip performs a calculation on the data and error correcting information to obtain error detection information indicating the locations of bit errors in the data. The uncorrected data and the error detection information are output from the memory chip. The uncorrected data and error detection information may also be output from the memory device, or the memory device may include a memory controller chip with an error correcting circuit that uses the error detection information to correct the bit errors and outputs corrected data from the memory device.Type: GrantFiled: February 5, 2010Date of Patent: March 12, 2013Assignee: Oki Semiconductor Co., Ltd.Inventors: Hiroyuki Fukuyama, Satoshi Miyazaki
-
Publication number: 20120326782Abstract: In an automatic gain control circuit, a peak detection circuit detects and outputs the peak voltage of an output signal from a variable gain circuit. An average value detection/output amplitude setting circuit detects the average value voltage of an output signal from the variable gain circuit, and outputs a calculated voltage. An amplification circuit controls the gain of the variable gain circuit by amplifying the difference between the output voltages of the peak detection circuit and average value detection/output amplitude setting circuit. The number of base-emitter junctions of transistors on a path in the peak detection circuit from input ports which receive output signals from the variable gain circuit to an output port which outputs a voltage to the amplification circuit is equal to the number of base-emitter junctions of transistors on a path in the average value detection/output amplitude setting circuit.Type: ApplicationFiled: June 19, 2012Publication date: December 27, 2012Inventors: Kimikazu Sano, Hiroyuki Fukuyama, Hideyuki Nosaka, Makoto Nakamura, Koichi Murata, Masatoshi Tobayashi, Yasunobu Inabe, Eisuke Tsuchiya
-
Publication number: 20120319766Abstract: In a signal output circuit, an input buffer externally receives a single-phase switching instruction signal to switch a state of the output circuit a shutdown disable state or a shutdown enable state, and converts and outputs the single-phase switching instruction signal into a differential switching instruction signal. A generation control circuit outputs a generation control signal for controlling generation of a control voltage in the control voltage generation circuit based on the differential switching instruction signal. A control voltage generation circuit outputs the control voltage upon changing a value of the control voltage in accordance with a logic of the single-phase switching instruction signal. An output circuit externally receives a differential input signal, outputs a differential output signal upon impedance-converting the differential input signal, and switches between the shutdown disable state and the shutdown enable state of the differential input signal.Type: ApplicationFiled: June 19, 2012Publication date: December 20, 2012Inventors: Kimikazu Sano, Hiroyuki Fukuyama, Hideyuki Nosaka, Makoto Nakamura, Koichi Murata, Masatoshi Tobayashi, Eisuke Tsuchiya
-
Publication number: 20120240845Abstract: Disclosed is a novel method wherein an aluminum nitride single crystal having good crystallinity is efficiently and easily manufactured. The method for produsing an aluminum nitride single crystal wherein nitrogen gas is circulated in the presence of a raw material gas generation source, which generates an aluminum gas or an aluminum oxide gas, and a carbon body, and then the aluminum nitride single crystal is grown under a heating condition; characterized in that, at least a part of the carbon body does not directly contact with the raw material gas generation source, at least a part of the raw material gas generation source does not directly contact with the carbon body, the raw material gas generation source and the carbon body are positioned to make a space in which a clearance between the raw material gas generation source, which does not contact with the carbon body, and the carbon body, which does not contact with the raw material gas generation source, is 0.Type: ApplicationFiled: November 29, 2010Publication date: September 27, 2012Applicants: Tohoku University, Tokuyama CorporationInventors: Hiroyuki Fukuyama, Masanobu Azuma, Kazuya Takada, Takeshi Hattori
-
Patent number: 8199548Abstract: A semiconductor storage device is configured to reduce data read time. In the semiconductor storage device, an input/output control circuit is formed along one side of a memory cell array disposed between a data input pad and a data output pad. The input/output control circuit is disposed between a hold command input pad and a clock input pad. Accordingly, it is possible to minimize the distances of the wirings from the input/output control circuit to the pads and to make the distances of the wirings equal and thus to minimize the read time of the memory cell array. In addition, since it is also possible to make equal wiring distances from the input/output control circuit to the address decoder and output multiplexer, it is possible to minimize the read time of the memory cell array.Type: GrantFiled: March 16, 2010Date of Patent: June 12, 2012Assignee: Oki Semiconductor Co., Ltd.Inventor: Hiroyuki Fukuyama
-
Patent number: 8137825Abstract: In a method of manufacturing an aluminum nitride single crystal film on a substrate by heating a sapphire substrate in the presence of carbon, nitrogen and carbon monoxide, an aluminum compound which differs from the raw material sapphire substrate and the formed aluminum nitride single crystal and can control the concentration of aluminum in the heating atmosphere, such as aluminum nitride or alumina, is made existent in a reaction system to promote a reduction nitriding reaction. An aluminum nitride single crystal multi-layer substrate having an aluminum nitride single crystal film on the surface of a sapphire substrate, wherein the aluminum nitride single crystal has improved crystallinity and a low density of defects, is provided.Type: GrantFiled: August 1, 2006Date of Patent: March 20, 2012Assignees: Tokuyama Corporation, Tohoku UniversityInventors: Hiroyuki Fukuyama, Kazuya Takada, Akira Hakomori