Abstract: A pixel calculating device that performs vertical filtering on pixel data in order to reduce frame data in a vertical direction. The pixel calculating device includes a decoding unit 401 for decoding compressed video data to produce frame data, frame memory 402 for storing the frame data, a filtering unit 403 for reducing the frame data in a vertical direction by the vertical filtering to produce a reduced image, buffer memory 404 for storing the reduced image outputted from filtering unit 403, and a control unit 406 for controlling filtering unit 403 based on a decoding state of the video data by decoding unit 401 and a filtering state of the frame data by filtering unit 403, so that overrun and underrun do not occur in filtering unit 403.

Abstract: A pixel calculating device for performing vertical filtering that includes 16 pixel processing units 1 to 16 and an input buffer group 22 storing 16 pieces of pixel data and filter coefficients. Each of the pixel processing units performs operations using the pixel data and a filter coefficient supplied from input buffer group 22, and then acquires pixel data from an adjacent pixel processing unit. Further operations are performed by each of the pixel processing units using the acquired pixel data and operation results are accumulated. Filtering is carried out through a repetition of this acquiring and accumulation process, the number of taps being determined by the number of repetitions.

Abstract: In a computer system that concurrently executes a plurality of tasks, a cache controller eliminates the possibility of the hit rate of one task dropping due to execution of another task. A region managing unit manages a plurality of regions in a cache memory in correspondence with a plurality of tasks. An address receiving unit receives, from a microprocessor, an address of a location in a main memory at which data to be accessed to execute one of the plurality of tasks is stored. A caching unit acquires, if the data to be accessed is not stored in the cache memory, a data block including the data from the main memory, and stores the acquired data block into a region in the cache memory corresponding to the task.

Abstract: A data processor has sixteen processing elements that each include a register file and an arithmetic logic unit. A network unit connects between the register files of the processing elements and the arithmetic logic units of the processing elements. The network unit has a selector for simultaneously performing a plurality of data transfers which are each made from a register file of one processing element to an operation unit of another processing element. With the provision of this selector that can perform such simultaneous data transfers, the processing efficiency of the processing elements can be maintained even if a change occurs in operand assignments and the like.

Abstract: An identifier adding circuit adds an identifier specifying the channel of each PES packet output from a TS decoder to a header of each PES packet; an identifier selecting circuit reads PID information corresponding to the identifier added to each PES packet from an identifier table, and then stores PES packets for respective channels into respective storage regions CH1 to CHn in a bank memory instructed for the read PID information by a controller; and a decoding circuit decodes the stored PES packets for the respective channels.

Abstract: This invention provides, at a low cost, a low-pollution type cationic electro-coating bath composition which contains neither lead nor chromium, and which comprises cationic electrodeposition paint and, contained therein, a bismuth oxide paste, the amount of the bismuth oxide paste being within a range of 0.1 to 0.3% by weight as metal bismuth on the basis of total solid content of said cationic electro-coating bath composition, and the bismuth oxide paste being prepared by dispersing bismuth oxide (B) in an organic acid-neutralized aqueous dispersion of diethanol amine-added alicyclic epoxy resin (A).

Abstract: A pixel calculating device that performs vertical filtering on pixel data in order to reduce frame data in a vertical direction. The pixel calculating device includes a decoding unit 401 for decoding compressed video data to produce frame data, frame memory 402 for storing the frame data, a filtering unit 403 for reducing the frame data in a vertical direction by means of the vertical filtering to produce a reduced image, buffer memory 404 for storing the reduced image outputted from filtering unit 403, and a control unit 406 for controlling filtering unit 403 based on a decoding state of the video data by decoding unit 401 and a filtering state of the frame data by filtering unit 403, so that overrun and underrun do not occur in filtering unit 403.

Abstract: This invention provides, at a low cost, a low-pollution type cationic electro-coating bath composition which contains neither lead nor chromium, and which comprises cationic electrodeposition paint and, contained therein, a bismuth oxide paste, the amount of the bismuth oxide paste being within a range of 0.1 to 0.3% by weight as metal bismuth on the basis of total solid content of said cationic electro-coating bath composition, and the bismuth oxide paste being prepared by dispersing bismuth oxide (B) in an organic acid-neutralized aqueous dispersion of diethanol amine-added alicyclic epoxy resin (A).

Abstract: A pixel calculating device for performing vertical filtering that includes 16 pixel processing units 1 to 16 and an input buffer group 22 storing 16 pieces of pixel data and filter coefficients. Each of the pixel processing units performs operations using the pixel data and a filter coefficient supplied from input buffer group 22, and then acquires pixel data from an adjacent pixel processing unit. Further operations are performed by each of the pixel processing units using the acquired pixel data and operation results are accumulated. Filtering is carried out through a repetition of this acquiring and accumulation process, the number of taps being determined by the number of repetitions.

Abstract: For simultaneously controlling a plurality of cryopumps, one processor and communication conversion sections of the respective cryopumps are connected to each other with a communication network. The processor and a host computer are connected to each other with an exclusive line. The processor controls the cryopumps in time division by performing data exchange with the communication conversion sections of the cryopumps by means of packet exchange, line exchange and the like via the communication network. Thus, the need of providing exclusive processors for the cryopumps, respectively, is eliminated, allowing a large extent of cost reduction as well as a wiring simplification to be realized.

Abstract: In a second displacer (33), a final layer (33c) measuring 10 K or lower in temperature is filled with spherical particles (34) of HoCu.sub.2 which exhibit a specific heat greater than that of Er.sub.3 Ni. An intermediate layer (33d) of 10 K to 15 K is filled with spherical particles (35) of Er.sub.3 Ni, Er.sub.3 Co or Nd. Further, an initial layer (33e) of 15 K or higher is filled with spherical particles (36) of Pb. By the use of such regenerative materials that exhibit the highest specific heats respectively for the individual temperature regions of 10 K or lower, 10-15 K, and 15 K or higher, the second displacer (33) exhibits an enhanced refrigerating capacity, as compared with the case of filling the final layer with the spherical particles of Er.sub.3 Ni as conventionally done. This further makes it possible to construct the second displacer (33) in a compact size and in a reduced weight.

Abstract: Occurrence of leakage of refrigerant around a seal member in cryogenic state is suppressed. The seal member 32 is formed from unsaturated polyester-PTFE with an unsaturated polyester mixing ratio of 20% to 35%. A plurality of slits 36 extended axially and penetrating through radially are provided in an end portion 35 of an outer circumferential wall 32a. Thus, by a synergistic effect of the use of a material small in the heat shrinkage factor and the reduction of radial shrinkage of the whole outer circumferential wall 32a attributable to the aforementioned configuration, the sealing properties in the cryogenic state are enhanced so that the occurrence of leakage of refrigerant is suppressed to the utmost, thereby preventing deterioration in the refrigeratability.