Abstract: Stacked semiconductor devices, and related systems and methods, are disclosed herein. In some embodiments, the stacked semiconductor device includes a package substrate having at least a first layer and a second layer, an interconnect extending through the package substrate, a stack of dies carried by the package substrate, and one or more wirebonds electrically coupling the stack of dies to package substrate. Each of the layers of the package substrate can include a section of the interconnect with a frustoconical shape. Each of the sections can be directly coupled together. Further, the section in an uppermost layer of the package substrate is exposed at an upper surface of the package substrate. The wirebonds can be directly coupled to the exposed surface of the uppermost section.

Abstract: A semiconductor device assembly includes a semiconductor die, a substrate carrying the semiconductor die, and a printed circuit board (PCB) coupled to the substrate. The PCB includes a primary conductive layer including a first surface of the substrate and a first solder mask layer coupled to the first surface. The substrate also includes a secondary conductive layer including a second surface of the substrate and a second solder mask layer coupled to the second surface. The substrate further includes an inner conductive layer positioned between the primary layer and the secondary layer, where the inner layer includes a bond pad positioned at the end of an opening that extends from the first solder mask layer through the primary layer to the bond pad of the inner layer. By attaching a solder ball to the bond pad of the inner layer, standoff height is reduced.

Abstract: Modular systems in packages, and associated devices, systems, and methods, are disclosed herein. In one embodiment, a system comprises a main module package and an upper module package. The main module package includes a first substrate and a first electronic device mounted on a first side of the first substrate. The upper module package includes a second substrate and one or more second electronic devices mounted on a first side of the second substrate. The second substrate includes a cavity at a second side of the second substrate opposite the first side, and the upper module package is mountable on the first side of the first substrate of the main module package such that the first electronic device is positioned within the cavity and the second substrate generally surrounds at least a portion of a perimeter of the first electronic device.

Abstract: A semiconductor device assembly including a semiconductor device having a plurality of pillars disposed on a backside surface of the semiconductor device; and a substrate, including: a solder mask layer disposed on a front side surface of the substrate, a plurality of extended bond pads disposed on the frontside surface of the substrate and surrounded by the solder mask layer, the plurality of extended bond pads each having a top surface higher than a top surface of the solder mask layer, and wherein the semiconductor device is directly attached to the substrate by bonding each of the plurality of pillars of the semiconductor device to the top surface of a corresponding one of the plurality of extended bond pads with a solder connection.

Abstract: This invention relates to an apparatus for conducting immunoassay test. The apparatus includes a groove unit having a groove along a vertical direction configured to hold a rod-shaped portion of a probe along the vertical direction, and a push pin configured to move along a horizontal direction, the push pin being capable of residing at a first position and a second position. A tip of the push pin is capable of pressing the rod-shaped portion of the probe against the groove when the push pin resides at the first position. The distance between the tip of the push pin and the groove is larger than a diameter of the rod-shaped portion of the probe when the push pin resides at the second position.

Abstract: Devices, methods, and media are described for runtime memory allocation to avoid defects. One embodiment includes assigning a plurality of memory blocks of a memory sub-system to a plurality of erase groups, such that each erase group of the plurality of erase groups comprises two or more memory blocks of the plurality of memory blocks. A bad block association is determined for each erase group of the plurality of erase groups. Prior to a memory condition being met, memory resources of the memory sub-system are allocated by erase group based on a first set of criteria which are based at least in part on the bad block association for each erase group in order to prioritize use of erase groups with fewer bad blocks.

Abstract: An embodiment related to a device. The device includes a first die with first and second die surfaces. The second die surface is bonded to a first die attach pad (DAP) disposed on a first substrate surface of a package substrate and the first die surface includes a first die contact pad. The device also includes a first clip bond including a first clip bond horizontal planar portion attached to the first die contact pad on the first die surface, and a first clip bond vertical portion disposed on an edge of the first clip bond horizontal planar portion. The first clip bond vertical portion is attached to a first substrate bond pad on the first substrate surface. The device further includes a first conductive clip-die bonding layer with spacers on the first die contact pad of the first die.

Abstract: The present invention is directed to an assembly for use in detecting an analyte in a sample based on thin-film spectral interference. The assembly includes a light source to emit light signals; a light detector to detect light signals; a coupler to optically couple the light source and the light detector to a waveguide tip; a monolithic substrate having a coupling side and a sensing side; and a lens between the waveguide tip and the monolithic substrate. The lens relays optical signals between the waveguide tip and the monolithic substrate.

Abstract: This invention relates to an apparatus for conducting immunoassay test. The apparatus includes a groove unit having a groove along a vertical direction configured to hold a rod-shaped portion of a probe along the vertical direction, and a push pin configured to move along a horizontal direction, the push pin being capable of residing at a first position and a second position. A tip of the push pin is capable of pressing the rod-shaped portion of the probe against the groove when the push pin resides at the first position. The distance between the tip of the push pin and the groove is larger than a diameter of the rod-shaped portion of the probe when the push pin resides at the second position.

Abstract: The present disclosure is directed to a high throughput clip bonding tool or system which is flexible and easily adapts to different clip bond pitches or sizes. The clip bonding system may be an integrated system with various modules, including a clip singulation module, a feeder module, a transfer module and a clip attach module within a shared footprint. For example, an incoming clip source may be fed to the clip singulation module for clip singulation before the singulated clips are transferred by the feeder and transfer modules to a clip presentation area for clip alignment before pickup. A pickup tool of the clip attach module is configured to facilitate pickup and attachment of clips onto the semiconductor packages to be clip bonded. For example, the pickup head is programmable to facilitate clip bonding process of different applications which may require clips and packages with different sizes.

Abstract: A reactive path planner for vehicles is disclosed. The reactive path planner, based on a nominal path from A to B, generates alternative parallel paths which are displaced by a predefined lateral distance from the nominal path using constrained quintic polynomials. Constraints are imposed on the alternative paths to ensure safety and comfort based on dynamic and mechanical feasibilities of the vehicle. A cost function is applied to the nominal path and alternative paths select the path with the least cost. The reactive path planner achieves a complete path planning solution with high computational efficiency, even in highly cluttered and dynamic environments.

Abstract: Methods, system, and computer storage media are provided for multi-modal localization. Input data comprising two modalities, such as image data and corresponding text or audio data, may be received. A phrase may be extracted from the text or audio data, and a neural network system may be utilized to spatially and temporally localize the phrase within the image data. The neural network system may include a plurality of cross-modal attention layers that each compare features across the first and second modalities without comparing features of the same modality. Using the cross-modal attention layers, a region or subset of pixels within one or more frames of the image data may be identified as corresponding to the phrase, and a localization indicator may be presented for display with the image data. Embodiments may also include unsupervised training of the neural network system.

Abstract: The present invention is directed to an assembly for use in detecting an analyte in a sample based on thin-film spectral interference. The assembly includes a light source to emit light signals; a light detector to detect light signals; a coupler to optically couple the light source and the light detector to a waveguide tip; a monolithic substrate having a coupling side and a sensing side; and a lens between the waveguide tip and the monolithic substrate. The lens relays optical signals between the waveguide tip and the monolithic substrate.

Abstract: This invention relates to an apparatus for conducting immunoassay test. The apparatus includes a groove unit having a groove along a vertical direction configured to hold a rod-shaped portion of a probe along the vertical direction, and a push pin configured to move along a horizontal direction, the push pin being capable of residing at a first position and a second position. A tip of the push pin is capable of pressing the rod-shaped portion of the probe against the groove when the push pin resides at the first position. The distance between the tip of the push pin and the groove is larger than a diameter of the rod-shaped portion of the probe when the push pin resides at the second position.

Abstract: A semiconductor manufacturing equipment cleaning system has a multi-station cleaning and inspection system. Within semiconductor manufacturing equipment cleaning system, a tray cleaning station uses a first rotating brush passing over a first surface of a carrier and possibly semiconductor die, and a second rotating brush passing over a second surface of the carrier and semiconductor die opposite the first surface of the carrier and semiconductor die. Debris and contaminants dislodged from the first surface and second surface of the carrier by the first rotating brush and second rotating brush are removed under vacuum suction. A conveyor transports the carrier through the multi-station cleaning and inspection system. The first rotating brush and second rotating brush move in tandem across the first surface and second surface of the carrier. Air pressure is injected across the first rotating brush and second rotating brush to further remove debris and contaminants.

Abstract: The present invention lies in the technical field of drug development and malaria treatment and specifically relates to compounds having antimalarial activity as well as pharmaceutical compositions comprising them and methods of use thereof.