Abstract: Embodiments of the present disclosure provide a rotor, a motor, a powertrain, and a vehicle. The rotor includes wedges and pole shoes. The wedges fit the pole shoes through curved portions. The curved portions can effectively relieve stress concentration of joint portions, increase strength of the wedges and the pole shoes, and effectively increase effective winding space of slots in the rotor. In this way, power density of a motor in which the rotor is used is increased.

Abstract: A method in one embodiment creates a model of an authentic IC for use in comparisons with counterfeit ICs. The model can be created by determining a first or initial set of points of interest (POIs) on the simulated physical (e.g., gate level) layout and simulating side channel leakage from each POI and then expanding the size of the POI and repeating the simulation and comparing successive simulation results (between successive sizes of POIs for a given POI) to determine if a solution for the size of the POI has converged. The final POIs are then processed in a simulation that can use multiple payloads (e.g., cryptographic data) over the entire set of final POIs, and the resulting data set can be used to create the model.

Abstract: A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.

Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.

Abstract: Disclosed are a polyethylene glycol conjugate drug, and a preparation method therefor and the use thereof. Specifically, the present invention relates to a polyethylene glycol conjugate drug represented by formula A or a pharmaceutically acceptable salt thereof, a method for preparing the polyethylene glycol conjugate drug or the pharmaceutically acceptable salt thereof, an intermediate for preparing the polyethylene glycol conjugate drug or the pharmaceutically acceptable salt thereof, a pharmaceutical composition comprising the polyethylene glycol conjugate drug or the pharmaceutically acceptable salt thereof, and the use of the polyethylene glycol conjugate drug or the pharmaceutically acceptable salt thereof in the preparation of a drug.

Abstract: Provided are a fibroblast activation protein inhibitor (FAPI) dimer compound, an FAPI dimer-based positron emission tomography (PET) imaging agent for tumor diagnosis, and a preparation method and use thereof. An amphiphilic polyethylene glycol (PEG) chain and a dimerized structure of FAPI in the FAPI dimer compound with a structure shown in formula I can improve the in vivo kinetic properties of the compound and prolong a residence time of the compound in a tumor, thereby improving the uptake and imaging effects in the tumor. The accurate tumor diagnosis can be achieved by labeling the FAPI dimer compound with a diagnostic nuclide (68Ga), which has promising application prospects in PET imaging for diagnosis and in the preparation of a therapeutic nuclide (such as 177Lu or 90Y)-labeled drug for treating a FAP-?-expressing tumor.

Abstract: In accordance with some embodiments, a package-on-package (PoP) structure includes a first semiconductor package having a first side and a second side opposing the first side, a second semiconductor package having a first side and a second side opposing the first side, and a plurality of inter-package connector coupled between the first side of the first semiconductor package and the first side of the second semiconductor package. The PoP structure further includes a first molding material on the second side of the first semiconductor package. The second side of the second semiconductor package is substantially free of the first molding material.

Abstract: A surge protection system includes a receptacle body, at least one power output jack, a power obtaining device, at least one surge protection module, a microcontroller unit, and a surge detection circuit. The at least one surge protection module includes a housing, a memory element, and a surge protection circuit that includes a surge absorption element and a thermal fuse connected in series and parallel. The surge absorption element absorbs a surge inputted from an external power supply, and the memory element records a number of surges carried by the surge absorption element. When the surge enters the surge protection system from the external power supply, the surge absorption element absorbs the surge, and the surge detection circuit outputs a signal to the microcontroller unit that writes the number of surges carried by the surge absorption element into the memory element.

Abstract: Provided is a supergravity directional solidification melting furnace equipment, including a supergravity test chamber and, mounted in the supergravity test chamber, a high-temperature heating subsystem, a crucible, and an air-cooling system. The supergravity test chamber is mounted with a wiring electrode and a cooling air valve device. The high-temperature heating subsystem is fixed in the supergravity test chamber. The crucible and the air cooling system are provided in the high-temperature heating subsystem. The high-temperature heating subsystem includes upper, middle, and lower furnaces, a mullite insulating layer, upper and lower heating cavity outer bodies, upper and lower heating furnace pipes, and a crucible support base. A high-temperature heating cavity is divided into upper and lower parts, is provided therein with a spiral groove, and is fitted with a heating element. The crucible support base is provided therein with a vent pipe channel into which a cooling air is introduced.

Abstract: A fastener is adapted for assembling a first housing to a second housing. The first housing is provided with a protruding portion and a buckling portion, and the second housing has a first surface, a second surface, and a through hole. The fastener includes a first portion, at least one connecting portion, at least two elastic portions, and a second portion. The first portion movably abuts against the first surface and has a first opening. The connecting portion is accommodated in the through hole. One end of the connecting portion is connected to the first portion. The connecting portion is spaced apart from an inner edge of the second housing by a gap. The two elastic portions inclinedly extend into the first opening. The second portion movably abuts against the second surface and is disposed at the another end of the connecting portion.

Abstract: A wheel provided by the disclosure includes a substrate, a driving component, a clamping element and a balance component. The driving component is connected to the substrate, and is configured to drive the substrate to rotate about the axis of the driving component as the central axis. The clamping element is arranged on the substrate along the axis, and the clamping element includes a plurality of protruding structures. The balance component includes a balance substance and an adhesive. The balance substance is arranged on the protruding structure, and the adhesive covers the balance substance and the protruding structure to fix the balance component on the clamping element. The wheel and projection device provided by the disclosure have better structural reliability and heat dissipation efficiency.

Abstract: In a method of cleaning a lithography system, during idle mode, a stream of air is directed, through a first opening, into a chamber of a wafer table of an EUV lithography system. One or more particles is extracted by the directed stream of air from surfaces of one or more wafer chucks in the chamber of the wafer table. The stream of air and the extracted one or more particle are drawn, through a second opening, out of the chamber of the wafer table.

Abstract: An image identification method is provided, including: storing at least one normal state image of at least one test object; an automatic codec receiving the at least one normal state image to become a trained automatic codec; at least one camera device capturing at least one state image of the at least one test object; a computer device receiving the at least one state image, and the trained automatic codec performing feature extraction and reconstruction on the at least one state image to generate at least one reconstructed state image; and the computer device comparing the at least one state image and the at least one reconstructed state image, and determining whether the at least one state image is a normal state image. The present invention also provides an image identification system.

Abstract: A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts top surfaces of the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.

Abstract: A method of determining the reliability of a high-voltage PMOS (HVPMOS) device includes determining a bulk resistance of the HVPMOS device, and evaluating the reliability of the HVPMOS device based on the bulk resistance.

Abstract: Various embodiments of the teachings herein include an image processing system comprising: a video stream processing device configured to receive a video stream, segment the video stream into multiple frames of pictures arranged in chronological order, and distribute the multiple frames of pictures to edge computing devices in a connected edge computing device group; and a picture collecting device configured to receive pictures from the edge computing device group. The individual edge computing devices in the edge computing device group are each configured to subject the received pictures to target identification, and send the pictures marked with a region in which an identified target is located. The picture collecting device is further configured to restore in chronological order as a video stream the received pictures marked with target identification results.

Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.

Abstract: Embodiments herein describe techniques for a memory device including at least two memory cells. A first memory cell includes a first storage cell and a first transistor to control access to the first storage cell. A second memory cell includes a second storage cell and a second transistor to control access to the second storage cell. A shared contact electrode is shared between the first transistor and the second transistor, the shared contact electrode being coupled to a source area or a drain area of the first transistor, coupled to a source area or a drain area of the second transistor, and further being coupled to a bit line of the memory device. Other embodiments may be described and/or claimed.

Abstract: The present disclosure provides a compressor rotor, a compressor and a refrigerant circulation system. The compressor rotor includes: a motor rotor including a plurality of rotor sections, a locking rod, a compression unit rotating part and a locking member. The rotor sections are fixedly connected in an axial direction and are provided with an axial through hole and the locking rod penetrates through the axial through hole. The compression unit rotating part is located at the end part of the motor rotor and is connected to the locking rod. The locking member is configured to lock the compression unit rotating part on the locking rod. The locking rod, the compression unit rotating part and the locking member form a pressing structure which applies a pressure toward an axial inner side to the motor rotor.

Abstract: Package structures and methods of forming package structures are described. A method includes placing a first package within a recess of a first substrate. The first package includes a first die. The method further includes attaching a first sensor to the first package and the first substrate. The first sensor is electrically coupled to the first package and the first substrate.