Abstract: Provided herein may be a semiconductor memory device and a method of manufacturing the semiconductor memory device. The semiconductor memory device may include a stacked body including a plurality of interlayer insulating layers and a plurality of gate electrodes that are alternately stacked on a substrate, and a plurality of channel structures configured to vertically pass through the stacked body. Each of the plurality of channel structures may include a core insulating layer, a first channel layer, a second channel layer, a tunnel insulating layer, and a charge storage layer that extend vertically towards the substrate. Electron mobility of the first channel layer may be higher than electron mobility of the second channel layer.

Abstract: A signal compression method and apparatus and a signal restoration method and apparatus are provided. The signal compression method includes outputting an input signal, obtained by processing an audio signal, which is input, based on a human auditory perception characteristic, using an auditory perception model, extracting a feature vector from the input signal using a feature extraction module, and outputting a code obtained by compressing the feature vector using a trained signal compression model.

Abstract: A thermoplastic resin composition according to the present invention comprises: about 100 parts by weight of a styrene-ethylene-butylene-styrene copolymer including about 10 to about 50 wt % of a first styrene-ethylene-butylene-styrene copolymer having a weight average molecular weight of about 250,000 to about 350,000 g/mol, and about 50 to about 90 wt % of a second styrene-ethylene-butylene-styrene copolymer having a weight average molecular weight of about 100,000 to about 200,000 g/mol; and about 1 to about 25 parts by weight of a polyolefin resin. The thermoplastic resin composition and a molded article formed therefrom are environmentally-friendly, and have excellent processability, flexibility, elastic recovery, lightweightness, durability, and the like.

Abstract: A memory device includes a page buffer, a voltage generator, and a test controller. The page buffer is connected to a memory cell through a bit line, and is configured to sense a threshold voltage of the memory cell through a potential of a sensing node electrically connected to the bit line. The voltage generator is configured to generate a test voltage to be applied to the sensing node. The test controller is configured to control the voltage generator to apply the test voltage to the sensing node, and detect a defect of the page buffer, based on a leakage current value of the sensing node.

Abstract: Disclosed are methods of training an acoustic scene classification model and classifying an acoustic scene and an electronic device for performing the methods. The training method of an acoustic scene classification model includes inputting training data labeled as an acoustic scene to the acoustic scene classification model that is repeatedly trained by using the training data and outputting a first result predicting the acoustic scene, updating the weight of the auxiliary model configured to induce training of the acoustic scene classification model, based on a weight of the acoustic scene classification model and a weight of an auxiliary model in a previous epoch, inputting the training data to the auxiliary model and outputting a second result, calculating a cost function, based on the first result, the second result, and labeling of acoustic data, and updating the weight of the acoustic scene classification model, based on the cost function.

Abstract: A memory device includes a plurality of memory cell strings, a peripheral circuit, and control logic. The plurality of memory cell strings are connected between a bit line and a common source line. The peripheral circuit is configured to perform a channel precharge operation and a program operation for the plurality of memory cell strings. The control logic is configured to control the peripheral circuit to apply a pass voltage to a selected word line among a plurality of word lines connected to the plurality of memory cell strings and to apply a turn-on voltage to a source select line connected to the plurality of memory cell strings, during a portion of a period in which the pass voltage is applied to the selected word line, in the program operation.

Abstract: A method for extracting a fingerprint of a video includes calculating 2D discrete cosine transform (DCT) coefficients from each of the plurality of frames of the video, extracting, from the 2D DCT coefficients, a coefficient having a basis satisfying at least one of up-down symmetry or left-right symmetry, and calculating a fingerprint of the video based on the extracted coefficient.

Abstract: A method for extracting a fingerprint of a video having a plurality of frames includes obtaining a plurality of pixel value matrices from each of the plurality of frames, calculating maximum values of average pixel values in each axis of the plurality of pixel value matrices for each of the plurality of frames, and calculating the fingerprint of the video based on a temporal correlation of the maximum values calculated for the plurality of frames.

Abstract: A cover type touch switch structure includes: a seat housing embedded in a seat of a vehicle so as to be fastened to a seat frame; a switch housing disposed in the seat housing and including an outer surface which is coupled to the seat housing via a hook; a light-emitting unit which is disposed in the switch housing and stacked on the seat frame; and a knob unit which has a portion disposed in the switch housing and is stacked on the light-emitting unit.

Abstract: An inventive concept relates to an audio coding method to which CNN-based frequency spectrum recovery is applied. An inventive concept transmits a part of frequency spectral coefficients generated in transform coding to a decoder and the decoder recovers the frequency spectral coefficient not transmitted. Furthermore, the signs of frequency spectral coefficient are transmitted from an encoder to the decoder depending on a sign transmission rule.

Abstract: A device for adjusting a position of a headrest for a vehicle includes: a stay mounted on a seatback frame; a main frame including a rotation guide hole, inserted into and mounted on the stay, and configured to ascend or descend along the stay; an elevation device mounted on the main frame and the stay, and configured to allow the main frame to ascend or descend along the stay; a rotating frame including a first end portion inserted into the stay and configured to ascend or descend along the stay, and a second end portion extending toward the rotation guide hole of the main frame; a rotating device mounted on the rotating frame and the rotation guide hole of the main frame, and configured to rotate the rotating frame along the rotation guide hole; and a headrest frame assembled to the rotating frame.

Abstract: A memory device capable of reducing a peak current includes a plurality of memory cell strings each including a plurality of memory cells connected between a common source line and a bit line, a source select line connected between the common source line and the plurality of memory cells, and a drain select line connected between the bit line and the plurality of memory cells. A method for operating the memory device includes: precharging channel regions of a plurality of memory cell strings through a common source line; and setting a bit line voltage applied to the bit line, after starting precharging the channel regions of the plurality of memory cell strings, while the channel regions of the plurality of memory cell strings are being precharged.

Abstract: A memory system includes: a nonvolatile memory device including a plurality of memory blocks each including a plurality of memory cells coupled to a plurality of word lines; and a controller configured to control the nonvolatile memory device to perform a read operation on the plurality of memory blocks, wherein the read operation includes: a first operation of supplying a first voltage level to the plurality of word lines, a second operation of discharging the plurality of word lines to a second voltage level, a third operation of supplying a third voltage level less than the first voltage level to the plurality of word lines, and a fourth operation of discharging the plurality of word lines to a fourth voltage level.

Abstract: There are provided a memory device and an operating method thereof. The memory device includes: a memory block including a plurality of memory cells and a plurality of select transistors; a peripheral circuit for performing a program operation on selected select transistors among the plurality of select transistors in a select transistor program operation; and a control logic for controlling the peripheral circuit to perform the select transistor program operation. The peripheral circuit applies a coupling voltage having a positive potential to a source line of the memory block in the select transistor program operation.

Abstract: The present technology relates to an electronic device. For example, the present technology relates to a memory device and a method of operating the memory device. A memory device according to an embodiment includes a memory cell, a page buffer, and a test performer configured to control the page buffer to sequentially apply a first test voltage and a second test voltage of a level lower than a level of the first test voltage to a sensing node of the page buffer through a bit line, and detect a defect of the sensing node according to whether a potential level of the sensing node is changed.

Abstract: A memory device may include a first sub-block and a second sub-block each including a plurality of select transistors and a plurality of memory cells, a peripheral circuit performing a read operation on data stored in the first sub-block, and a control logic controlling the peripheral circuit to turn on the plurality of select transistors included in each of the first and second sub-blocks and apply a read voltage to a selected word line among a plurality of word lines.

Abstract: Provided herein is a semiconductor memory device and a method of operating the same. The semiconductor memory device includes a memory block, a peripheral circuit, and a control logic. The memory block includes a plurality of sub-blocks coupled to a plurality of source select lines, respectively. The peripheral circuit performs a program operation on the memory block. The control logic is configured to control the peripheral circuit to increase a voltage of a common source line that is coupled to the memory block, increase a voltage of at least one source select line, among the plurality of source select lines, to a first voltage level, and set a voltage of a bit line that is coupled to the memory block and increase the voltage of at least one source select line from the first voltage level to a second voltage level.

Abstract: Provided herein may be a semiconductor memory device and a method of manufacturing the semiconductor memory device. The semiconductor memory device may include a stacked body including a plurality of interlayer insulating layers and a plurality of gate electrodes that are alternately stacked on a substrate, and a plurality of channel structures configured to vertically pass through the stacked body. Each of the plurality of channel structures may include a core insulating layer, a first channel layer, a second channel layer, a tunnel insulating layer, and a charge storage layer that extend vertically towards the substrate. Electron mobility of the first channel layer may be higher than electron mobility of the second channel layer.

Abstract: A memory device and method of operating the same. A memory device includes a memory block, a peripheral circuit, and a program operation controller. The memory block includes a first sub block connected to a first drain select line and a first source select line, and a second sub block connected to a second drain select line and a second source select line, and each of the first sub block and the second sub block is connected to a plurality of word lines and a common source line. The program operation controller controls the peripheral circuit to transfer a precharge voltage to the channel region through the common source line or a plurality of bit lines connected the memory block, and to apply a control voltage to the first and second source select lines at different time points or to apply the control voltage to the first and second drain select lines at different time points in the step of precharging the channel region.

Abstract: A device for adjusting a position of a headrest for a vehicle includes: a stay mounted on a seatback frame; a main frame including a rotation guide hole, inserted into and mounted on the stay, and configured to ascend or descend along the stay; an elevation device mounted on the main frame and the stay, and configured to allow the main frame to ascend or descend along the stay; a rotating frame including a first end portion inserted into the stay and configured to ascend or descend along the stay, and a second end portion extending toward the rotation guide hole of the main frame; a rotating device mounted on the rotating frame and the rotation guide hole of the main frame, and configured to rotate the rotating frame along the rotation guide hole; and a headrest frame assembled to the rotating frame.